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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: llc %s --mtriple=x86_64 -o - | FileCheck %s |
| 3 | + |
| 4 | +define <1 x i32> @atomic_scalar_i32(ptr %x) { |
| 5 | +; CHECK-LABEL: atomic_scalar_i32: |
| 6 | +; CHECK: # %bb.0: |
| 7 | +; CHECK-NEXT: movl (%rdi), %eax |
| 8 | +; CHECK-NEXT: retq |
| 9 | + %ret = load atomic <1 x i32>, ptr %x acquire, align 4 |
| 10 | + ret <1 x i32> %ret |
| 11 | +} |
| 12 | + |
| 13 | +define <1 x float> @atomic_scalar_float(ptr %x) { |
| 14 | +; CHECK-LABEL: atomic_scalar_float: |
| 15 | +; CHECK: # %bb.0: |
| 16 | +; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero |
| 17 | +; CHECK-NEXT: retq |
| 18 | + %ret = load atomic <1 x float>, ptr %x acquire, align 4 |
| 19 | + ret <1 x float> %ret |
| 20 | +} |
| 21 | + |
| 22 | +define <1 x half> @atomic_scalar_half(ptr %x) { |
| 23 | +; CHECK-LABEL: atomic_scalar_half: |
| 24 | +; CHECK: # %bb.0: |
| 25 | +; CHECK-NEXT: movzwl (%rdi), %eax |
| 26 | +; CHECK-NEXT: pinsrw $0, %eax, %xmm0 |
| 27 | +; CHECK-NEXT: retq |
| 28 | + %ret = load atomic <1 x half>, ptr %x acquire, align 4 |
| 29 | + ret <1 x half> %ret |
| 30 | +} |
| 31 | + |
| 32 | +define <1 x bfloat> @atomic_scalar_bfloat(ptr %x) { |
| 33 | +; CHECK-LABEL: atomic_scalar_bfloat: |
| 34 | +; CHECK: # %bb.0: |
| 35 | +; CHECK-NEXT: movzwl (%rdi), %eax |
| 36 | +; CHECK-NEXT: pinsrw $0, %eax, %xmm0 |
| 37 | +; CHECK-NEXT: retq |
| 38 | + %ret = load atomic <1 x bfloat>, ptr %x acquire, align 4 |
| 39 | + ret <1 x bfloat> %ret |
| 40 | +} |
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