[AMDGPU][GlobalISel] Fix assert on APInt creation. #124608
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Since 3494ee9 APInt stopped to implicitly truncate values, therefore it asserts on a big signed value converted to (implicitly) unsigned APInt. The change explicitly marks offset as a signed value.
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@llvm/pr-subscribers-backend-amdgpu @llvm/pr-subscribers-llvm-globalisel Author: Daniil Fukalov (dfukalov) ChangesSince 3494ee9 APInt stopped to implicitly truncate values, therefore it asserts on a big signed value converted to (implicitly) unsigned APInt. The change explicitly marks offset as a signed value. Full diff: https://github.com/llvm/llvm-project/pull/124608.diff 2 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
index d64337c4cb9093..0b18c6b0e923a7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
@@ -56,7 +56,7 @@ AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg,
Register Base;
if (KnownBits && mi_match(Reg, MRI, m_GOr(m_Reg(Base), m_ICst(Offset))) &&
- KnownBits->maskedValueIsZero(Base, APInt(32, Offset)))
+ KnownBits->maskedValueIsZero(Base, APInt(32, Offset, /*isSigned=*/true)))
return std::pair(Base, Offset);
// Handle G_PTRTOINT (G_PTR_ADD base, const) case
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/assert-signed-apint.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/assert-signed-apint.ll
new file mode 100644
index 00000000000000..33bdd67a42782e
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/assert-signed-apint.ll
@@ -0,0 +1,14 @@
+; REQUIRES: asserts
+; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -stop-after=instruction-select -o - %s | FileCheck %s
+
+;
+
+; CHECK-LABEL: @test
+; CHECK: S_BUFFER_LOAD_DWORD_SGPR_IMM
+
+define amdgpu_cs void @test(<4 x i32> inreg %base, i32 inreg %i, ptr addrspace(1) inreg %out) {
+ %off = or i32 %i, -2147483648
+ %v = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %base, i32 %off, i32 0)
+ store i32 %v, ptr addrspace(1) %out, align 4
+ ret void
+}
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Add comment to test.
arsenm
reviewed
Jan 28, 2025
| @@ -0,0 +1,14 @@ | |||
| ; REQUIRES: asserts | |||
| ; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -stop-after=instruction-select -o - %s | FileCheck %s | |||
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Don't need -verify-machineinstrs
| @@ -0,0 +1,14 @@ | |||
| ; REQUIRES: asserts | |||
Comment on lines
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| ; CHECK-LABEL: @test | ||
| ; CHECK: S_BUFFER_LOAD_DWORD_SGPR_IMM |
jayfoad
reviewed
Jan 28, 2025
| ; CHECK-LABEL: @test | ||
| ; CHECK: S_BUFFER_LOAD_DWORD_SGPR_IMM | ||
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| define amdgpu_cs void @test(<4 x i32> inreg %base, i32 inreg %i, ptr addrspace(1) inreg %out) { |
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Maybe just add this case to an existing file that tests buffer offsets?
Addressed comments.
arsenm
approved these changes
Jan 28, 2025
| @@ -56,7 +56,7 @@ AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg, | |||
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| Register Base; | |||
| if (KnownBits && mi_match(Reg, MRI, m_GOr(m_Reg(Base), m_ICst(Offset))) && | |||
| KnownBits->maskedValueIsZero(Base, APInt(32, Offset))) | |||
| KnownBits->maskedValueIsZero(Base, APInt(32, Offset, /*isSigned=*/true))) | |||
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Jay suggested to use APInt in the same case #122251 (comment)
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What is the suggestion? I don't even see how you could use APSInt here.
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Oh, indeed, that was just an incorrect usage of APSInt(BitWidth, isUnsigned)...
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/190/builds/13650 Here is the relevant piece of the build log for the reference |
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Since 3494ee9 APInt stopped to implicitly truncate values, therefore it asserts on a big signed value converted to (implicitly) unsigned APInt.
The change explicitly marks offset as a signed value.