[ot] docs/opentitan: earlgrey: Update flash_ctrl status in docs

Also add more detailed documentation to the prelude of the flash
controller source file that goes into more detail about what is still
not implemented, and what may not be a goal for emulation.

Signed-off-by: Alex Jones <[email protected]>

Author: AlexJones0

docs/opentitan/earlgrey.md

@@ -21,8 +21,9 @@
 * CSRNG
 * EDN
 * Flash controller
-  * missing ECCs/ICVs, scrambling functionality and alerts
-  * no modelling of erase suspend
+  * largely functional but without ECCs/ICVs, scrambling functionality & alerts
+  * no modelling of erase suspend or RMA entry
+  * lc_ctrl NVM debug signal not implemented, escalation partially implemented
 * HMAC
 * OTBN
   * missing side-loading

hw/opentitan/ot_flash.c

@@ -27,13 +27,22 @@
  * THE SOFTWARE.
  *
  * Known limitations:
- *  - ECC/ICV/Scrambling functionality is not yet implemented in QEMU,
+ *  - ECC/ICV/Scrambling functionality is completely unsupported in QEMU,
  *    including ECC single error support.
+ *  - In addition, the loading of flash address and flash data scrambling keys
+ *    from OTP is likewise not included in initialisation.
+ *  - The lc_ctrl `LC_NVM_DEBUG_EN` is currently unused. The `LC_ESCALATE_EN`
+ *    signal is partially implemented (disables the flash).
  *  - Alert functionality is only partially modelled.
- *  - Program Repair / High Endurance enables are meaningless in the OpenTitan
- *    Generic Flash Bank and so are not emulated.
- *  - Erase Suspend is not emulated in QEMU (erases are done synchronously, so
- *    you can suspend, but the bit will immediately be cleared).
+ *  - Life cycle RMA Entry is not implemented.
+ *
+ * Other notes:
+ *  - Program Repair / High Endurance enables are meaningless in the OT
+ *  Generic Flash Bank and so are not emulated.
+ *  - Erase suspend is not emulated as erases are done synchronously, so
+ *  you can suspend, but the bit will be immediately cleared.
+ *  - Flash operations are generally treated as synchronous, so arbitration
+ *  between SW and HW is entirely unsupported.
  */
 
 #include "qemu/osdep.h"