docs(notes): add memory hierarchy notes

Author: lzwjava

notes/2025-03-24-memory-hierarchy-en.md

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+---
+title: Memory Hierarchy
+lang: en
+layout: post
+audio: false
+translated: false
+generated: true
+---
+
+Here’s a detailed tutorial on **Memory Hierarchy**, which is part of **Computer Organization and Architecture (02318)**.
+
+---
+
+## **1. Introduction to Memory Hierarchy**
+Memory in a computer system is organized in a hierarchical structure to balance **cost, speed, and capacity**. The memory hierarchy consists of multiple levels, where the fastest and most expensive memory (CPU registers and cache) is at the top, and the slowest but cheapest memory (hard disk storage) is at the bottom.  
+
+### **Why is Memory Hierarchy Important?**
+- **Speed Optimization:** Faster memory is closer to the CPU for quick access.  
+- **Cost Efficiency:** Slower memory is cheaper and used for bulk storage.  
+- **Efficient Data Management:** Ensures the most frequently used data is quickly accessible.  
+
+---
+
+## **2. Levels of Memory Hierarchy**
+The **memory hierarchy** can be categorized into different levels:
+
+| Level | Memory Type | Speed | Cost | Capacity |
+|--------|-------------|--------|------|----------|
+| 1 | **CPU Registers** | Fastest | Very High | Very Small |
+| 2 | **Cache Memory (L1, L2, L3)** | Very Fast | High | Small |
+| 3 | **Main Memory (RAM)** | Fast | Moderate | Medium |
+| 4 | **Secondary Storage (HDD, SSD)** | Slow | Low | Large |
+| 5 | **Tertiary Storage (Magnetic Tape, Cloud Storage)** | Very Slow | Very Low | Huge |
+
+Each level has specific characteristics that affect system performance.
+
+---
+
+## **3. Cache Memory**
+### **3.1 What is Cache Memory?**
+Cache memory is **small, high-speed memory** located close to the CPU, used to store frequently accessed instructions and data. It helps reduce the time needed to access main memory (RAM).  
+
+### **3.2 Levels of Cache Memory**
+Modern CPUs use a **multi-level cache structure**:  
+- **L1 Cache (Level 1):** Smallest and fastest, directly integrated into the CPU.  
+- **L2 Cache (Level 2):** Larger than L1 but slightly slower.  
+- **L3 Cache (Level 3):** Shared among multiple CPU cores, improving data access.  
+
+### **3.3 Cache Mapping Techniques**
+Data is transferred between cache and main memory using **mapping techniques**:  
+1. **Direct Mapping:** Each memory block maps to a fixed cache location (simple but prone to conflicts).  
+2. **Fully Associative Mapping:** Any memory block can go into any cache location (flexible but expensive).  
+3. **Set-Associative Mapping:** A balance between the two, where a block can be stored in a limited number of places.  
+
+### **3.4 Cache Performance Metrics**
+- **Cache Hit:** When the CPU finds the requested data in the cache (fast).  
+- **Cache Miss:** When the data isn’t in the cache, requiring retrieval from main memory (slow).  
+- **Hit Ratio:** The percentage of memory accesses that result in a cache hit.  
+
+---
+
+## **4. Main Memory (RAM)**
+### **4.1 What is Main Memory?**
+Main memory, commonly known as **Random Access Memory (RAM)**, temporarily stores programs and data that the CPU actively uses.  
+
+### **4.2 Types of RAM**
+- **SRAM (Static RAM):** Faster and used for cache memory (expensive).  
+- **DRAM (Dynamic RAM):** Slower but cheaper, used for system memory.  
+
+### **4.3 Memory Performance Factors**
+- **Access Time:** Time taken to read/write data.  
+- **Bandwidth:** Amount of data transferred per second.  
+- **Latency:** Delay in memory response.  
+
+---
+
+## **5. Virtual Memory**
+### **5.1 What is Virtual Memory?**
+Virtual memory is a **technique that allows the system to use disk space as an extension of RAM**. It enables larger programs to run efficiently even with limited physical memory.  
+
+### **5.2 How Virtual Memory Works**
+- When RAM is full, the system moves data to a **swap file (page file)** on the hard disk.  
+- When needed, the data is brought back to RAM, replacing older data.  
+
+### **5.3 Key Components of Virtual Memory**
+- **Paging:** Divides memory into fixed-sized pages to manage allocation.  
+- **Page Table:** Maps virtual memory addresses to physical addresses.  
+- **Page Fault:** Occurs when data is not in RAM and must be loaded from disk (slow process).  
+
+### **5.4 Virtual Memory vs Physical Memory**
+| Feature | Virtual Memory | Physical Memory (RAM) |
+|---------|---------------|----------------------|
+| Location | Hard disk (swap file) | RAM (main memory) |
+| Speed | Slow | Fast |
+| Size | Large | Limited by hardware |
+
+---
+
+## **6. Memory Management Techniques**
+To optimize performance, operating systems use different **memory management techniques**.
+
+### **6.1 Paging**
+- Divides memory into **fixed-sized blocks (pages)**.  
+- Prevents fragmentation and allows efficient memory allocation.  
+
+### **6.2 Segmentation**
+- Divides memory into **variable-sized segments** based on program structure.  
+- Useful for organizing code, data, and stack separately.  
+
+### **6.3 Demand Paging**
+- Loads only the necessary parts of a program into memory to reduce RAM usage.  
+
+### **6.4 Replacement Algorithms**
+When memory is full, the system decides which page to replace using:  
+- **FIFO (First-In-First-Out):** Removes the oldest page.  
+- **LRU (Least Recently Used):** Removes the least accessed page.  
+- **Optimal Algorithm:** Removes the page that will not be used for the longest time.  
+
+---
+
+## **7. Performance Optimization and System Efficiency**
+### **7.1 Optimizing Memory Performance**
+To ensure high-speed memory operations, the system uses:  
+- **Prefetching:** Loads data before it's needed.  
+- **Memory Interleaving:** Splits memory into modules for parallel access.  
+- **Multi-Level Caching:** Uses L1, L2, and L3 caches to minimize delays.  
+
+### **7.2 Trade-offs in Memory Hierarchy**
+| Factor | Cache Memory | RAM | Virtual Memory |
+|--------|-------------|-----|---------------|
+| Speed | Fastest | Moderate | Slow |
+| Cost | Expensive | Moderate | Cheap |
+| Size | Small | Medium | Large |
+
+### **7.3 Balancing Speed and Cost**
+A well-designed memory hierarchy balances **cost-effectiveness** and **speed** to enhance system performance.
+
+---
+
+## **8. Summary**
+- **Memory hierarchy** balances speed, cost, and storage capacity.  
+- **Cache memory** improves access times by storing frequently used data.  
+- **Main memory (RAM)** provides active program storage.  
+- **Virtual memory** extends RAM using disk space.  
+- **Memory management techniques** (paging, segmentation) optimize system performance.  
+
+This knowledge is crucial for understanding **computer architecture and system performance optimization**. 🚀  
+
+Would you like practice questions or examples? 😊