Revert "[EVM] Improve code generation for conditional jumps"

akiramenai · akiramenai · commit 4f5a672bdfb4 · 2025-07-30T16:44:04.000+02:00
This reverts commit 1df3586.
diff --git a/llvm/lib/Target/EVM/CMakeLists.txt b/llvm/lib/Target/EVM/CMakeLists.txt
@@ -36,18 +36,17 @@ add_llvm_target(EVMCodeGen
   EVMMachineFunctionInfo.cpp
   EVMMarkRecursiveFunctions.cpp
   EVMMCInstLower.cpp
-  EVMMachineFunctionInfo.cpp
   EVMOptimizeLiveIntervals.cpp
   EVMRegColoring.cpp
   EVMRegisterInfo.cpp
   EVMSHA3ConstFolding.cpp
   EVMSingleUseExpression.cpp
   EVMSplitCriticalEdges.cpp
-  EVMStackModel.cpp
-  EVMStackShuffler.cpp
   EVMStackSolver.cpp
+  EVMStackModel.cpp
   EVMStackify.cpp
   EVMStackifyCodeEmitter.cpp
+  EVMStackShuffler.cpp
   EVMSubtarget.cpp
   EVMTargetMachine.cpp
   EVMTargetTransformInfo.cpp
@@ -70,6 +69,8 @@ add_llvm_target(EVMCodeGen
   Target
   TargetParser
   TransformUtils
+  EVMDesc
+  EVMInfo
 
   ADD_TO_COMPONENT
   EVM
diff --git a/llvm/lib/Target/EVM/EVMInstrInfo.td b/llvm/lib/Target/EVM/EVMInstrInfo.td
@@ -421,17 +421,10 @@ let isBarrier = 1 in {
 } // isBarrier = 1
 } // isBranch = 1, isTerminator = 1
 
-def : Pat<(brcond (setcc GPR:$src, 0, SETNE), bb:$dst),
-           (JUMPI bb:$dst, GPR:$src)>;
-def : Pat<(brcond (setcc GPR:$rs0, GPR:$rs1, SETEQ), bb:$dst),
-           (JUMPI bb:$dst, (EQ GPR:$rs0, GPR:$rs1))>;
-def : Pat<(brcond (setcc GPR:$rs0, GPR:$rs1, SETNE), bb:$dst),
-           (JUMPI bb:$dst, (SUB GPR:$rs1, GPR:$rs0))>;
-
 def : Pat<(brcond (setcc GPR:$src, 0, SETEQ), bb:$dst),
            (JUMP_UNLESS bb:$dst, GPR:$src)>;
-def : Pat<(brcond (setcc GPR:$src, -1, SETGT), bb:$dst),
-           (JUMP_UNLESS bb:$dst, (LT GPR:$src, (CONST_I256 0)))>;
+def : Pat<(brcond (setcc GPR:$rs0, GPR:$rs1, SETNE), bb:$dst),
+           (JUMP_UNLESS bb:$dst, (EQ GPR:$rs0, GPR:$rs1))>;
 def : Pat<(brcond (setcc GPR:$rs0, GPR:$rs1, SETGE), bb:$dst),
            (JUMP_UNLESS bb:$dst, (LT GPR:$rs0, GPR:$rs1))>;
 def : Pat<(brcond (setcc GPR:$rs0, GPR:$rs1, SETLE), bb:$dst),
diff --git a/llvm/lib/Target/EVM/EVMLowerJumpUnless.cpp b/llvm/lib/Target/EVM/EVMLowerJumpUnless.cpp
@@ -14,20 +14,14 @@
 #include "EVMMachineFunctionInfo.h"
 #include "EVMSubtarget.h"
 #include "MCTargetDesc/EVMMCTargetDesc.h"
-#include "llvm/ADT/Statistic.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/Support/CodeGen.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetOptions.h"
 
 using namespace llvm;
 
 #define DEBUG_TYPE "evm-lower-jump-unless"
 #define EVM_LOWER_JUMP_UNLESS_NAME "EVM Lower jump_unless"
 
-STATISTIC(NumPseudoJumpUnlessFolded, "Number of PseudoJUMP_UNLESS folded");
-
 namespace {
 class EVMLowerJumpUnless final : public MachineFunctionPass {
 public:
@@ -72,51 +66,14 @@ static void lowerJumpUnless(MachineInstr &MI, const EVMInstrInfo *TII,
       .addReg(NewReg);
 }
 
-/// Fold `<PrevMI> ; PseudoJUMP_UNLESS` into `PseudoJUMPI`.
-///
-/// Supported `PrevMI` patterns and changes:
-///   • `ISZERO_S` -> delete `ISZERO_S`
-///   • `EQ_S`     -> change to `SUB_S`
-///   • `SUB_S`    -> change to `EQ_S`
-///
-/// Returns `true` if any fold was performed.
-static bool tryFoldJumpUnless(MachineInstr &MI, const EVMInstrInfo *TII) {
-  auto I = MachineBasicBlock::iterator(&MI);
-  auto *PrevMI = I == MI.getParent()->begin() ? nullptr : &*std::prev(I);
-  bool CanFold = PrevMI && (PrevMI->getOpcode() == EVM::ISZERO_S ||
-                            PrevMI->getOpcode() == EVM::EQ_S ||
-                            PrevMI->getOpcode() == EVM::SUB_S);
-
-  if (!CanFold)
-    return false;
-
-  ++NumPseudoJumpUnlessFolded;
-
-  if (PrevMI->getOpcode() == EVM::ISZERO_S)
-    PrevMI->eraseFromParent();
-  else if (PrevMI->getOpcode() == EVM::EQ_S)
-    PrevMI->setDesc(TII->get(EVM::SUB_S));
-  else if (PrevMI->getOpcode() == EVM::SUB_S)
-    PrevMI->setDesc(TII->get(EVM::EQ_S));
-  return true;
-}
-
-/// Lower a `PseudoJUMP_UNLESS` to condition-setting + `PseudoJUMPI`.
-///
-/// If `FoldJumps` is enabled and the local pattern allows it, an
-/// optimisation in `tryFoldJumpUnless` removes the explicit `ISZERO_S`.
-/// Otherwise the pseudo-op expands to:
-///     ISZERO_S
-///     PseudoJUMPI
+// Lower pseudo jump_unless into iszero and jumpi instructions. This pseudo
+// instruction can only be present in stackified functions.
 static void lowerPseudoJumpUnless(MachineInstr &MI, const EVMInstrInfo *TII,
-                                  const bool IsStackified,
-                                  const bool FoldJumps) {
+                                  const bool IsStackified) {
   assert(IsStackified && "Found pseudo jump_unless in non-stackified function");
   assert(MI.getNumExplicitOperands() == 1 &&
          "Unexpected number of operands in pseudo jump_unless");
-
-  if (!FoldJumps || !tryFoldJumpUnless(MI, TII))
-    BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(EVM::ISZERO_S));
+  BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(EVM::ISZERO_S));
   BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(EVM::PseudoJUMPI))
       .add(MI.getOperand(0));
 }
@@ -127,32 +84,24 @@ bool EVMLowerJumpUnless::runOnMachineFunction(MachineFunction &MF) {
            << "********** Function: " << MF.getName() << '\n';
   });
 
-  CodeGenOptLevel OptLevel = MF.getTarget().getOptLevel();
   MachineRegisterInfo &MRI = MF.getRegInfo();
   const auto *TII = MF.getSubtarget<EVMSubtarget>().getInstrInfo();
   const bool IsStackified =
       MF.getInfo<EVMMachineFunctionInfo>()->getIsStackified();
 
   bool Changed = false;
   for (MachineBasicBlock &MBB : MF) {
-    auto TermIt = MBB.getFirstInstrTerminator();
-    if (TermIt == MBB.end())
-      continue;
-
-    switch (TermIt->getOpcode()) {
-    case EVM::PseudoJUMP_UNLESS:
-      lowerPseudoJumpUnless(*TermIt, TII, IsStackified,
-                            OptLevel != CodeGenOptLevel::None);
-      break;
-    case EVM::JUMP_UNLESS:
-      lowerJumpUnless(*TermIt, TII, IsStackified, MRI);
-      break;
-    default:
-      continue;
+    for (auto &MI : make_early_inc_range(MBB)) {
+      if (MI.getOpcode() == EVM::PseudoJUMP_UNLESS)
+        lowerPseudoJumpUnless(MI, TII, IsStackified);
+      else if (MI.getOpcode() == EVM::JUMP_UNLESS)
+        lowerJumpUnless(MI, TII, IsStackified, MRI);
+      else
+        continue;
+
+      MI.eraseFromParent();
+      Changed = true;
     }
-
-    TermIt->eraseFromParent();
-    Changed = true;
   }
   return Changed;
 }
diff --git a/llvm/lib/Target/EVM/EVMTargetMachine.cpp b/llvm/lib/Target/EVM/EVMTargetMachine.cpp
@@ -48,14 +48,10 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeEVMTarget() {
   // Register the target.
   const RegisterTargetMachine<EVMTargetMachine> X(getTheEVMTarget());
   auto &PR = *PassRegistry::getPassRegistry();
-  initializeEVMAAWrapperPassPass(PR);
-  initializeEVMAllocaHoistingPass(PR);
-  initializeEVMBPStackificationPass(PR);
   initializeEVMCodegenPreparePass(PR);
-  initializeEVMExternalAAWrapperPass(PR);
+  initializeEVMAllocaHoistingPass(PR);
   initializeEVMLinkRuntimePass(PR);
   initializeEVMLowerIntrinsicsPass(PR);
-  initializeEVMLowerJumpUnlessPass(PR);
   initializeEVMOptimizeLiveIntervalsPass(PR);
   initializeEVMRegColoringPass(PR);
   initializeEVMSingleUseExpressionPass(PR);
diff --git a/llvm/test/CodeGen/EVM/br.ll b/llvm/test/CodeGen/EVM/br.ll
@@ -8,9 +8,10 @@ define i256 @diamond(i256 %rs1, i256 %rs2) nounwind {
 ; CHECK-LABEL: diamond:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    JUMPDEST
-; CHECK-NEXT:    DUP1
-; CHECK-NEXT:    DUP3
-; CHECK-NEXT:    SUB
+; CHECK-NEXT:    DUP2
+; CHECK-NEXT:    DUP2
+; CHECK-NEXT:    EQ
+; CHECK-NEXT:    ISZERO
 ; CHECK-NEXT:    PUSH4 @.BB0_2
 ; CHECK-NEXT:    JUMPI
 ; CHECK-NEXT:  ; %bb.1: ; %true_bb
diff --git a/llvm/test/CodeGen/EVM/brcond.ll b/llvm/test/CodeGen/EVM/brcond.ll
@@ -12,7 +12,8 @@ define void @br_eq(i256 %a, i256 %b) {
 ; CHECK-NEXT:    JUMPDEST
 ; CHECK-NEXT:    SWAP2
 ; CHECK-NEXT:    POP
-; CHECK-NEXT:    SUB
+; CHECK-NEXT:    EQ
+; CHECK-NEXT:    ISZERO
 ; CHECK-NEXT:    PUSH4 @.BB0_2
 ; CHECK-NEXT:    JUMPI
 ; CHECK-NEXT:  ; %bb.1: ; %true
@@ -226,6 +227,9 @@ define void @br_eq_0(i256 %a) {
 ; CHECK-NEXT:    JUMPDEST
 ; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    POP
+; CHECK-NEXT:    PUSH0
+; CHECK-NEXT:    EQ
+; CHECK-NEXT:    ISZERO
 ; CHECK-NEXT:    PUSH4 @.BB10_2
 ; CHECK-NEXT:    JUMPI
 ; CHECK-NEXT:  ; %bb.1: ; %true
@@ -325,6 +329,9 @@ define void @br_ule_0(i256 %a) {
 ; CHECK-NEXT:    JUMPDEST
 ; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    POP
+; CHECK-NEXT:    PUSH0
+; CHECK-NEXT:    EQ
+; CHECK-NEXT:    ISZERO
 ; CHECK-NEXT:    PUSH4 @.BB15_2
 ; CHECK-NEXT:    JUMPI
 ; CHECK-NEXT:  ; %bb.1: ; %true
@@ -384,11 +391,13 @@ define void @br_slt_0(i256 %a) {
 ; CHECK-LABEL: br_slt_0:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    JUMPDEST
-; CHECK-NEXT:    PUSH0
-; CHECK-NEXT:    SWAP2
+; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    POP
-; CHECK-NEXT:    SLT
-; CHECK-NEXT:    ISZERO
+; CHECK-NEXT:    PUSH1 0x1
+; CHECK-NEXT:    PUSH0
+; CHECK-NEXT:    SUB
+; CHECK-NEXT:    SWAP1
+; CHECK-NEXT:    SGT
 ; CHECK-NEXT:    PUSH4 @.BB18_2
 ; CHECK-NEXT:    JUMPI
 ; CHECK-NEXT:  ; %bb.1: ; %true
diff --git a/llvm/test/CodeGen/EVM/lower-jump-unless.mir b/llvm/test/CodeGen/EVM/lower-jump-unless.mir
diff --git a/llvm/test/CodeGen/EVM/select.ll b/llvm/test/CodeGen/EVM/select.ll
@@ -12,6 +12,8 @@ define i256 @select(i256 %v1, i256 %v2, i256 %v3, i256 %v4) {
 ; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    SWAP3
 ; CHECK-NEXT:    EQ
+; CHECK-NEXT:    ISZERO
+; CHECK-NEXT:    ISZERO
 ; CHECK-NEXT:    PUSH4 @.BB0_2
 ; CHECK-NEXT:    JUMPI
 ; CHECK-NEXT:  ; %bb.1:
