prover: enforce load/store memory alignment in AIR

[Kuhai9801]

Context

Fixes #605.

The VM rejects unaligned halfword and word memory accesses, but the load/store AIR did not enforce that same rule. That meant a forged trace could describe memory behavior that the VM itself would reject.

This PR makes the load/store AIR enforce the same alignment semantics as the VM for:

• LH, LHU, SH halfword accesses
• LW, SW word accesses

What changed

• Added RamBaseAddrAlignmentQuotient, a small witness for the low byte of RamBaseAddr divided by the required alignment.
• Filled that witness only for halfword and word load/store rows.
• Added LoadStoreChip constraints so:
  • halfword rows must satisfy addr_low = 2 * q
  • word rows must satisfy addr_low = 4 * q
• Reused the existing Range128Chip lookup to prove q is an actual small integer, not an arbitrary field value.
• Added focused regression tests for unaligned LH, LW, and SH, plus aligned acceptance checks for LH and LW.

Review notes

The range check is the key part of the fix. Without it, the equality constraint alone would still allow a forged trace to use a fractional field value for q. With q constrained to [0, 127], the equations force the low address byte to be correctly aligned.

RamBaseAddr limbs are already byte-ranged elsewhere, so enforcing the low byte is enough for these alignment rules.

Verification

Ran locally with the pinned nightly-2025-05-09-x86_64-pc-windows-gnu toolchain:

• cargo fmt --all --check
• cargo test -p nexus-vm-prover aligned -- --nocapture

The focused test run passed with 4 tests passing and 0 failures. The rejection tests intentionally catch AIR constraint failures from malformed traces, so the panic messages printed during those tests are expected.

[github-actions]

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[Kuhai9801]

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[Kuhai9801]

I have read the CLA Document and I hereby sign the CLA

[Kuhai9801]

recheck

[Kuhai9801]

Hi @sjudson @slumber, could either of you review this when possible? I can’t request reviewers directly on this repo. Thanks!