@@ -580,8 +580,8 @@ pn53x_decode_target_data(const uint8_t *pbtRawData, size_t szRawData, pn53x_type
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case NMT_ISO14443BICLASS :
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// Store the UID
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- for (uint8_t i = 0 ; i < 8 ; ++ i )
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- pnti -> nhi .abtUID [7 - i ]= pbtRawData [i ];
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+ for (uint8_t i = 0 ; i < 8 ; ++ i )
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+ pnti -> nhi .abtUID [7 - i ] = pbtRawData [i ];
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break ;
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case NMT_ISO14443B2CT :
@@ -1060,51 +1060,51 @@ pn53x_initiator_init(struct nfc_device *pnd)
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// iclass requires special modulation settings
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void pn53x_initiator_init_iclass_modulation (struct nfc_device * pnd )
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{
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- // send a bunch of low level commands reverse engineered from a working iClass reader
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- // original device was using a PN512
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- //
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- // // TxModeReg - Defines the data rate and framing during transmission.
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- //// set bit 4 for target mode? - RxWaitRF Set to logic 1, the counter for RxWait starts only if an external RF field is detected in Target mode for NFCIP-1 or in Card Communication mode
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- //pn512_write_register(0x12, "\x03", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_TxMode , 0x03 );
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- //
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- // // RxModeReg - Defines the data rate and framing during reception.
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- //pn512_write_register(0x13, "\x03", 1, false);
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- // addy changed to set bit 3 - RxNoErr (put data in fifo before flagging read end)
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- //pn512_write_register(0x13, "\x0B", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_RxMode , 0x0B );
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-
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- // ManualRCVReg - Allows manual fine tuning of the internal receiver.
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- //pn512_write_register(0x1d, "\x10", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_ManualRCV , 0x10 );
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-
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- // RFCfgReg - Configures the receiver gain and RF level detector sensitivity.
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- //pn512_write_register(0x26, "\x70", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_RFCfg , 0x70 );
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-
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- // GsNOffReg - Selects the conductance for the N-driver of the antenna driver pins TX1 and TX2 when the driver is switched off.
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- //pn512_write_register(0x23, "\x88", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_GsNOFF , 0x88 );
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-
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- // GsNOnReg - Selects the conductance for the N-driver of the antenna driver pins TX1 and TX2 when the driver is switched on.
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- //pn512_write_register(0x27, "\xf8", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_GsNOn , 0xf8 );
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-
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- // CWGsPReg - Defines the conductance of the P-driver during times of no modulation.
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- //pn512_write_register(0x28, "\x3f", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_CWGsP , 0x3f );
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-
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- // ModGsPReg - Defines the driver P-output conductance during modulation.
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- //pn512_write_register(0x29, "\x10", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_ModGsP , 0x10 );
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-
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- // TReloadReg (MSB) - Describes the MSB of the 16-bit long timer reload value.
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- //pn512_write_register(0x2c, "\x69", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_TReloadVal_hi , 0x69 );
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-
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- // TReloadReg (LSB) - Describes the LSB of the 16-bit long timer reload value.
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- //pn512_write_register(0x2d, "\xf0", 1, false);
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- pn53x_WriteRegister (pnd , PN53X_REG_CIU_TReloadVal_lo , 0xf0 );
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+ // send a bunch of low level commands reverse engineered from a working iClass reader
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+ // original device was using a PN512
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+ //
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+ // // TxModeReg - Defines the data rate and framing during transmission.
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+ //// set bit 4 for target mode? - RxWaitRF Set to logic 1, the counter for RxWait starts only if an external RF field is detected in Target mode for NFCIP-1 or in Card Communication mode
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+ //pn512_write_register(0x12, "\x03", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_TxMode , 0x03 );
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+ //
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+ // // RxModeReg - Defines the data rate and framing during reception.
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+ //pn512_write_register(0x13, "\x03", 1, false);
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+ // addy changed to set bit 3 - RxNoErr (put data in fifo before flagging read end)
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+ //pn512_write_register(0x13, "\x0B", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_RxMode , 0x0B );
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+
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+ // ManualRCVReg - Allows manual fine tuning of the internal receiver.
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+ //pn512_write_register(0x1d, "\x10", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_ManualRCV , 0x10 );
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+
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+ // RFCfgReg - Configures the receiver gain and RF level detector sensitivity.
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+ //pn512_write_register(0x26, "\x70", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_RFCfg , 0x70 );
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+
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+ // GsNOffReg - Selects the conductance for the N-driver of the antenna driver pins TX1 and TX2 when the driver is switched off.
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+ //pn512_write_register(0x23, "\x88", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_GsNOFF , 0x88 );
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+
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+ // GsNOnReg - Selects the conductance for the N-driver of the antenna driver pins TX1 and TX2 when the driver is switched on.
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+ //pn512_write_register(0x27, "\xf8", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_GsNOn , 0xf8 );
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+
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+ // CWGsPReg - Defines the conductance of the P-driver during times of no modulation.
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+ //pn512_write_register(0x28, "\x3f", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_CWGsP , 0x3f );
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+
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+ // ModGsPReg - Defines the driver P-output conductance during modulation.
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+ //pn512_write_register(0x29, "\x10", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_ModGsP , 0x10 );
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+
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+ // TReloadReg (MSB) - Describes the MSB of the 16-bit long timer reload value.
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+ //pn512_write_register(0x2c, "\x69", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_TReloadVal_hi , 0x69 );
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+
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+ // TReloadReg (LSB) - Describes the LSB of the 16-bit long timer reload value.
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+ //pn512_write_register(0x2d, "\xf0", 1, false);
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+ pn53x_WriteRegister (pnd , PN53X_REG_CIU_TReloadVal_lo , 0xf0 );
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}
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int
@@ -1202,10 +1202,10 @@ pn53x_initiator_select_passive_target_ext(struct nfc_device *pnd,
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}
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szTargetsData = 6 ; // u16 UID_LSB, u8 prod code, u8 fab code, u16 UID_MSB
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} else if (nm .nmt == NMT_ISO14443BICLASS ) {
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- pn53x_initiator_init_iclass_modulation (pnd );
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- //
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+ pn53x_initiator_init_iclass_modulation (pnd );
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+ //
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// Some work to do before getting the UID...
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- // send ICLASS_ACTIVATE_ALL command - will get timeout as we don't expect response
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+ // send ICLASS_ACTIVATE_ALL command - will get timeout as we don't expect response
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uint8_t abtReqt [] = { 0x0a }; // iClass ACTIVATE_ALL
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uint8_t abtAnticol [11 ];
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if ((res = pn53x_initiator_transceive_bytes (pnd , abtReqt , sizeof (abtReqt ), NULL , 0 , timeout )) < 0 ) {
@@ -1214,35 +1214,35 @@ pn53x_initiator_select_passive_target_ext(struct nfc_device *pnd,
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// continue;
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//} else
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// return res;
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- }
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- // do select - returned anticol contains 'handle' for tag if present
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- abtReqt [0 ]= 0x0c ; // iClass SELECT
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- abtAnticol [0 ]= 0x81 ; // iClass ANTICOL
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+ }
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+ // do select - returned anticol contains 'handle' for tag if present
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+ abtReqt [0 ] = 0x0c ; // iClass SELECT
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+ abtAnticol [0 ] = 0x81 ; // iClass ANTICOL
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if ((res = pn53x_initiator_transceive_bytes (pnd , abtReqt , sizeof (abtReqt ), & abtAnticol [1 ], sizeof (abtAnticol ) - 1 , timeout )) < 0 ) {
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log_put (LOG_GROUP , LOG_CATEGORY , NFC_LOG_PRIORITY_DEBUG , "timeout on iClass anticol" );
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return res ;
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- }
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- // write back anticol handle to get UID
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+ }
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+ // write back anticol handle to get UID
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if ((res = pn53x_initiator_transceive_bytes (pnd , abtAnticol , 9 , abtTargetsData , 10 , timeout )) < 0 ) {
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log_put (LOG_GROUP , LOG_CATEGORY , NFC_LOG_PRIORITY_DEBUG , "timeout on iClass get UID" );
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return res ;
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- }
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+ }
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log_put (LOG_GROUP , LOG_CATEGORY , NFC_LOG_PRIORITY_DEBUG , "iClass raw UID: %02x %02x %02x %02x %02x %02x %02x %02x" , abtTargetsData [0 ], abtTargetsData [1 ], abtTargetsData [2 ], abtTargetsData [3 ], abtTargetsData [4 ], abtTargetsData [5 ], abtTargetsData [6 ], abtTargetsData [7 ]);
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- szTargetsData = 8 ;
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- nttmp .nm = nm ;
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- if ((res = pn53x_decode_target_data (abtTargetsData , szTargetsData , CHIP_DATA (pnd )-> type , nm .nmt , & (nttmp .nti ))) < 0 ) {
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- return res ;
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- }
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- } else {
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-
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- if ((res = pn53x_initiator_transceive_bytes (pnd , pbtInitData , szInitData , abtTargetsData , sizeof (abtTargetsData ), timeout )) < 0 ) {
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- if ((res == NFC_ERFTRANS ) && (CHIP_DATA (pnd )-> last_status_byte == 0x01 )) { // Chip timeout
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- continue ;
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- } else
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+ szTargetsData = 8 ;
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+ nttmp .nm = nm ;
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+ if ((res = pn53x_decode_target_data (abtTargetsData , szTargetsData , CHIP_DATA (pnd )-> type , nm .nmt , & (nttmp .nti ))) < 0 ) {
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return res ;
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+ }
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+ } else {
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+
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+ if ((res = pn53x_initiator_transceive_bytes (pnd , pbtInitData , szInitData , abtTargetsData , sizeof (abtTargetsData ), timeout )) < 0 ) {
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+ if ((res == NFC_ERFTRANS ) && (CHIP_DATA (pnd )-> last_status_byte == 0x01 )) { // Chip timeout
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+ continue ;
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+ } else
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+ return res ;
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+ }
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+ szTargetsData = (size_t )res ;
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}
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- szTargetsData = (size_t )res ;
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- }
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nttmp .nm = nm ;
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if ((res = pn53x_decode_target_data (abtTargetsData , szTargetsData , CHIP_DATA (pnd )-> type , nm .nmt , & (nttmp .nti ))) < 0 ) {
@@ -2249,7 +2249,7 @@ static int pn53x_ISO14443B_SR_is_present(struct nfc_device *pnd)
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static int pn53x_ISO14443B_ICLASS_is_present (struct nfc_device * pnd )
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{
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- int timeout = 300 ;
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+ int timeout = 300 ;
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log_put (LOG_GROUP , LOG_CATEGORY , NFC_LOG_PRIORITY_DEBUG , "%s" , "target_is_present(): Ping B iClass" );
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pn53x_initiator_init_iclass_modulation (pnd );
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//
@@ -2261,8 +2261,8 @@ static int pn53x_ISO14443B_ICLASS_is_present(struct nfc_device *pnd)
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log_put (LOG_GROUP , LOG_CATEGORY , NFC_LOG_PRIORITY_DEBUG , "got expected timeout on iClass activate all" );
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}
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// do select - returned anticol contains 'handle' for tag if present
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- abtReqt [0 ]= 0x0c ; // iClass SELECT
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- abtAnticol [0 ]= 0x81 ; // iClass ANTICOL
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+ abtReqt [0 ] = 0x0c ; // iClass SELECT
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+ abtAnticol [0 ] = 0x81 ; // iClass ANTICOL
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if (pn53x_initiator_transceive_bytes (pnd , abtReqt , sizeof (abtReqt ), & abtAnticol [1 ], sizeof (abtAnticol ) - 1 , timeout ) < 0 ) {
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log_put (LOG_GROUP , LOG_CATEGORY , NFC_LOG_PRIORITY_DEBUG , "timeout on iClass anticol" );
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return NFC_ETGRELEASED ;;
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