Add GitHub Pages course docs site

Author: nightt5879

.github/workflows/deploy.yml

@@ -0,0 +1,64 @@
+name: Deploy site
+
+on:
+  push:
+    branches: [main]
+  workflow_dispatch:
+
+permissions:
+  contents: read
+  pages: write
+  id-token: write
+
+concurrency:
+  group: pages
+  cancel-in-progress: false
+
+jobs:
+  build:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout
+        uses: actions/checkout@v4
+
+      - name: Setup Node
+        uses: actions/setup-node@v4
+        with:
+          node-version: 20
+          cache: npm
+          cache-dependency-path: site/package-lock.json
+
+      - name: Install dependencies
+        working-directory: site
+        run: npm ci
+
+      - name: Check
+        working-directory: site
+        run: npm run check
+
+      - name: Build
+        working-directory: site
+        run: npm run build
+
+      - name: Check links
+        working-directory: site
+        run: npm run check:links
+
+      - name: Configure Pages
+        uses: actions/configure-pages@v5
+
+      - name: Upload artifact
+        uses: actions/upload-pages-artifact@v4
+        with:
+          path: site/dist
+
+  deploy:
+    environment:
+      name: github-pages
+      url: ${{ steps.deployment.outputs.page_url }}
+    runs-on: ubuntu-latest
+    needs: build
+    steps:
+      - name: Deploy to GitHub Pages
+        id: deployment
+        uses: actions/deploy-pages@v4

.gitignore

@@ -2,3 +2,9 @@
 * text=auto
 final_product/data/
 /finial_product/data
+site/node_modules/
+site/dist/
+site/.astro/
+site/public/content-assets/
+site/src/data/content.json
+site-preview.*.log

README.md

@@ -1,4 +1,11 @@
 中文 | [English](README_EN.md)
+
+## 在线文档站
+
+### [点击这里打开网页版课程文档](https://nightt5879.github.io/FPGA/zh/)
+
+建议优先阅读网页版，图片、PDF、实验章节、ZedBoard / AX7010 内容和勘误都已经按页面整理好。
+
 - [数字集成电路前端设计与高层次综合](#数字集成电路前端设计与高层次综合)
   - [1.写在前面](#1写在前面)
     - [1.1 软件硬件环境](#11-软件硬件环境)
@@ -50,7 +57,7 @@
 
 **ZedBoard资料**
 - [ZedBoard原理图](./datasheet/AVNET%20Zedboard/zedbaord%20原理图.pdf)
-- [ZedBoard Zynq-7000 ARM FPGA进阶手册](./datasheet/AVNET%20Zedboard/ZedBoard%20Zynq-7000%20ARM%20FPGA进阶手册.pdf)
+- [ZedBoard Zynq-7000 ARM FPGA进阶手册](./datasheet/AVNET%20Zedboard/ZedBoard%20%20Zynq-7000%20ARM%20FPGA进阶级处理器%20全可编程逻辑智能互联开发系统%20用户手册.pdf)
 - [ZedBoard用户硬件手册](./datasheet/AVNET%20Zedboard/zedboard%20用户硬件手册.pdf)
 - [ZedBoard Schematic](./datasheet/AVNET%20Zedboard/ZedBoard_Schematic.pdf)
 - [ZedBoard上手手册](./datasheet/AVNET%20Zedboard/zedboard上手手册.pdf)
@@ -476,7 +483,7 @@ clogb2(DIVIDER)的作用是计算DIVIDER的二进制位数，这样就可以得
 ## 4.HLS_lab
 ## 4.1 实验1
 这个实验可以注意到有很多个版本，首先是最原始的使用vivadoHLS的版本，这个适用较老的工具。其次是Vitis HLS的版本，这个适用于较新的工具。还有最新的Vitis版本，这个版本我使用跑完了实验1同时有一个教学文档。</p>
-> **Vitis的教学文档** [Vitis开发lab1](./datasheet/lab1_vitis.pdf)
+> **Vitis的教学文档** [Vitis开发lab1](./datasheet/High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS/Vitis/Lab1.pdf)
 ## 4.2 实验2
 可与使用强制命令打开Vitis_HLS软件的项目，使用代码:</p>
 ```

README_EN.md

@@ -1,4 +1,11 @@
 [中文](README.md) | English
+
+## Online Documentation Site
+
+### [Click here to open the course website](https://nightt5879.github.io/FPGA/en/)
+
+The website is the recommended reading path. Images, PDFs, lab sections, ZedBoard / AX7010 notes, and errata are organized as browsable pages.
+
 - [Front-end Design of Digital Integrated Circuits and High-level Synthesis](#front-end-design-of-digital-integrated-circuits-and-high-level-synthesis)
   - [1. Preface](#1-preface)
     - [1.1 Software and Hardware Environment](#11-software-and-hardware-environment)
@@ -52,7 +59,7 @@ The purpose of this project is, firstly, to complete the six labs and the course
 
 **ZedBoard Documentation**
 - [ZedBoard Schematic Diagram](./datasheet/AVNET%20Zedboard/zedbaord%20原理图.pdf)
-- [ZedBoard Zynq-7000 ARM FPGA Advanced Manual](./datasheet/AVNET%20Zedboard/ZedBoard%20Zynq-7000%20ARM%20FPGA进阶手册.pdf)
+- [ZedBoard Zynq-7000 ARM FPGA Advanced Manual](./datasheet/AVNET%20Zedboard/ZedBoard%20%20Zynq-7000%20ARM%20FPGA进阶级处理器%20全可编程逻辑智能互联开发系统%20用户手册.pdf)
 - [ZedBoard User Hardware Manual](./datasheet/AVNET%20Zedboard/zedboard%20用户硬件手册.pdf)
 - [ZedBoard Schematic](./datasheet/AVNET%20Zedboard/ZedBoard_Schematic.pdf)
 - [ZedBoard Getting Started Guide](./datasheet/AVNET%20Zedboard/zedboard上手手册.pdf)
@@ -506,7 +513,7 @@ This experiment primarily teaches how to use Debug for troubleshooting, and the
 ### 4.1 Experiment 1
 This experiment has several versions. First, there is the original version using Vivado HLS, which is suitable for older tools. Then, there is the Vitis HLS version, which is for newer tools. Finally, there is the latest version for Vitis, which I used to complete Experiment 1, and I have also prepared a tutorial document for it.
 
-> **Vitis Tutorial Document** [Vitis Lab 1 Development](./datasheet/lab1_vitis.pdf)
+> **Vitis Tutorial Document** [Vitis Lab 1 Development](./datasheet/High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS/Vitis/Lab1.pdf)
 
 ### 4.2 Experiment 2 (Linux issues)
 ### 4.3 Experiment 3 (Linux issues)

site/astro.config.mjs

@@ -0,0 +1,9 @@
+import { defineConfig } from "astro/config";
+import mdx from "@astrojs/mdx";
+import react from "@astrojs/react";
+
+export default defineConfig({
+  site: "https://nightt5879.github.io",
+  base: "/FPGA",
+  integrations: [react(), mdx()],
+});