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| 1 | +/** @file |
| 2 | +
|
| 3 | + SPI Host Controller shell implementation, as host controller code is platform |
| 4 | + specfic. |
| 5 | +
|
| 6 | + Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR> |
| 7 | + SPDX-License-Identifier: BSD-2-Clause-Patent |
| 8 | +
|
| 9 | +**/ |
| 10 | +#include "SpiHc.h" |
| 11 | + |
| 12 | +/** |
| 13 | + Assert or deassert the SPI chip select. |
| 14 | +
|
| 15 | + This routine is called at TPL_NOTIFY. |
| 16 | + Update the value of the chip select line for a SPI peripheral. The SPI bus |
| 17 | + layer calls this routine either in the board layer or in the SPI controller |
| 18 | + to manipulate the chip select pin at the start and end of a SPI transaction. |
| 19 | +
|
| 20 | + @param[in] This Pointer to an EFI_SPI_HC_PROTOCOL structure. |
| 21 | + @param[in] SpiPeripheral The address of an EFI_SPI_PERIPHERAL data structure |
| 22 | + describing the SPI peripheral whose chip select pin |
| 23 | + is to be manipulated. The routine may access the |
| 24 | + ChipSelectParameter field to gain sufficient |
| 25 | + context to complete the operati on. |
| 26 | + @param[in] PinValue The value to be applied to the chip select line of |
| 27 | + the SPI peripheral. |
| 28 | +
|
| 29 | + @retval EFI_SUCCESS The chip select was set as requested |
| 30 | + @retval EFI_NOT_READY Support for the chip select is not properly |
| 31 | + initialized |
| 32 | + @retval EFI_INVALID_PARAMETER The ChipSeLect value or its contents are |
| 33 | + invalid |
| 34 | +
|
| 35 | +**/ |
| 36 | +EFI_STATUS |
| 37 | +EFIAPI |
| 38 | +ChipSelect ( |
| 39 | + IN CONST EFI_SPI_HC_PROTOCOL *This, |
| 40 | + IN CONST EFI_SPI_PERIPHERAL *SpiPeripheral, |
| 41 | + IN BOOLEAN PinValue |
| 42 | + ) |
| 43 | +{ |
| 44 | + return PlatformSpiHcChipSelect (This, SpiPeripheral, PinValue); |
| 45 | +} |
| 46 | + |
| 47 | +/** |
| 48 | + Set up the clock generator to produce the correct clock frequency, phase and |
| 49 | + polarity for a SPI chip. |
| 50 | +
|
| 51 | + This routine is called at TPL_NOTIFY. |
| 52 | + This routine updates the clock generator to generate the correct frequency |
| 53 | + and polarity for the SPI clock. |
| 54 | +
|
| 55 | + @param[in] This Pointer to an EFI_SPI_HC_PROTOCOL structure. |
| 56 | + @param[in] SpiPeripheral Pointer to a EFI_SPI_PERIPHERAL data structure from |
| 57 | + which the routine can access the ClockParameter, |
| 58 | + ClockPhase and ClockPolarity fields. The routine |
| 59 | + also has access to the names for the SPI bus and |
| 60 | + chip which can be used during debugging. |
| 61 | + @param[in] ClockHz Pointer to the requested clock frequency. The SPI |
| 62 | + host controller will choose a supported clock |
| 63 | + frequency which is less then or equal to this |
| 64 | + value. Specify zero to turn the clock generator |
| 65 | + off. The actual clock frequency supported by the |
| 66 | + SPI host controller will be returned. |
| 67 | +
|
| 68 | + @retval EFI_SUCCESS The clock was set up successfully |
| 69 | + @retval EFI_UNSUPPORTED The SPI controller was not able to support the |
| 70 | + frequency requested by ClockHz |
| 71 | +
|
| 72 | +**/ |
| 73 | +EFI_STATUS |
| 74 | +EFIAPI |
| 75 | +Clock ( |
| 76 | + IN CONST EFI_SPI_HC_PROTOCOL *This, |
| 77 | + IN CONST EFI_SPI_PERIPHERAL *SpiPeripheral, |
| 78 | + IN UINT32 *ClockHz |
| 79 | + ) |
| 80 | +{ |
| 81 | + return PlatformSpiHcClock (This, SpiPeripheral, ClockHz); |
| 82 | +} |
| 83 | + |
| 84 | +/** |
| 85 | + Perform the SPI transaction on the SPI peripheral using the SPI host |
| 86 | + controller. |
| 87 | +
|
| 88 | + This routine is called at TPL_NOTIFY. |
| 89 | + This routine synchronously returns EFI_SUCCESS indicating that the |
| 90 | + asynchronous SPI transaction was started. The routine then waits for |
| 91 | + completion of the SPI transaction prior to returning the final transaction |
| 92 | + status. |
| 93 | +
|
| 94 | + @param[in] This Pointer to an EFI_SPI_HC_PROTOCOL structure. |
| 95 | + @param[in] BusTransaction Pointer to a EFI_SPI_BUS_ TRANSACTION containing |
| 96 | + the description of the SPI transaction to perform. |
| 97 | +
|
| 98 | + @retval EFI_SUCCESS The transaction completed successfully |
| 99 | + @retval EFI_BAD_BUFFER_SIZE The BusTransaction->WriteBytes value is invalid, |
| 100 | + or the BusTransaction->ReadinBytes value is |
| 101 | + invalid |
| 102 | + @retval EFI_UNSUPPORTED The BusTransaction-> Transaction Type is |
| 103 | + unsupported |
| 104 | + @retval EFI_DEVICE_ERROR SPI Host Controller failed transaction |
| 105 | +
|
| 106 | +**/ |
| 107 | +EFI_STATUS |
| 108 | +EFIAPI |
| 109 | +Transaction ( |
| 110 | + IN CONST EFI_SPI_HC_PROTOCOL *This, |
| 111 | + IN EFI_SPI_BUS_TRANSACTION *BusTransaction |
| 112 | + ) |
| 113 | +{ |
| 114 | + return PlatformSpiHcTransaction (This, BusTransaction); |
| 115 | +} |
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