From e1694829284caddb030edb8faba8d2b32da91e39 Mon Sep 17 00:00:00 2001 From: carpall Date: Tue, 12 Oct 2021 15:06:53 +0200 Subject: [PATCH 1/3] added ability to iterate over basic block's predecessors --- llvmlite/ir/builder.py | 6 ++++++ llvmlite/ir/values.py | 4 ++++ 2 files changed, 10 insertions(+) diff --git a/llvmlite/ir/builder.py b/llvmlite/ir/builder.py index f18a8d8bd..26133c302 100644 --- a/llvmlite/ir/builder.py +++ b/llvmlite/ir/builder.py @@ -822,12 +822,17 @@ def switch(self, value, default): self._set_terminator(swt) return swt + def set_pred(self, block): + if not self.basic_block in block.predecessors: + block.predecessors.append(self.basic_block) + def branch(self, target): """ Unconditional branch to *target*. """ br = instructions.Branch(self.block, "br", [target]) self._set_terminator(br) + self.set_pred(target) return br def cbranch(self, cond, truebr, falsebr): @@ -837,6 +842,7 @@ def cbranch(self, cond, truebr, falsebr): br = instructions.ConditionalBranch(self.block, "br", [cond, truebr, falsebr]) self._set_terminator(br) + self.set_pred(truebr); self.set_pred(falsebr) return br def branch_indirect(self, addr): diff --git a/llvmlite/ir/values.py b/llvmlite/ir/values.py index 3a89076bf..b75249b4e 100644 --- a/llvmlite/ir/values.py +++ b/llvmlite/ir/values.py @@ -788,11 +788,15 @@ def __init__(self, parent, name=''): self.scope = parent.scope self.instructions = [] self.terminator = None + self.predecessors = [] @property def is_terminated(self): return self.terminator is not None + def has_predecessors(self): + return len(self.predecessors) > 0 + @property def function(self): return self.parent From b7c8ba1670b892a55ad02b8f1295f4e5080f650d Mon Sep 17 00:00:00 2001 From: carpal <65513900+Carpall@users.noreply.github.com> Date: Tue, 12 Oct 2021 16:29:17 +0200 Subject: [PATCH 2/3] removing ; --- llvmlite/ir/builder.py | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/llvmlite/ir/builder.py b/llvmlite/ir/builder.py index 26133c302..aec5557d1 100644 --- a/llvmlite/ir/builder.py +++ b/llvmlite/ir/builder.py @@ -822,7 +822,7 @@ def switch(self, value, default): self._set_terminator(swt) return swt - def set_pred(self, block): + def add_pred(self, block): if not self.basic_block in block.predecessors: block.predecessors.append(self.basic_block) @@ -832,7 +832,7 @@ def branch(self, target): """ br = instructions.Branch(self.block, "br", [target]) self._set_terminator(br) - self.set_pred(target) + self.add_pred(target) return br def cbranch(self, cond, truebr, falsebr): @@ -842,7 +842,8 @@ def cbranch(self, cond, truebr, falsebr): br = instructions.ConditionalBranch(self.block, "br", [cond, truebr, falsebr]) self._set_terminator(br) - self.set_pred(truebr); self.set_pred(falsebr) + self.add_pred(truebr) + self.add_pred(falsebr) return br def branch_indirect(self, addr): From df0454e8362866b69843c4ed6089f40fdc2c7446 Mon Sep 17 00:00:00 2001 From: carpal <65513900+Carpall@users.noreply.github.com> Date: Tue, 12 Oct 2021 16:30:20 +0200 Subject: [PATCH 3/3] fixing not in --- llvmlite/ir/builder.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvmlite/ir/builder.py b/llvmlite/ir/builder.py index aec5557d1..fe4e41006 100644 --- a/llvmlite/ir/builder.py +++ b/llvmlite/ir/builder.py @@ -823,7 +823,7 @@ def switch(self, value, default): return swt def add_pred(self, block): - if not self.basic_block in block.predecessors: + if self.basic_block not in block.predecessors: block.predecessors.append(self.basic_block) def branch(self, target):