diff --git a/arch/arm/src/stm32f7/Kconfig b/arch/arm/src/stm32f7/Kconfig
index 3d5be60bca9ac..b8197440f818e 100644
--- a/arch/arm/src/stm32f7/Kconfig
+++ b/arch/arm/src/stm32f7/Kconfig
@@ -661,7 +661,6 @@ config STM32F7_STM32F722XX
 	default n
 	select STM32F7_STM32F72XX
 	select ARCH_HAVE_FPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -679,7 +678,6 @@ config STM32F7_STM32F723XX
 	default n
 	select STM32F7_STM32F72XX
 	select ARCH_HAVE_FPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -696,7 +694,6 @@ config STM32F7_STM32F745XX
 	default n
 	select STM32F7_STM32F74XX
 	select ARCH_HAVE_FPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -716,7 +713,6 @@ config STM32F7_STM32F746XX
 	default n
 	select STM32F7_STM32F74XX
 	select ARCH_HAVE_FPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -762,7 +758,6 @@ config STM32F7_STM32F765XX
 	select STM32F7_STM32F76XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -812,7 +807,6 @@ config STM32F7_STM32F768XX # Revisit When parts released
 	select STM32F7_STM32F76XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -839,7 +833,6 @@ config STM32F7_STM32F768AX # Revisit When parts released
 	select STM32F7_STM32F76XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -865,7 +858,6 @@ config STM32F7_STM32F769XX
 	select STM32F7_STM32F76XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -892,7 +884,6 @@ config STM32F7_STM32F769AX # Revisit When parts released
 	select STM32F7_STM32F76XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -918,7 +909,6 @@ config STM32F7_STM32F777XX
 	select STM32F7_STM32F77XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -947,7 +937,6 @@ config STM32F7_STM32F778XX # Revisit when parts released
 	select STM32F7_STM32F77XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -976,7 +965,6 @@ config STM32F7_STM32F778AX
 	select STM32F7_STM32F77XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -1004,7 +992,6 @@ config STM32F7_STM32F779XX
 	select STM32F7_STM32F77XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -1033,7 +1020,6 @@ config STM32F7_STM32F779AX
 	select STM32F7_STM32F77XX
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
diff --git a/arch/arm/src/stm32f7/stm32_sdmmc.c b/arch/arm/src/stm32f7/stm32_sdmmc.c
index 3cd947b848ec7..857d5b3e5d9ff 100644
--- a/arch/arm/src/stm32f7/stm32_sdmmc.c
+++ b/arch/arm/src/stm32f7/stm32_sdmmc.c
@@ -583,10 +583,6 @@ static int  stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
               FAR uint8_t *buffer, size_t buflen);
 static int  stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
               FAR const uint8_t *buffer, size_t buflen);
-#ifdef CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
-static int  stm32_dmadelydinvldt(FAR struct sdio_dev_s *dev,
-              FAR const uint8_t *buffer, size_t buflen);
-#endif
 #endif /* CONFIG_STM32F7_SDMMC_DMA */
 
 /* Initialization/uninitialization/reset ************************************/
@@ -636,9 +632,6 @@ struct stm32_dev_s g_sdmmcdev1 =
 #endif
     .dmarecvsetup     = stm32_dmarecvsetup,
     .dmasendsetup     = stm32_dmasendsetup,
-#ifdef CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
-    .dmadelydinvldt   = stm32_dmadelydinvldt,
-#endif
 #else
 #ifdef CONFIG_ARCH_HAVE_SDIO_PREFLIGHT
     .dmapreflight     = NULL,
@@ -705,9 +698,6 @@ struct stm32_dev_s g_sdmmcdev2 =
 #endif
     .dmarecvsetup     = stm32_dmarecvsetup,
     .dmasendsetup     = stm32_dmasendsetup,
-#ifdef CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
-    .dmadelydinvldt   = stm32_dmadelydinvldt,
-#endif
 #endif
   },
   .base              = STM32_SDMMC2_BASE,
@@ -1600,7 +1590,14 @@ static void stm32_endtransfer(struct stm32_dev_s *priv,
 static int stm32_sdmmc_rdyinterrupt(int irq, void *context, void *arg)
 {
   struct stm32_dev_s *priv = (struct stm32_dev_s *)arg;
-  stm32_endwait(priv, SDIOWAIT_WRCOMPLETE);
+
+  /* Avoid noise, check the state */
+
+  if (stm32_gpioread(priv->d0_gpio))
+    {
+      stm32_endwait(priv, SDIOWAIT_WRCOMPLETE);
+    }
+
   return OK;
 }
 #endif
@@ -3102,9 +3099,7 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
   if ((uintptr_t)buffer < DTCM_START ||
       (uintptr_t)buffer + buflen > DTCM_END)
     {
-#if !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
       up_invalidate_dcache((uintptr_t)buffer, (uintptr_t)buffer + buflen);
-#endif
     }
 
   /* Start the DMA */
@@ -3177,11 +3172,7 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
   if ((uintptr_t)buffer < DTCM_START ||
       (uintptr_t)buffer + buflen > DTCM_END)
     {
-#ifdef CONFIG_ARMV7M_DCACHE_WRITETHROUGH
-      up_invalidate_dcache((uintptr_t)buffer, (uintptr_t)buffer + buflen);
-#else
-      up_flush_dcache((uintptr_t)buffer, (uintptr_t)buffer + buflen);
-#endif
+      up_clean_dcache((uintptr_t)buffer, (uintptr_t)buffer + buflen);
     }
 
   /* Save the source buffer information for use by the interrupt handler */
@@ -3220,44 +3211,6 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
 }
 #endif
 
-/****************************************************************************
- * Name: stm32_dmadelydinvldt
- *
- * Description:
- *   Delayed D-cache invalidation.
- *   This function should be called after receive DMA completion to perform
- *   D-cache invalidation. This eliminates the need for cache aligned DMA
- *   buffers when the D-cache is in store-through mode.
- *
- * Input Parameters:
- *   dev    - An instance of the SDIO device interface
- *   buffer - The memory to DMA into
- *   buflen - The size of the DMA transfer in bytes
- *
- * Returned Value:
- *   OK on success; a negated errno on failure
- *
- ****************************************************************************/
-
-#if defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT) && \
-    defined(CONFIG_STM32F7_SDMMC_DMA)
-
-static int stm32_dmadelydinvldt(FAR struct sdio_dev_s *dev,
-                              FAR const uint8_t *buffer, size_t buflen)
-{
-  /* Invaliate cache to physical memory when not in DTCM memory. */
-
-  if ((uintptr_t)buffer < DTCM_START ||
-      (uintptr_t)buffer + buflen > DTCM_END)
-    {
-      up_invalidate_dcache((uintptr_t)buffer,
-                           (uintptr_t)buffer + buflen);
-    }
-
-  return OK;
-}
-#endif
-
 /****************************************************************************
  * Name: stm32_callback
  *
diff --git a/arch/arm/src/stm32h7/Kconfig b/arch/arm/src/stm32h7/Kconfig
index 78acd8b2d001f..d7ad16f5b4749 100644
--- a/arch/arm/src/stm32h7/Kconfig
+++ b/arch/arm/src/stm32h7/Kconfig
@@ -215,7 +215,6 @@ config STM32H7_STM32H7X3XX
 	default n
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
@@ -233,7 +232,6 @@ config STM32H7_STM32H7X7XX
 	default n
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
-	select ARCH_HAVE_SDIO_DELAYED_INVLDT
 	select ARMV7M_HAVE_ICACHE
 	select ARMV7M_HAVE_DCACHE
 	select ARMV7M_HAVE_ITCM
diff --git a/arch/arm/src/stm32h7/stm32_sdmmc.c b/arch/arm/src/stm32h7/stm32_sdmmc.c
index f60a5d79121a5..2225f6cb50e4b 100644
--- a/arch/arm/src/stm32h7/stm32_sdmmc.c
+++ b/arch/arm/src/stm32h7/stm32_sdmmc.c
@@ -375,8 +375,7 @@ struct stm32_dev_s
 #endif
   uint8_t            rxfifo[FIFO_SIZE_IN_BYTES] /* To offload with IDMA */
                      __attribute__((aligned(ARMV7M_DCACHE_LINESIZE)));
-#if defined(CONFIG_ARMV7M_DCACHE) && defined(CONFIG_STM32H7_SDMMC_IDMA) && \
-    !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
+#if defined(CONFIG_ARMV7M_DCACHE) && defined(CONFIG_STM32H7_SDMMC_IDMA)
   bool               unaligned_rx; /* read buffer is not cache-line aligned */
 #endif
 };
@@ -448,8 +447,7 @@ static void stm32_datadisable(struct stm32_dev_s *priv);
 #ifndef CONFIG_STM32H7_SDMMC_IDMA
 static void stm32_sendfifo(struct stm32_dev_s *priv);
 static void stm32_recvfifo(struct stm32_dev_s *priv);
-#elif defined(CONFIG_ARMV7M_DCACHE) && \
-      !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
+#elif defined(CONFIG_ARMV7M_DCACHE)
 static void stm32_recvdma(struct stm32_dev_s *priv);
 #endif
 static void stm32_eventtimeout(wdparm_t arg);
@@ -527,10 +525,6 @@ static int  stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
                                FAR uint8_t *buffer, size_t buflen);
 static int  stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
                                FAR const uint8_t *buffer, size_t buflen);
-#  if defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
-static int  stm32_dmadelydinvldt(FAR struct sdio_dev_s *dev,
-              FAR const uint8_t *buffer, size_t buflen);
-#  endif
 #endif
 
 /* Initialization/uninitialization/reset ************************************/
@@ -583,9 +577,6 @@ struct stm32_dev_s g_sdmmcdev1 =
 #  endif
     .dmarecvsetup     = stm32_dmarecvsetup,
     .dmasendsetup     = stm32_dmasendsetup,
-#  if defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
-    .dmadelydinvldt   = stm32_dmadelydinvldt,
-#  endif
 #endif
   },
   .base              = STM32_SDMMC1_BASE,
@@ -640,9 +631,6 @@ struct stm32_dev_s g_sdmmcdev2 =
 #  endif
     .dmarecvsetup     = stm32_dmarecvsetup,
     .dmasendsetup     = stm32_dmasendsetup,
-#  if defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
-    .dmadelydinvldt   = stm32_dmadelydinvldt,
-#  endif
 #endif
   },
   .base              = STM32_SDMMC2_BASE,
@@ -662,8 +650,7 @@ static struct stm32_sampleregs_s g_sampleregs[DEBUG_NSAMPLES];
 #endif
 
 /* Input dma buffer for unaligned transfers */
-#if defined(CONFIG_ARMV7M_DCACHE) && defined(CONFIG_STM32H7_SDMMC_IDMA) && \
-    !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
+#if defined(CONFIG_ARMV7M_DCACHE) && defined(CONFIG_STM32H7_SDMMC_IDMA)
 static uint8_t sdmmc_rxbuffer[SDMMC_MAX_BLOCK_SIZE]
 __attribute__((aligned(ARMV7M_DCACHE_LINESIZE)));
 #endif
@@ -1145,8 +1132,7 @@ static void stm32_dataconfig(struct stm32_dev_s *priv, uint32_t timeout,
     {
       DEBUGASSERT((dlen % priv->blocksize) == 0);
 
-#if defined(CONFIG_STM32H7_SDMMC_IDMA) && defined(CONFIG_ARMV7M_DCACHE) && \
-    !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
+#if defined(CONFIG_STM32H7_SDMMC_IDMA) && defined(CONFIG_ARMV7M_DCACHE)
       /* If cache is enabled, and this is an unaligned receive,
        * receive one block at a time to the internal buffer
        */
@@ -1348,8 +1334,7 @@ static void stm32_recvfifo(struct stm32_dev_s *priv)
  *
  ****************************************************************************/
 
-#if defined (CONFIG_STM32H7_SDMMC_IDMA) && defined(CONFIG_ARMV7M_DCACHE) && \
-    !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
+#if defined (CONFIG_STM32H7_SDMMC_IDMA) && defined(CONFIG_ARMV7M_DCACHE)
 static void stm32_recvdma(struct stm32_dev_s *priv)
 {
   uint32_t dctrl;
@@ -1606,7 +1591,14 @@ static void stm32_sdmmc_fifo_monitor(FAR void *arg)
 static int stm32_sdmmc_rdyinterrupt(int irq, void *context, void *arg)
 {
   struct stm32_dev_s *priv = (struct stm32_dev_s *)arg;
-  stm32_endwait(priv, SDIOWAIT_WRCOMPLETE);
+
+  /* Avoid noise, check the state */
+
+  if (stm32_gpioread(priv->d0_gpio))
+    {
+      stm32_endwait(priv, SDIOWAIT_WRCOMPLETE);
+    }
+
   return OK;
 }
 #endif
@@ -1709,8 +1701,7 @@ static int stm32_sdmmc_interrupt(int irq, void *context, void *arg)
                   memcpy(priv->buffer, priv->rxfifo, priv->remaining);
                 }
 #else
-#  if defined(CONFIG_ARMV7M_DCACHE) && \
-      !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
+#  if defined(CONFIG_ARMV7M_DCACHE)
               if (priv->receivecnt)
                 {
                   /* Invalidate dcache, and copy the received data into
@@ -3056,8 +3047,9 @@ static int stm32_registercallback(FAR struct sdio_dev_s *dev,
 static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
                               FAR const uint8_t *buffer, size_t buflen)
 {
+#if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
   struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
-
+#endif
   DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
 
   /* IDMA must be possible to the buffer */
@@ -3080,7 +3072,7 @@ static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
     }
 #endif
 
-#  if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
+#if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
   /* buffer alignment is required for DMA transfers with dcache in buffered
    * mode (not write-through) because a) arch_invalidate_dcache could lose
    * buffered writes and b) arch_flush_dcache could corrupt adjacent memory
@@ -3097,7 +3089,7 @@ static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
             buffer, buffer + buflen - 1);
       return -EFAULT;
     }
-#  endif
+#endif
 
   return 0;
 }
@@ -3129,11 +3121,11 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
   struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
 
   DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
-#  if defined(CONFIG_ARCH_HAVE_SDIO_PREFLIGHT)
+#if defined(CONFIG_ARCH_HAVE_SDIO_PREFLIGHT)
   DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
-#  else
-#    if defined(CONFIG_ARMV7M_DCACHE) && \
-        !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
+#endif
+
+#if defined(CONFIG_ARMV7M_DCACHE)
   if (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE - 1)) != 0 ||
        (buflen & (ARMV7M_DCACHE_LINESIZE - 1)) != 0)
     {
@@ -3153,8 +3145,7 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
 
       priv->unaligned_rx = false;
     }
-#    endif
-#  endif
+#endif
 
   /* Reset the DPSM configuration */
 
@@ -3180,15 +3171,14 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev,
 
   /* Configure the RX DMA */
 
-#  if defined(CONFIG_ARMV7M_DCACHE) && \
-      !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
+#if defined(CONFIG_ARMV7M_DCACHE)
   if (priv->unaligned_rx)
     {
       sdmmc_putreg32(priv, (uintptr_t)sdmmc_rxbuffer,
                      STM32_SDMMC_IDMABASE0R_OFFSET);
     }
   else
-#  endif
+#endif
     {
       sdmmc_putreg32(priv, (uintptr_t)priv->buffer,
                      STM32_SDMMC_IDMABASE0R_OFFSET);
@@ -3232,14 +3222,13 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
   struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
 
   DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
-#  if defined(CONFIG_ARCH_HAVE_SDIO_PREFLIGHT)
+#if defined(CONFIG_ARCH_HAVE_SDIO_PREFLIGHT)
   DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
-#  endif
+#endif
 
-#  if defined(CONFIG_ARMV7M_DCACHE) && \
-      !defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
+#if defined(CONFIG_ARMV7M_DCACHE)
   priv->unaligned_rx = false;
-#  endif
+#endif
 
   /* Reset the DPSM configuration */
 
@@ -3252,14 +3241,14 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
 
   /* Flush cache to physical memory when not in DTCM memory */
 
-#  if defined(CONFIG_ARMV7M_DCACHE) && \
+#if defined(CONFIG_ARMV7M_DCACHE) && \
       !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
   if ((uintptr_t)buffer < DTCM_START ||
       (uintptr_t)buffer + buflen > DTCM_END)
     {
       up_clean_dcache((uintptr_t)buffer, (uintptr_t)buffer + buflen);
     }
-#  endif
+#endif
 
   /* Save the source buffer information for use by the interrupt handler */
 
@@ -3288,43 +3277,6 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
 }
 #endif
 
-/****************************************************************************
- * Name: stm32_dmadelydinvldt
- *
- * Description:
- *   Delayed D-cache invalidation.
- *   This function should be called after receive DMA completion to perform
- *   D-cache invalidation. This eliminates the need for cache aligned DMA
- *   buffers when the D-cache is in store-through mode.
- *
- * Input Parameters:
- *   dev    - An instance of the SDIO device interface
- *   buffer - The memory to DMA into
- *   buflen - The size of the DMA transfer in bytes
- *
- * Returned Value:
- *   OK on success; a negated errno on failure
- *
- ****************************************************************************/
-
-#if defined(CONFIG_STM32H7_SDMMC_IDMA) && \
-    defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
-static int stm32_dmadelydinvldt(FAR struct sdio_dev_s *dev,
-                              FAR const uint8_t *buffer, size_t buflen)
-{
-  /* Invalidate cache to physical memory when not in DTCM memory. */
-
-  if ((uintptr_t)buffer < DTCM_START ||
-      (uintptr_t)buffer + buflen > DTCM_END)
-    {
-      up_invalidate_dcache((uintptr_t)buffer,
-                           (uintptr_t)buffer + buflen);
-    }
-
-  return OK;
-}
-#endif
-
 /****************************************************************************
  * Name: stm32_callback
  *
@@ -3457,11 +3409,11 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
 
       priv = &g_sdmmcdev1;
 
-#  if defined(CONFIG_SDMMC1_WIDTH_D1_ONLY)
+#if defined(CONFIG_SDMMC1_WIDTH_D1_ONLY)
       priv->onebit = true;
-#  else
+#else
       priv->onebit = false;
-#  endif
+#endif
 
       /* Configure GPIOs for 4-bit, wide-bus operation (the chip is capable
        * of 8-bit wide bus operation but D4-D7 are not configured).
@@ -3470,16 +3422,16 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
        * utility in the scope of the board support package.
        */
 
-#  ifndef CONFIG_SDIO_MUXBUS
+#ifndef CONFIG_SDIO_MUXBUS
       stm32_configgpio(SDMMC1_SDIO_PULL(GPIO_SDMMC1_D0));
-#    ifndef CONFIG_SDMMC1_WIDTH_D1_ONLY
+#  ifndef CONFIG_SDMMC1_WIDTH_D1_ONLY
       stm32_configgpio(SDMMC1_SDIO_PULL(GPIO_SDMMC1_D1));
       stm32_configgpio(SDMMC1_SDIO_PULL(GPIO_SDMMC1_D2));
       stm32_configgpio(SDMMC1_SDIO_PULL(GPIO_SDMMC1_D3));
-#    endif
+#  endif
       stm32_configgpio(GPIO_SDMMC1_CK);
       stm32_configgpio(SDMMC1_SDIO_PULL(GPIO_SDMMC1_CMD));
-#  endif
+#endif
     }
   else
 #endif
diff --git a/drivers/mmcsd/Kconfig b/drivers/mmcsd/Kconfig
index 9dee5c1d09d3a..529d1331ea2c3 100644
--- a/drivers/mmcsd/Kconfig
+++ b/drivers/mmcsd/Kconfig
@@ -17,10 +17,6 @@ config ARCH_HAVE_SDIO_PREFLIGHT
 	bool
 	default n
 
-config ARCH_HAVE_SDIO_DELAYED_INVLDT
-	bool
-	default n
-
 menuconfig MMCSD
 	bool "MMC/SD Driver Support"
 	default n
diff --git a/drivers/mmcsd/mmcsd_sdio.c b/drivers/mmcsd/mmcsd_sdio.c
index 7d6ccb38f41b8..00186957ca882 100644
--- a/drivers/mmcsd/mmcsd_sdio.c
+++ b/drivers/mmcsd/mmcsd_sdio.c
@@ -1477,9 +1477,6 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
 
   ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
                         MMCSD_BLOCK_RDATADELAY);
-#ifdef CONFIG_SDIO_DMA
-  SDIO_DMADELYDINVLDT(priv->dev, buffer, priv->blocksize);
-#endif
   if (ret != OK)
     {
       ferr("ERROR: CMD17 transfer failed: %d\n", ret);
@@ -1623,9 +1620,6 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
   /* Send STOP_TRANSMISSION */
 
   ret = mmcsd_stoptransmission(priv);
-#ifdef CONFIG_SDIO_DMA
-  SDIO_DMADELYDINVLDT(priv->dev, buffer, priv->blocksize * nblocks);
-#endif
 
   if (ret != OK)
     {
@@ -2886,9 +2880,6 @@ static int mmcsd_read_csd(FAR struct mmcsd_state_s *priv)
 
   ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
                         MMCSD_BLOCK_RDATADELAY);
-#ifdef CONFIG_SDIO_DMA
-  SDIO_DMADELYDINVLDT(priv->dev, buffer, 512);
-#endif
   if (ret != OK)
     {
       ferr("ERROR: CMD17 transfer failed: %d\n", ret);
diff --git a/include/nuttx/sdio.h b/include/nuttx/sdio.h
index 977df5bd5b87e..befd694147bb7 100644
--- a/include/nuttx/sdio.h
+++ b/include/nuttx/sdio.h
@@ -809,31 +809,6 @@
 #  define SDIO_DMARECVSETUP(dev,buffer,len) (-ENOSYS)
 #endif
 
-/****************************************************************************
- * Name: SDIO_DMADELYDINVLDT
- *
- * Description:
- *   Delayed D-cache invalidation.
- *   This function should be called after receive DMA completion to perform
- *   D-cache invalidation. This eliminates the need for cache aligned DMA
- *   buffers when the D-cache is in store-through mode.
- *
- * Input Parameters:
- *   dev    - An instance of the SDIO device interface
- *   buffer - The memory to DMA from
- *   buflen - The size of the DMA transfer in bytes
- *
- * Returned Value:
- *   OK on success; a negated errno on failure
- *
- ****************************************************************************/
-
-#if defined(CONFIG_SDIO_DMA) && defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
-#  define SDIO_DMADELYDINVLDT(dev,buffer,len) ((dev)->dmadelydinvldt(dev,buffer,len))
-#else
-#  define SDIO_DMADELYDINVLDT(dev,buffer,len) (OK)
-#endif
-
 /****************************************************************************
  * Name: SDIO_DMASENDSETUP
  *
@@ -969,10 +944,6 @@ struct sdio_dev_s
           size_t buflen);
   int   (*dmasendsetup)(FAR struct sdio_dev_s *dev,
           FAR const uint8_t *buffer, size_t buflen);
-#ifdef CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
-  int   (*dmadelydinvldt)(FAR struct sdio_dev_s *dev,
-          FAR const uint8_t *buffer, size_t buflen);
-#endif
 #endif /* CONFIG_SDIO_DMA */
 };