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jwisejwise
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Merge remote-tracking branch 'gitlab/nvdla_nv_small'
2 parents 1428251 + 2becf69 commit 771f20c

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-4424
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64 files changed

+8851
-4424
lines changed

‎cmod/sdp/NV_NVDLA_sdp.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1026,7 +1026,7 @@ void NV_NVDLA_sdp::SdpDataOperationDC() {
10261026
if (NVDLA_SDP_D_FEATURE_MODE_CFG_0_OUTPUT_DST_MEM == sdp_output_dst_) {
10271027
int16_t *temp_ptr = new int16_t[SDP_PARALLEL_PROC_NUM];
10281028
cslAssert((temp_ptr != NULL));
1029-
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, ATOM_CUBE_SIZE);
1029+
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, SDP_PARALLEL_PROC_NUM*sizeof(int16_t));
10301030
// Output destination is memory
10311031
cslDebug((70, "NV_NVDLA_sdp::%s, DP->WDMA\n", __FUNCTION__));
10321032
for(int i=0;i<SDP_PARALLEL_PROC_NUM;i++) {
@@ -1183,7 +1183,7 @@ void NV_NVDLA_sdp::SdpDataOperationBatch() {
11831183
hls_y_alu_op_[y_idx][proc_iter], hls_y_mul_op_[y_idx][proc_iter]);
11841184
int16_t *temp_ptr = new int16_t[SDP_PARALLEL_PROC_NUM];
11851185
cslAssert((temp_ptr != NULL));
1186-
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, ATOM_CUBE_SIZE);
1186+
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, SDP_PARALLEL_PROC_NUM*sizeof(int16_t));
11871187
cslDebug((50, "before write wdma_fifo_\n"));
11881188
wdma_fifo_->write(temp_ptr); //8B
11891189
cslDebug((50, "after write wdma_fifo_\n"));
@@ -1303,7 +1303,7 @@ void NV_NVDLA_sdp::SdpDataOperationWG() {
13031303
} else {
13041304
int16_t *temp_ptr = new int16_t[SDP_PARALLEL_PROC_NUM];
13051305
cslAssert((temp_ptr != NULL));
1306-
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, ATOM_CUBE_SIZE);
1306+
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, SDP_PARALLEL_PROC_NUM*sizeof(int16_t));
13071307
wdma_fifo_->write(temp_ptr); //8B
13081308
cslDebug((50, " write wdma_fifo_\n"));
13091309
}

‎tools/etc/build.config‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ vmod_rams:
3333
sandbox:
3434
- vmod/rams/model
3535
- vmod/rams/synth
36+
- vmod/rams/fpga/small_rams
3637
dependencies:
3738
- defs
3839

‎verif/coverage/elfiles/nv_small_cacc_code.el‎

Lines changed: 935 additions & 911 deletions
Large diffs are not rendered by default.

‎verif/coverage/elfiles/nv_small_cmac_code.el‎

Lines changed: 70 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -2,48 +2,90 @@
22
// This file contains the Excluded objects
33
// Generated By User: ellenz
44
// Format Version: 2
5-
// Date: Tue Apr 10 20:09:04 2018
5+
// Date: Mon May 21 02:45:51 2018
66
// ExclMode: default
77
//==================================================
8-
CHECKSUM: "617721021"
9-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0
10-
CHECKSUM: "617721021"
11-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6
12-
CHECKSUM: "617721021"
13-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5
14-
CHECKSUM: "617721021"
15-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4
16-
CHECKSUM: "617721021"
17-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3
18-
CHECKSUM: "617721021"
19-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2
20-
CHECKSUM: "617721021"
21-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1
8+
CHECKSUM: "3496322456"
9+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate
10+
CHECKSUM: "3496322456"
11+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate
12+
CHECKSUM: "3496322456"
13+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0.p_clkgate
14+
CHECKSUM: "3496322456"
15+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0.p_clkgate
16+
CHECKSUM: "3496322456"
17+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0.p_clkgate
18+
CHECKSUM: "3496322456"
19+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0.p_clkgate
20+
CHECKSUM: "3496322456"
21+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate
2222
CHECKSUM: "2332134184"
23-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0
23+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0
2424
CHECKSUM: "2332134184"
25-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0
25+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0
2626
CHECKSUM: "2332134184"
27-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0
27+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0
2828
CHECKSUM: "2332134184"
2929
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0
3030
CHECKSUM: "2332134184"
31-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0
31+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0
3232
CHECKSUM: "2332134184"
33-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0
33+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0
3434
CHECKSUM: "2332134184"
35-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0
35+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0
36+
CHECKSUM: "617721021"
37+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1
38+
CHECKSUM: "617721021"
39+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2
40+
CHECKSUM: "617721021"
41+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3
42+
CHECKSUM: "617721021"
43+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4
44+
CHECKSUM: "617721021"
45+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5
46+
CHECKSUM: "617721021"
47+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6
48+
CHECKSUM: "617721021"
49+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0
3650
CHECKSUM: "3496322456"
37-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate
51+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate
3852
CHECKSUM: "3496322456"
39-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0.p_clkgate
53+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0.p_clkgate
4054
CHECKSUM: "3496322456"
41-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0.p_clkgate
55+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0.p_clkgate
4256
CHECKSUM: "3496322456"
43-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0.p_clkgate
57+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0.p_clkgate
4458
CHECKSUM: "3496322456"
45-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0.p_clkgate
59+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0.p_clkgate
4660
CHECKSUM: "3496322456"
47-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate
61+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate
4862
CHECKSUM: "3496322456"
49-
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate
63+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate
64+
CHECKSUM: "617721021"
65+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_0
66+
CHECKSUM: "617721021"
67+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_6
68+
CHECKSUM: "617721021"
69+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_5
70+
CHECKSUM: "617721021"
71+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_4
72+
CHECKSUM: "617721021"
73+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_3
74+
CHECKSUM: "617721021"
75+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_2
76+
CHECKSUM: "617721021"
77+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_1
78+
CHECKSUM: "2332134184"
79+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0
80+
CHECKSUM: "2332134184"
81+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0
82+
CHECKSUM: "2332134184"
83+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0
84+
CHECKSUM: "2332134184"
85+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0
86+
CHECKSUM: "2332134184"
87+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0
88+
CHECKSUM: "2332134184"
89+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0
90+
CHECKSUM: "2332134184"
91+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0

‎verif/coverage/elfiles/nv_small_csc_code.el‎

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,3 +10,33 @@ INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_wl
1010
Block 191 "2071161909" "wmb_req_addr <= wmb_req_addr_w;"
1111
Block 197 "1572362044" "wmb_req_addr_last <= wmb_req_addr_w;"
1212
Block 220 "1249590617" "sc2buf_wmb_rd_addr <= wmb_req_addr;"
13+
CHECKSUM: "1941532982 3809241588"
14+
INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_regfile
15+
Block 69 "0" "assign csb_rresp_pd_w[32] = csb_rresp_error;"
16+
Block 70 "0" "assign csb_wresp_pd_w[31:0] = csb_wresp_rdat[31:0];"
17+
Block 71 "0" "assign csb_wresp_pd_w[32] = csb_wresp_error;"
18+
Block 76 "1949545652" "csc2csb_resp_pd <= csb_rresp_pd_w;"
19+
CHECKSUM: "2285388798"
20+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_0
21+
CHECKSUM: "2285388798"
22+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_wg
23+
CHECKSUM: "2285388798"
24+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_2
25+
CHECKSUM: "2285388798"
26+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_1
27+
CHECKSUM: "2332134184"
28+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_0.nvdla_core_clk_slcg_0
29+
CHECKSUM: "2332134184"
30+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_wg.nvdla_core_clk_slcg_0
31+
CHECKSUM: "2332134184"
32+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_2.nvdla_core_clk_slcg_0
33+
CHECKSUM: "2332134184"
34+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_1.nvdla_core_clk_slcg_0
35+
CHECKSUM: "3496322456"
36+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate
37+
CHECKSUM: "3496322456"
38+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_wg.nvdla_core_clk_slcg_0.p_clkgate
39+
CHECKSUM: "3496322456"
40+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate
41+
CHECKSUM: "3496322456"
42+
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate

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