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Leif Lindholmoliviermartin
Leif Lindholm
authored and
oliviermartin
committed
ArmPlatformPkg: Increase more ARM address Pcd entries to 64-bit.
Some AArch64 platforms have RAM and flash devices >4GB. Update some additional Pcd entries to 64-bit, and change the corresponding PcdGet32 calls to PcdGet64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <[email protected]> Signed-off-by: Olivier Martin <[email protected]> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16325 6f19259b-4bc3-4df7-8a09-765794883524
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20 files changed

+54
-52
lines changed

20 files changed

+54
-52
lines changed

‎ArmPkg/ArmPkg.dec

+4-4
Original file line numberDiff line numberDiff line change
@@ -87,17 +87,17 @@
8787
#
8888
# ARM Secure Firmware PCDs
8989
#
90-
gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
90+
gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT64|0x00000015
9191
gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
92-
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT32|0x0000002F
92+
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT64|0x0000002F
9393
gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030
9494

9595
#
9696
# ARM Normal (or Non Secure) Firmware PCDs
9797
#
98-
gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT32|0x0000002B
98+
gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x0000002B
9999
gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C
100-
gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT32|0x0000002D
100+
gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x0000002D
101101
gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E
102102

103103
#

‎ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -296,7 +296,7 @@ InitializeDebugAgent (
296296
//
297297
// Get the Sec or PrePeiCore module (defined as SEC type module)
298298
//
299-
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet32(PcdSecureFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
299+
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdSecureFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
300300
if (!EFI_ERROR(Status)) {
301301
Status = GetImageContext (FfsHeader,&ImageContext);
302302
if (!EFI_ERROR(Status)) {
@@ -307,7 +307,7 @@ InitializeDebugAgent (
307307
//
308308
// Get the PrePi or PrePeiCore module (defined as SEC type module)
309309
//
310-
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet32(PcdFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
310+
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
311311
if (!EFI_ERROR(Status)) {
312312
Status = GetImageContext (FfsHeader,&ImageContext);
313313
if (!EFI_ERROR(Status)) {
@@ -318,7 +318,7 @@ InitializeDebugAgent (
318318
//
319319
// Get the PeiCore module (defined as PEI_CORE type module)
320320
//
321-
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet32(PcdFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
321+
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
322322
if (!EFI_ERROR(Status)) {
323323
Status = GetImageContext (FfsHeader,&ImageContext);
324324
if (!EFI_ERROR(Status)) {

‎ArmPlatformPkg/ArmPlatformPkg.dec

+1-1
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@
7070
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000|UINT32|0x00000006
7171

7272
# Stack for CPU Cores in Non Secure Mode
73-
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT32|0x00000009
73+
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009
7474
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
7575
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A
7676

‎ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c

+3-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/** @file
22
*
3-
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
3+
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
44
*
55
* This program and the accompanying materials
66
* are licensed and made available under the terms and conditions of the BSD License
@@ -73,5 +73,6 @@ ArmPlatformSecExtraAction (
7373
OUT UINTN* JumpAddress
7474
)
7575
{
76-
*JumpAddress = PcdGet32(PcdFvBaseAddress);
76+
*JumpAddress = (UINTN)PcdGet64 (PcdFvBaseAddress);
7777
}
78+

‎ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/** @file
22
*
3-
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
3+
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
44
*
55
* This program and the accompanying materials
66
* are licensed and made available under the terms and conditions of the BSD License
@@ -67,5 +67,5 @@ ArmPlatformSecExtraAction (
6767
OUT UINTN* JumpAddress
6868
)
6969
{
70-
*JumpAddress = PcdGet32(PcdFvBaseAddress);
70+
*JumpAddress = PcdGet64 (PcdFvBaseAddress);
7171
}

‎ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -96,5 +96,5 @@ ArmPlatformSecExtraAction (
9696
OUT UINTN* JumpAddress
9797
)
9898
{
99-
*JumpAddress = PcdGet32(PcdFvBaseAddress);
99+
*JumpAddress = PcdGet64 (PcdFvBaseAddress);
100100
}

‎ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -181,9 +181,9 @@ ArmPlatformInitializeSystemMemory (
181181
//
182182
ASSERT (NewSize >= SIZE_128MB);
183183
ASSERT (
184-
(((UINT64)PcdGet32 (PcdFdBaseAddress) +
184+
(((UINT64)PcdGet64 (PcdFdBaseAddress) +
185185
(UINT64)PcdGet32 (PcdFdSize)) <= NewBase) ||
186-
((UINT64)PcdGet32 (PcdFdBaseAddress) >= (NewBase + NewSize)));
186+
((UINT64)PcdGet64 (PcdFdBaseAddress) >= (NewBase + NewSize)));
187187
}
188188

189189
VOID

‎ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/** @file
22
*
3-
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
3+
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
44
* Copyright (c) 2014, Linaro Limited. All rights reserved.
55
*
66
* This program and the accompanying materials
@@ -41,7 +41,7 @@ PlatformPeim (
4141
CopyMem (NewBase, Base, FdtSize);
4242
PcdSet64 (PcdDeviceTreeBaseAddress, (UINT64)(UINTN)NewBase);
4343

44-
BuildFvHob (PcdGet32(PcdFvBaseAddress), PcdGet32(PcdFvSize));
44+
BuildFvHob (PcdGet64 (PcdFvBaseAddress), PcdGet32 (PcdFvSize));
4545

4646
return EFI_SUCCESS;
4747
}

‎ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ ArmPlatformGetGlobalVariable (
3434
// Ensure the Global Variable Size have been initialized
3535
ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
3636

37-
GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
37+
GlobalVariableBase = PcdGet64 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
3838

3939
if (VariableSize == 4) {
4040
*(UINT32*)Variable = ReadUnaligned32 ((CONST UINT32*)(GlobalVariableBase + VariableOffset));
@@ -57,7 +57,7 @@ ArmPlatformSetGlobalVariable (
5757
// Ensure the Global Variable Size have been initialized
5858
ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
5959

60-
GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
60+
GlobalVariableBase = PcdGet64 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
6161

6262
if (VariableSize == 4) {
6363
WriteUnaligned32 ((UINT32*)(GlobalVariableBase + VariableOffset), *(UINT32*)Variable);
@@ -78,7 +78,7 @@ ArmPlatformGetGlobalVariableAddress (
7878
// Ensure the Global Variable Size have been initialized
7979
ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
8080

81-
GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
81+
GlobalVariableBase = PcdGet64 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
8282

8383
return (VOID*)(GlobalVariableBase + VariableOffset);
8484
}

‎ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,8 @@
1919
#include <Library/PcdLib.h>
2020
#include <Library/DebugLib.h>
2121

22-
#define IS_XIP() (((UINT32)PcdGet32 (PcdFdBaseAddress) > (UINT32)(PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize))) || \
23-
((PcdGet32 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet64 (PcdSystemMemoryBase)))
22+
#define IS_XIP() (((UINT32)PcdGet64 (PcdFdBaseAddress) > (UINT32)(PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize))) || \
23+
((PcdGet64 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet64 (PcdSystemMemoryBase)))
2424

2525
// Declared by ArmPlatformPkg/PrePi Module
2626
extern UINTN mGlobalVariableBase;

‎ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/** @file
22
*
3-
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
3+
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
44
*
55
* This program and the accompanying materials
66
* are licensed and made available under the terms and conditions of the BSD License
@@ -70,5 +70,5 @@ ArmPlatformSecExtraAction (
7070
OUT UINTN* JumpAddress
7171
)
7272
{
73-
*JumpAddress = PcdGet32(PcdFvBaseAddress);
73+
*JumpAddress = PcdGet64 (PcdFvBaseAddress);
7474
}

‎ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c

+7-6
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ NonSecureWaitForFirmware (
3535
UINTN InterruptId;
3636

3737
// The secondary cores will execute the firmware once wake from WFI.
38-
SecondaryStart = (VOID (*)())PcdGet32 (PcdFvBaseAddress);
38+
SecondaryStart = (VOID (*)())(UINTN)PcdGet64 (PcdFvBaseAddress);
3939

4040
ArmCallWFI ();
4141

@@ -69,6 +69,7 @@ ArmPlatformSecExtraAction (
6969
{
7070
CHAR8 Buffer[100];
7171
UINTN CharCount;
72+
UINTN* StartAddress;
7273

7374
if (FeaturePcdGet (PcdStandalone) == FALSE) {
7475

@@ -77,15 +78,15 @@ ArmPlatformSecExtraAction (
7778
//
7879

7980
if (ArmPlatformIsPrimaryCore (MpId)) {
80-
UINTN* StartAddress = (UINTN*)PcdGet32(PcdFvBaseAddress);
81+
StartAddress = (UINTN*)(UINTN)PcdGet64 (PcdFvBaseAddress);
8182

8283
// Patch the DRAM to make an infinite loop at the start address
8384
*StartAddress = 0xEAFFFFFE; // opcode for while(1)
8485

8586
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);
8687
SerialPortWrite ((UINT8 *) Buffer, CharCount);
8788

88-
*JumpAddress = PcdGet32(PcdFvBaseAddress);
89+
*JumpAddress = PcdGet64 (PcdFvBaseAddress);
8990
} else {
9091
// When the primary core is stopped by the hardware debugger to copy the firmware
9192
// into DRAM. The secondary cores are still running. As soon as the first bytes of
@@ -104,17 +105,17 @@ ArmPlatformSecExtraAction (
104105

105106
if (ArmPlatformIsPrimaryCore (MpId)) {
106107
// Signal the secondary cores they can jump to PEI phase
107-
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
108+
ArmGicSendSgiTo (PcdGet32 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
108109

109110
// To enter into Non Secure state, we need to make a return from exception
110-
*JumpAddress = PcdGet32(PcdFvBaseAddress);
111+
*JumpAddress = PcdGet64 (PcdFvBaseAddress);
111112
} else {
112113
// We wait for the primary core to finish to initialize the System Memory. Otherwise the secondary
113114
// cores would make crash the system by setting their stacks in DRAM before the primary core has not
114115
// finished to initialize the system memory.
115116
*JumpAddress = (UINTN)NonSecureWaitForFirmware;
116117
}
117118
} else {
118-
*JumpAddress = PcdGet32(PcdFvBaseAddress);
119+
*JumpAddress = PcdGet64 (PcdFvBaseAddress);
119120
}
120121
}

‎ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c

+10-10
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/** @file
22
*
3-
* Copyright (c) 2011, ARM Limited. All rights reserved.
3+
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
44
*
55
* This program and the accompanying materials
66
* are licensed and made available under the terms and conditions of the BSD License
@@ -102,33 +102,33 @@ MemoryPeim (
102102
);
103103

104104
SystemMemoryTop = (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemoryBase) + (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemorySize);
105-
FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdBaseAddress) + (EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdSize);
105+
FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdFdBaseAddress) + (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFdSize);
106106

107107
// EDK2 does not have the concept of boot firmware copied into DRAM. To avoid the DXE
108108
// core to overwrite this area we must mark the region with the attribute non-present
109-
if ((PcdGet32 (PcdFdBaseAddress) >= PcdGet64 (PcdSystemMemoryBase)) && (FdTop <= SystemMemoryTop)) {
109+
if ((PcdGet64 (PcdFdBaseAddress) >= PcdGet64 (PcdSystemMemoryBase)) && (FdTop <= SystemMemoryTop)) {
110110
Found = FALSE;
111111

112112
// Search for System Memory Hob that contains the firmware
113113
NextHob.Raw = GetHobList ();
114114
while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {
115115
if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
116-
(PcdGet32(PcdFdBaseAddress) >= NextHob.ResourceDescriptor->PhysicalStart) &&
116+
(PcdGet64 (PcdFdBaseAddress) >= NextHob.ResourceDescriptor->PhysicalStart) &&
117117
(FdTop <= NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength))
118118
{
119119
ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute;
120120
ResourceLength = NextHob.ResourceDescriptor->ResourceLength;
121121
ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength;
122122

123-
if (PcdGet32(PcdFdBaseAddress) == NextHob.ResourceDescriptor->PhysicalStart) {
123+
if (PcdGet64 (PcdFdBaseAddress) == NextHob.ResourceDescriptor->PhysicalStart) {
124124
if (SystemMemoryTop == FdTop) {
125125
NextHob.ResourceDescriptor->ResourceAttribute = ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT;
126126
} else {
127127
// Create the System Memory HOB for the firmware with the non-present attribute
128128
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
129129
ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,
130-
PcdGet32(PcdFdBaseAddress),
131-
PcdGet32(PcdFdSize));
130+
PcdGet64 (PcdFdBaseAddress),
131+
PcdGet32 (PcdFdSize));
132132

133133
// Top of the FD is system memory available for UEFI
134134
NextHob.ResourceDescriptor->PhysicalStart += PcdGet32(PcdFdSize);
@@ -138,11 +138,11 @@ MemoryPeim (
138138
// Create the System Memory HOB for the firmware with the non-present attribute
139139
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
140140
ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,
141-
PcdGet32(PcdFdBaseAddress),
142-
PcdGet32(PcdFdSize));
141+
PcdGet64 (PcdFdBaseAddress),
142+
PcdGet32 (PcdFdSize));
143143

144144
// Update the HOB
145-
NextHob.ResourceDescriptor->ResourceLength = PcdGet32(PcdFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;
145+
NextHob.ResourceDescriptor->ResourceLength = PcdGet64 (PcdFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;
146146

147147
// If there is some memory available on the top of the FD then create a HOB
148148
if (FdTop < NextHob.ResourceDescriptor->PhysicalStart + ResourceLength) {

‎ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -116,7 +116,7 @@ InitializeMemory (
116116

117117
SystemMemoryBase = (UINTN)PcdGet64 (PcdSystemMemoryBase);
118118
SystemMemoryTop = SystemMemoryBase + (UINTN)PcdGet64 (PcdSystemMemorySize);
119-
FdBase = (UINTN)PcdGet32 (PcdFdBaseAddress);
119+
FdBase = (UINTN)PcdGet64 (PcdFdBaseAddress);
120120
FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);
121121

122122
//

‎ArmPlatformPkg/PlatformPei/PlatformPeiLib.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/** @file
22
*
3-
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
3+
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
44
*
55
* This program and the accompanying materials
66
* are licensed and made available under the terms and conditions of the BSD License
@@ -24,7 +24,7 @@ PlatformPeim (
2424
VOID
2525
)
2626
{
27-
BuildFvHob (PcdGet32(PcdFvBaseAddress), PcdGet32(PcdFvSize));
27+
BuildFvHob (PcdGet64 (PcdFvBaseAddress), PcdGet32 (PcdFvSize));
2828

2929
return EFI_SUCCESS;
3030
}

‎ArmPlatformPkg/PrePeiCore/MainMPCore.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -131,7 +131,7 @@ PrimaryMain (
131131
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
132132
// the base of the primary core stack
133133
PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
134-
TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
134+
TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
135135
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
136136

137137
// Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned
@@ -144,7 +144,7 @@ PrimaryMain (
144144
// Note also: HOBs (pei temp ram) MUST be above stack
145145
//
146146
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
147-
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
147+
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);
148148
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
149149
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
150150
SecCoreData.TemporaryRamSize = TemporaryRamSize;

‎ArmPlatformPkg/PrePeiCore/MainUniCore.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ PrimaryMain (
4040
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
4141
// the base of the primary core stack
4242
PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
43-
TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
43+
TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
4444
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
4545

4646
// Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned
@@ -53,7 +53,7 @@ PrimaryMain (
5353
// Note also: HOBs (pei temp ram) MUST be above stack
5454
//
5555
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
56-
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
56+
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);
5757
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
5858
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
5959
SecCoreData.TemporaryRamSize = TemporaryRamSize;

‎ArmPlatformPkg/PrePeiCore/PrePeiCore.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ CreatePpiList (
5353
ArmPlatformGetPlatformPpiList (&PlatformPpiListSize, &PlatformPpiList);
5454

5555
// Copy the Common and Platform PPis in Temporrary Memory
56-
ListBase = PcdGet32 (PcdCPUCoresStackBase);
56+
ListBase = PcdGet64 (PcdCPUCoresStackBase);
5757
CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable));
5858
CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize);
5959

@@ -154,7 +154,7 @@ PrePeiCoreGetGlobalVariableMemory (
154154
{
155155
ASSERT (GlobalVariableBase != NULL);
156156

157-
*GlobalVariableBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) +
157+
*GlobalVariableBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) +
158158
(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
159159
(UINTN)PcdGet32 (PcdPeiGlobalVariableSize);
160160

‎ArmPlatformPkg/Sec/Sec.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,7 @@ CEntryPoint (
123123
copy_cpsr_into_spsr ();
124124

125125
// Call the Platform specific function to execute additional actions if required
126-
JumpAddress = PcdGet32 (PcdFvBaseAddress);
126+
JumpAddress = PcdGet64 (PcdFvBaseAddress);
127127
ArmPlatformSecExtraAction (MpId, &JumpAddress);
128128

129129
NonTrustedWorldTransition (MpId, JumpAddress);
@@ -167,7 +167,7 @@ TrustedWorldInitialization (
167167
}
168168

169169
// Call the Platform specific function to execute additional actions if required
170-
JumpAddress = PcdGet32 (PcdFvBaseAddress);
170+
JumpAddress = PcdGet64 (PcdFvBaseAddress);
171171
ArmPlatformSecExtraAction (MpId, &JumpAddress);
172172

173173
// Initialize architecture specific security policy

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