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[ELF] Move InStruct into Ctx. NFC
Ctx was introduced in March 2022 as a more suitable place for such singletons. llvm/Support/thread.h includes <thread>, which transitively includes sstream in libc++ and uses ios_base::in, so we cannot use `#define in ctx.sec`. `symtab, config, ctx` are now the only variables using LLVM_LIBRARY_VISIBILITY.
1 parent 339282d commit e88b7ff

24 files changed

+370
-336
lines changed

‎lld/ELF/Arch/AArch64.cpp‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -322,7 +322,7 @@ int64_t AArch64::getImplicitAddend(const uint8_t *buf, RelType type) const {
322322
}
323323

324324
void AArch64::writeGotPlt(uint8_t *buf, const Symbol &) const {
325-
write64(buf, in.plt->getVA());
325+
write64(buf, ctx.in.plt->getVA());
326326
}
327327

328328
void AArch64::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
@@ -343,8 +343,8 @@ void AArch64::writePltHeader(uint8_t *buf) const {
343343
};
344344
memcpy(buf, pltData, sizeof(pltData));
345345

346-
uint64_t got = in.gotPlt->getVA();
347-
uint64_t plt = in.plt->getVA();
346+
uint64_t got = ctx.in.gotPlt->getVA();
347+
uint64_t plt = ctx.in.plt->getVA();
348348
relocateNoSym(buf + 4, R_AARCH64_ADR_PREL_PG_HI21,
349349
getAArch64Page(got + 16) - getAArch64Page(plt + 4));
350350
relocateNoSym(buf + 8, R_AARCH64_LDST64_ABS_LO12_NC, got + 16);
@@ -1003,8 +1003,8 @@ void AArch64BtiPac::writePltHeader(uint8_t *buf) const {
10031003
};
10041004
const uint8_t nopData[] = { 0x1f, 0x20, 0x03, 0xd5 }; // nop
10051005

1006-
uint64_t got = in.gotPlt->getVA();
1007-
uint64_t plt = in.plt->getVA();
1006+
uint64_t got = ctx.in.gotPlt->getVA();
1007+
uint64_t plt = ctx.in.plt->getVA();
10081008

10091009
if (btiHeader) {
10101010
// PltHeader is called indirectly by plt[N]. Prefix pltData with a BTI C

‎lld/ELF/Arch/ARM.cpp‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -204,7 +204,7 @@ RelType ARM::getDynRel(RelType type) const {
204204
}
205205

206206
void ARM::writeGotPlt(uint8_t *buf, const Symbol &) const {
207-
write32(buf, in.plt->getVA());
207+
write32(buf, ctx.in.plt->getVA());
208208
}
209209

210210
void ARM::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
@@ -223,8 +223,8 @@ static void writePltHeaderLong(uint8_t *buf) {
223223
write32(buf + 20, 0xd4d4d4d4); // Pad to 32-byte boundary
224224
write32(buf + 24, 0xd4d4d4d4); // Pad to 32-byte boundary
225225
write32(buf + 28, 0xd4d4d4d4);
226-
uint64_t gotPlt = in.gotPlt->getVA();
227-
uint64_t l1 = in.plt->getVA() + 8;
226+
uint64_t gotPlt = ctx.in.gotPlt->getVA();
227+
uint64_t l1 = ctx.in.plt->getVA() + 8;
228228
write32(buf + 16, gotPlt - l1 - 8);
229229
}
230230

@@ -249,7 +249,7 @@ void ARM::writePltHeader(uint8_t *buf) const {
249249
// At 0x8, we want to jump to .got.plt, the -16 accounts for 8 bytes from
250250
// `pc` in the add instruction and 8 bytes for the `lr` adjustment.
251251
//
252-
uint64_t offset = in.gotPlt->getVA() - in.plt->getVA() - 16;
252+
uint64_t offset = ctx.in.gotPlt->getVA() - ctx.in.plt->getVA() - 16;
253253
assert(llvm::isUInt<32>(offset) && "This should always fit into a 32-bit offset");
254254
write16(buf + 0, 0xb500);
255255
// Split into two halves to support endianness correctly.
@@ -277,7 +277,7 @@ void ARM::writePltHeader(uint8_t *buf) const {
277277
0xe5bef000, // ldr pc, [lr, #0x00000NNN] &(.got.plt -L1 - 4)
278278
};
279279

280-
uint64_t offset = in.gotPlt->getVA() - in.plt->getVA() - 4;
280+
uint64_t offset = ctx.in.gotPlt->getVA() - ctx.in.plt->getVA() - 4;
281281
if (!llvm::isUInt<27>(offset)) {
282282
// We cannot encode the Offset, use the long form.
283283
writePltHeaderLong(buf);

‎lld/ELF/Arch/Hexagon.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -359,7 +359,7 @@ void Hexagon::writePltHeader(uint8_t *buf) const {
359359
memcpy(buf, pltData, sizeof(pltData));
360360

361361
// Offset from PLT0 to the GOT.
362-
uint64_t off = in.gotPlt->getVA() - in.plt->getVA();
362+
uint64_t off = ctx.in.gotPlt->getVA() - ctx.in.plt->getVA();
363363
relocateNoSym(buf, R_HEX_B32_PCREL_X, off);
364364
relocateNoSym(buf + 4, R_HEX_6_PCREL_X, off);
365365
}

‎lld/ELF/Arch/LoongArch.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -308,9 +308,9 @@ int64_t LoongArch::getImplicitAddend(const uint8_t *buf, RelType type) const {
308308

309309
void LoongArch::writeGotPlt(uint8_t *buf, const Symbol &s) const {
310310
if (config->is64)
311-
write64le(buf, in.plt->getVA());
311+
write64le(buf, ctx.in.plt->getVA());
312312
else
313-
write32le(buf, in.plt->getVA());
313+
write32le(buf, ctx.in.plt->getVA());
314314
}
315315

316316
void LoongArch::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
@@ -341,7 +341,7 @@ void LoongArch::writePltHeader(uint8_t *buf) const {
341341
// srli.[wd] $t1, $t1, (is64?1:2) ; t1 = &.got.plt[i] - &.got.plt[0]
342342
// ld.[wd] $t0, $t0, Wordsize ; t0 = link_map
343343
// jr $t3
344-
uint32_t offset = in.gotPlt->getVA() - in.plt->getVA();
344+
uint32_t offset = ctx.in.gotPlt->getVA() - ctx.in.plt->getVA();
345345
uint32_t sub = config->is64 ? SUB_D : SUB_W;
346346
uint32_t ld = config->is64 ? LD_D : LD_W;
347347
uint32_t addi = config->is64 ? ADDI_D : ADDI_W;

‎lld/ELF/Arch/Mips.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -205,7 +205,7 @@ template <class ELFT> RelType MIPS<ELFT>::getDynRel(RelType type) const {
205205

206206
template <class ELFT>
207207
void MIPS<ELFT>::writeGotPlt(uint8_t *buf, const Symbol &) const {
208-
uint64_t va = in.plt->getVA();
208+
uint64_t va = ctx.in.plt->getVA();
209209
if (isMicroMips())
210210
va |= 1;
211211
write32(buf, va);
@@ -257,8 +257,8 @@ static void writeMicroRelocation16(uint8_t *loc, uint64_t v, uint8_t bitsSize,
257257

258258
template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
259259
if (isMicroMips()) {
260-
uint64_t gotPlt = in.gotPlt->getVA();
261-
uint64_t plt = in.plt->getVA();
260+
uint64_t gotPlt = ctx.in.gotPlt->getVA();
261+
uint64_t plt = ctx.in.plt->getVA();
262262
// Overwrite trap instructions written by Writer::writeTrapInstr.
263263
memset(buf, 0, pltHeaderSize);
264264

@@ -310,7 +310,7 @@ template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
310310
write32(buf + 24, jalrInst); // jalr.hb $25 or jalr $25
311311
write32(buf + 28, 0x2718fffe); // subu $24, $24, 2
312312

313-
uint64_t gotPlt = in.gotPlt->getVA();
313+
uint64_t gotPlt = ctx.in.gotPlt->getVA();
314314
writeValue(buf, gotPlt + 0x8000, 16, 16);
315315
writeValue(buf + 4, gotPlt, 16, 0);
316316
writeValue(buf + 8, gotPlt, 16, 0);

‎lld/ELF/Arch/PPC.cpp‎

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -75,9 +75,10 @@ static void writeFromHalf16(uint8_t *loc, uint32_t insn) {
7575
void elf::writePPC32GlinkSection(uint8_t *buf, size_t numEntries) {
7676
// Create canonical PLT entries for non-PIE code. Compilers don't generate
7777
// non-GOT-non-PLT relocations referencing external functions for -fpie/-fPIE.
78-
uint32_t glink = in.plt->getVA(); // VA of .glink
78+
uint32_t glink = ctx.in.plt->getVA(); // VA of .glink
7979
if (!config->isPic) {
80-
for (const Symbol *sym : cast<PPC32GlinkSection>(*in.plt).canonical_plts) {
80+
for (const Symbol *sym :
81+
cast<PPC32GlinkSection>(*ctx.in.plt).canonical_plts) {
8182
writePPC32PltCallStub(buf, sym->getGotPltVA(), nullptr, 0);
8283
buf += 16;
8384
glink += 16;
@@ -101,10 +102,10 @@ void elf::writePPC32GlinkSection(uint8_t *buf, size_t numEntries) {
101102
// Then write PLTresolve(), which has two forms: PIC and non-PIC. PLTresolve()
102103
// computes the PLT index (by computing the distance from the landing b to
103104
// itself) and calls _dl_runtime_resolve() (in glibc).
104-
uint32_t got = in.got->getVA();
105+
uint32_t got = ctx.in.got->getVA();
105106
const uint8_t *end = buf + 64;
106107
if (config->isPic) {
107-
uint32_t afterBcl = 4 * in.plt->getNumEntries() + 12;
108+
uint32_t afterBcl = 4 * ctx.in.plt->getNumEntries() + 12;
108109
uint32_t gotBcl = got + 4 - (glink + afterBcl);
109110
write32(buf + 0, 0x3d6b0000 | ha(afterBcl)); // addis r11,r11,1f-glink@ha
110111
write32(buf + 4, 0x7c0802a6); // mflr r0
@@ -192,7 +193,8 @@ void PPC::writeGotHeader(uint8_t *buf) const {
192193

193194
void PPC::writeGotPlt(uint8_t *buf, const Symbol &s) const {
194195
// Address of the symbol resolver stub in .glink .
195-
write32(buf, in.plt->getVA() + in.plt->headerSize + 4 * s.getPltIdx());
196+
write32(buf,
197+
ctx.in.plt->getVA() + ctx.in.plt->headerSize + 4 * s.getPltIdx());
196198
}
197199

198200
bool PPC::needsThunk(RelExpr expr, RelType type, const InputFile *file,

‎lld/ELF/Arch/PPC64.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -210,7 +210,7 @@ uint64_t elf::getPPC64TocBase() {
210210
// TOC starts where the first of these sections starts. We always create a
211211
// .got when we see a relocation that uses it, so for us the start is always
212212
// the .got.
213-
uint64_t tocVA = in.got->getVA();
213+
uint64_t tocVA = ctx.in.got->getVA();
214214

215215
// Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000
216216
// thus permitting a full 64 Kbytes segment. Note that the glibc startup
@@ -1155,7 +1155,7 @@ void PPC64::writePltHeader(uint8_t *buf) const {
11551155
// The 'bcl' instruction will set the link register to the address of the
11561156
// following instruction ('mflr r11'). Here we store the offset from that
11571157
// instruction to the first entry in the GotPlt section.
1158-
int64_t gotPltOffset = in.gotPlt->getVA() - (in.plt->getVA() + 8);
1158+
int64_t gotPltOffset = ctx.in.gotPlt->getVA() - (ctx.in.plt->getVA() + 8);
11591159
write64(buf + 52, gotPltOffset);
11601160
}
11611161

‎lld/ELF/Arch/RISCV.cpp‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -207,9 +207,9 @@ void RISCV::writeGotHeader(uint8_t *buf) const {
207207

208208
void RISCV::writeGotPlt(uint8_t *buf, const Symbol &s) const {
209209
if (config->is64)
210-
write64le(buf, in.plt->getVA());
210+
write64le(buf, ctx.in.plt->getVA());
211211
else
212-
write32le(buf, in.plt->getVA());
212+
write32le(buf, ctx.in.plt->getVA());
213213
}
214214

215215
void RISCV::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
@@ -230,7 +230,7 @@ void RISCV::writePltHeader(uint8_t *buf) const {
230230
// srli t1, t1, (rv64?1:2); t1 = &.got.plt[i] - &.got.plt[0]
231231
// l[wd] t0, Wordsize(t0); t0 = link_map
232232
// jr t3
233-
uint32_t offset = in.gotPlt->getVA() - in.plt->getVA();
233+
uint32_t offset = ctx.in.gotPlt->getVA() - ctx.in.plt->getVA();
234234
uint32_t load = config->is64 ? LD : LW;
235235
write32le(buf + 0, utype(AUIPC, X_T2, hi20(offset)));
236236
write32le(buf + 4, rtype(SUB, X_T1, X_T1, X_T3));
@@ -1178,8 +1178,8 @@ mergeAttributesSection(const SmallVector<InputSectionBase *, 0> &sections) {
11781178
unsigned firstStackAlignValue = 0, xlen = 0;
11791179
bool hasArch = false;
11801180

1181-
in.riscvAttributes = std::make_unique<RISCVAttributesSection>();
1182-
auto &merged = static_cast<RISCVAttributesSection &>(*in.riscvAttributes);
1181+
ctx.in.riscvAttributes = std::make_unique<RISCVAttributesSection>();
1182+
auto &merged = static_cast<RISCVAttributesSection &>(*ctx.in.riscvAttributes);
11831183

11841184
// Collect all tags values from attributes section.
11851185
const auto &attributesTags = RISCVAttrs::getRISCVAttributeTags();

‎lld/ELF/Arch/SPARCV9.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -188,7 +188,7 @@ void SPARCV9::writePlt(uint8_t *buf, const Symbol & /*sym*/,
188188
};
189189
memcpy(buf, pltData, sizeof(pltData));
190190

191-
uint64_t off = pltEntryAddr - in.plt->getVA();
191+
uint64_t off = pltEntryAddr - ctx.in.plt->getVA();
192192
relocateNoSym(buf, R_SPARC_22, off);
193193
relocateNoSym(buf + 4, R_SPARC_WDISP19, -(off + 4 - pltEntrySize));
194194
}

‎lld/ELF/Arch/SystemZ.cpp‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -203,15 +203,15 @@ void SystemZ::writePltHeader(uint8_t *buf) const {
203203
0x07, 0x00, // nopr
204204
};
205205
memcpy(buf, pltData, sizeof(pltData));
206-
uint64_t got = in.got->getVA();
207-
uint64_t plt = in.plt->getVA();
206+
uint64_t got = ctx.in.got->getVA();
207+
uint64_t plt = ctx.in.plt->getVA();
208208
write32be(buf + 8, (got - plt - 6) >> 1);
209209
}
210210

211211
void SystemZ::addPltHeaderSymbols(InputSection &isec) const {
212212
// The PLT header needs a reference to _GLOBAL_OFFSET_TABLE_, so we
213213
// must ensure the .got section is created even if otherwise unused.
214-
in.got->hasGotOffRel.store(true, std::memory_order_relaxed);
214+
ctx.in.got->hasGotOffRel.store(true, std::memory_order_relaxed);
215215
}
216216

217217
void SystemZ::writePlt(uint8_t *buf, const Symbol &sym,
@@ -228,8 +228,8 @@ void SystemZ::writePlt(uint8_t *buf, const Symbol &sym,
228228
memcpy(buf, inst, sizeof(inst));
229229

230230
write32be(buf + 2, (sym.getGotPltVA() - pltEntryAddr) >> 1);
231-
write32be(buf + 24, (in.plt->getVA() - pltEntryAddr - 22) >> 1);
232-
write32be(buf + 28, in.relaPlt->entsize * sym.getPltIdx());
231+
write32be(buf + 24, (ctx.in.plt->getVA() - pltEntryAddr - 22) >> 1);
232+
write32be(buf + 28, ctx.in.relaPlt->entsize * sym.getPltIdx());
233233
}
234234

235235
int64_t SystemZ::getImplicitAddend(const uint8_t *buf, RelType type) const {

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