diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..db86c2f7 --- /dev/null +++ b/.gitignore @@ -0,0 +1,8 @@ +# Ignore list for the project +**/.vscode/.browse.c_cpp.db* +**/.vscode/c_cpp_properties.json +**/.vscode/launch.json +**/build/** + +# Except the following files +!*.uf2 \ No newline at end of file diff --git a/LICENSE b/LICENSE new file mode 100644 index 00000000..f288702d --- /dev/null +++ b/LICENSE @@ -0,0 +1,674 @@ + GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The GNU General Public License is a free, copyleft license for +software and other kinds of works. + + The licenses for most software and other practical works are designed +to take away your freedom to share and change the works. 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If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + Copyright (C) + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/pico_sdk_sigrok/CMakeLists.txt b/pico_sdk_sigrok/CMakeLists.txt index d64d8672..2cdf62c5 100644 --- a/pico_sdk_sigrok/CMakeLists.txt +++ b/pico_sdk_sigrok/CMakeLists.txt @@ -1,14 +1,31 @@ +# == DO NOT EDIT THE FOLLOWING LINES for the Raspberry Pi Pico VS Code Extension to work == +if(WIN32) + set(USERHOME $ENV{USERPROFILE}) +else() + set(USERHOME $ENV{HOME}) +endif() +set(sdkVersion 2.1.0) +set(toolchainVersion 13_3_Rel1) +set(picotoolVersion 2.1.0) +set(picoVscode ${USERHOME}/.pico-sdk/cmake/pico-vscode.cmake) +if (EXISTS ${picoVscode}) + include(${picoVscode}) +endif() +# ==================================================================================== +set(PICO_BOARD pico CACHE STRING "Board type") + cmake_minimum_required(VERSION 3.13) include(pico_sdk_import.cmake) -project(test_project C CXX ASM) +project(pico_sdk_sigrok C CXX ASM) set(CMAKE_C_STANDARD 11) set(CMAKE_CXX_STANDARD 17) pico_sdk_init() add_executable(pico_sdk_sigrok pico_sdk_sigrok.c + sr_device.c ) pico_enable_stdio_usb(pico_sdk_sigrok 1) diff --git a/pico_sdk_sigrok/pico_sdk_import.cmake b/pico_sdk_sigrok/pico_sdk_import.cmake new file mode 100644 index 00000000..a0721d0d --- /dev/null +++ b/pico_sdk_sigrok/pico_sdk_import.cmake @@ -0,0 +1,84 @@ +# This is a copy of /external/pico_sdk_import.cmake + +# This can be dropped into an external project to help locate this SDK +# It should be include()ed prior to project() + +if (DEFINED ENV{PICO_SDK_PATH} AND (NOT PICO_SDK_PATH)) + set(PICO_SDK_PATH $ENV{PICO_SDK_PATH}) + message("Using PICO_SDK_PATH from environment ('${PICO_SDK_PATH}')") +endif () + +if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT} AND (NOT PICO_SDK_FETCH_FROM_GIT)) + set(PICO_SDK_FETCH_FROM_GIT $ENV{PICO_SDK_FETCH_FROM_GIT}) + message("Using PICO_SDK_FETCH_FROM_GIT from environment ('${PICO_SDK_FETCH_FROM_GIT}')") +endif () + +if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_PATH} AND (NOT PICO_SDK_FETCH_FROM_GIT_PATH)) + set(PICO_SDK_FETCH_FROM_GIT_PATH $ENV{PICO_SDK_FETCH_FROM_GIT_PATH}) + message("Using PICO_SDK_FETCH_FROM_GIT_PATH from environment ('${PICO_SDK_FETCH_FROM_GIT_PATH}')") +endif () + +if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_TAG} AND (NOT PICO_SDK_FETCH_FROM_GIT_TAG)) + set(PICO_SDK_FETCH_FROM_GIT_TAG $ENV{PICO_SDK_FETCH_FROM_GIT_TAG}) + message("Using PICO_SDK_FETCH_FROM_GIT_TAG from environment ('${PICO_SDK_FETCH_FROM_GIT_TAG}')") +endif () + +if (PICO_SDK_FETCH_FROM_GIT AND NOT PICO_SDK_FETCH_FROM_GIT_TAG) + set(PICO_SDK_FETCH_FROM_GIT_TAG "master") + message("Using master as default value for PICO_SDK_FETCH_FROM_GIT_TAG") +endif() + +set(PICO_SDK_PATH "${PICO_SDK_PATH}" CACHE PATH "Path to the Raspberry Pi Pico SDK") +set(PICO_SDK_FETCH_FROM_GIT "${PICO_SDK_FETCH_FROM_GIT}" CACHE BOOL "Set to ON to fetch copy of SDK from git if not otherwise locatable") +set(PICO_SDK_FETCH_FROM_GIT_PATH "${PICO_SDK_FETCH_FROM_GIT_PATH}" CACHE FILEPATH "location to download SDK") +set(PICO_SDK_FETCH_FROM_GIT_TAG "${PICO_SDK_FETCH_FROM_GIT_TAG}" CACHE FILEPATH "release tag for SDK") + +if (NOT PICO_SDK_PATH) + if (PICO_SDK_FETCH_FROM_GIT) + include(FetchContent) + set(FETCHCONTENT_BASE_DIR_SAVE ${FETCHCONTENT_BASE_DIR}) + if (PICO_SDK_FETCH_FROM_GIT_PATH) + get_filename_component(FETCHCONTENT_BASE_DIR "${PICO_SDK_FETCH_FROM_GIT_PATH}" REALPATH BASE_DIR "${CMAKE_SOURCE_DIR}") + endif () + # GIT_SUBMODULES_RECURSE was added in 3.17 + if (${CMAKE_VERSION} VERSION_GREATER_EQUAL "3.17.0") + FetchContent_Declare( + pico_sdk + GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk + GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG} + GIT_SUBMODULES_RECURSE FALSE + ) + else () + FetchContent_Declare( + pico_sdk + GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk + GIT_TAG ${PICO_SDK_FETCH_FROM_GIT_TAG} + ) + endif () + + if (NOT pico_sdk) + message("Downloading Raspberry Pi Pico SDK") + FetchContent_Populate(pico_sdk) + set(PICO_SDK_PATH ${pico_sdk_SOURCE_DIR}) + endif () + set(FETCHCONTENT_BASE_DIR ${FETCHCONTENT_BASE_DIR_SAVE}) + else () + message(FATAL_ERROR + "SDK location was not specified. Please set PICO_SDK_PATH or set PICO_SDK_FETCH_FROM_GIT to on to fetch from git." + ) + endif () +endif () + +get_filename_component(PICO_SDK_PATH "${PICO_SDK_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}") +if (NOT EXISTS ${PICO_SDK_PATH}) + message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' not found") +endif () + +set(PICO_SDK_INIT_CMAKE_FILE ${PICO_SDK_PATH}/pico_sdk_init.cmake) +if (NOT EXISTS ${PICO_SDK_INIT_CMAKE_FILE}) + message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' does not appear to contain the Raspberry Pi Pico SDK") +endif () + +set(PICO_SDK_PATH ${PICO_SDK_PATH} CACHE PATH "Path to the Raspberry Pi Pico SDK" FORCE) + +include(${PICO_SDK_INIT_CMAKE_FILE}) diff --git a/pico_sdk_sigrok/pico_sdk_sigrok.c b/pico_sdk_sigrok/pico_sdk_sigrok.c index ecf2c8a1..38ddc2a3 100644 --- a/pico_sdk_sigrok/pico_sdk_sigrok.c +++ b/pico_sdk_sigrok/pico_sdk_sigrok.c @@ -8,23 +8,19 @@ #include #include "pico/stdlib.h" //uart definitions -#include //atoi,atol +#include //atoi,atol, malloc #include "hardware/gpio.h" -//Note: Hardware libraries must be added to CMakelists.txt #include "hardware/pio.h" #include "hardware/adc.h" #include "hardware/dma.h" #include "hardware/structs/bus_ctrl.h" -#include "hardware/structs/pwm.h" -#include "hardware/sync.h" //wev -#include "pico/binary_info.h" -#include "stdarg.h" -#include "pico/multicore.h" -#include -#include "sr_device.h" +#include "hardware/uart.h" #include "hardware/clocks.h" +#include "pico/multicore.h" #include "tusb.h"//.tud_cdc_write... +#include "sr_device.h" + //NODMA is a debug mode that disables the DMA engine and prints raw PIO FIFO outputs //it is limited to testing a small number of samples equal to the PIO FIFO depths //#define NODMA 1 @@ -32,7 +28,6 @@ //#define D4_DBG 1 //#define D4_DBG2 2 - uint8_t *capture_buf; volatile uint32_t c1cnt=0; volatile uint32_t c0cnt=0; @@ -684,7 +679,7 @@ int main(){ uint64_t starttime,endtime; set_sys_clock_khz(SYS_CLK_BASE,true); stdio_usb_init(); - uart_set_format(uart0,8,1,1); + uart_set_format(uart0,8,1,0); uart_init(uart0,921600); gpio_set_function(0, GPIO_FUNC_UART); gpio_set_function(1, GPIO_FUNC_UART); diff --git a/pico_sdk_sigrok/sr_device.c b/pico_sdk_sigrok/sr_device.c new file mode 100644 index 00000000..bc1b7e4d --- /dev/null +++ b/pico_sdk_sigrok/sr_device.c @@ -0,0 +1,273 @@ +#include "sr_device.h" +#include "hardware/uart.h" + +#include +#include +#include +#include + +int Dprintf(const char *fmt, ...) +{ + va_list argptr; + int len = 1; + char _dstr[256]; + + memset(&_dstr, 0x00, sizeof(_dstr)); + va_start(argptr, fmt); + len = vsprintf(_dstr, fmt, argptr); + va_end(argptr); + + if ((len > 0) && (len < 240)) + { + uart_puts(uart0, _dstr); + uart_tx_wait_blocking(uart0); + } + else + { + uart_puts(uart0, "UART OVRFLW"); + uart_tx_wait_blocking(uart0); + } + return len; +} + +// reset as part of init, or on a completed send +void reset(sr_device_t *d) +{ + d->sending = 0; + d->cont = 0; + d->aborted = false; + d->started = false; + d->scnt = 0; + // d->notfirst=false; + // Set triggered by default so that we don't check for HW triggers + // unless the driver sends a trigger command + // d->triggered=true; + // d->tlval=0; + // d->lvl0mask=0; + // d->lvl1mask=0; + // d->risemask=0; + // d->fallmask=0; + // d->chgmask=0; +}; +// initial post reset state +void init(sr_device_t *d) +{ + reset(d); + d->a_mask = 0; + d->d_mask = 0; + d->sample_rate = 5000; + d->num_samples = 10; + d->a_chan_cnt = 0; + d->d_nps = 0; + d->cmdstrptr = 0; +} +void tx_init(sr_device_t *d) +{ + // A reset should have already been called to restart the device. + // An additional one here would clear trigger and other state that had been updated + // reset(d); + d->a_chan_cnt = 0; + for (int i = 0; i < NUM_A_CHAN; i++) + { + if (((d->a_mask) >> i) & 1) + { + d->a_chan_cnt++; + } + } + // Nibbles per slice controls how PIO digital data is stored + // Only support 0,1,2,4 or 8, which use 0,4,8,16 or 32 bits of PIO fifo data + // per sample clock. + d->d_nps = (d->d_mask & 0xF) ? 1 : 0; + d->d_nps = (d->d_mask & 0xF0) ? (d->d_nps) + 1 : d->d_nps; + d->d_nps = (d->d_mask & 0xFF00) ? (d->d_nps) + 2 : d->d_nps; + d->d_nps = (d->d_mask & 0xFFFF0000) ? (d->d_nps) + 4 : d->d_nps; + // Dealing with samples on a per nibble, rather than per byte basis in non D4 mode + // creates a bunch of annoying special cases, so forcing non D4 mode to always store a minimum + // of 8 bits. + if ((d->d_nps == 1) && (d->a_chan_cnt > 0)) + { + d->d_nps = 2; + } + + // Digital channels must enable from D0 and go up, but that is checked by the host + d->d_chan_cnt = 0; + for (int i = 0; i < NUM_D_CHAN; i++) + { + if (((d->d_mask) >> i) & 1) + { + // Dprintf("i %d inv %d mask %X\n\r",i,invld,d->d_mask); + d->d_chan_cnt++; + } + } + d->d_tx_bps = (d->d_chan_cnt + 6) / 7; + d->sending = true; +} +// Process incoming character stream +// Return 1 if the device rspstr has a response to send to host +// Be sure that rspstr does not have \n or \r. +int process_char(sr_device_t *d, char charin) +{ + int tmpint, tmpint2, ret; + // set default rspstr for all commands that have a dataless ack + d->rspstr[0] = '*'; + d->rspstr[1] = 0; + // the reset character works by itself + if (charin == '*') + { + reset(d); + Dprintf("RST* %d\n\r", d->sending); + return 0; + } + else if ((charin == '\r') || (charin == '\n')) + { + d->cmdstr[d->cmdstrptr] = 0; + switch (d->cmdstr[0]) + { + case 'i': + // SREGEN,AxxyDzz,00 - num analog, analog size, num digital,version + sprintf(d->rspstr, "SRPICO,A%02d1D%02d,02", NUM_A_CHAN, NUM_D_CHAN); + Dprintf("ID rsp %s\n\r", d->rspstr); + ret = 1; + break; + case 'R': + tmpint = atol(&(d->cmdstr[1])); + if ((tmpint >= 5000) && (tmpint <= 120000016)) + { // Add 16 to support cfg_bits + d->sample_rate = tmpint; + // Dprintf("SMPRATE= %u\n\r",d->sample_rate); + ret = 1; + } + else + { + Dprintf("unsupported smp rate %s\n\r", d->cmdstr); + ret = 0; + } + break; + // sample limit + case 'L': + tmpint = atol(&(d->cmdstr[1])); + if (tmpint > 0) + { + d->num_samples = tmpint; + // Dprintf("NUMSMP=%u\n\r",d->num_samples); + ret = 1; + } + else + { + Dprintf("bad num samples %s\n\r", d->cmdstr); + ret = 0; + } + break; + case 'a': + tmpint = atoi(&(d->cmdstr[1])); // extract channel number + if (tmpint >= 0) + { + // scale and offset are both in integer uVolts + // separated by x + sprintf(d->rspstr, "25700x0"); // 3.3/(2^7) and 0V offset + // Dprintf("ASCL%d\n\r",tmpint); + ret = 1; + } + else + { + Dprintf("bad ascale %s\n\r", d->cmdstr); + ret = 1; // this will return a '*' causing the host to fail + } + break; + case 'F': // fixed set of samples + Dprintf("STRT_FIX\n\r"); + tx_init(d); + d->cont = 0; + ret = 0; + break; + case 'C': // continous mode + tx_init(d); + d->cont = 1; + Dprintf("STRT_CONT\n\r"); + ret = 0; + break; + case 't': // trigger -format tvxx where v is value and xx is two digit channel + /*HW trigger depracated + tmpint=d->cmdstr[1]-'0'; + tmpint2=atoi(&(d->cmdstr[2])); //extract channel number which starts at D2 + //Dprintf("Trigger input %d val %d\n\r",tmpint2,tmpint); + if((tmpint2>=2)&&(tmpint>=0)&&(tmpint<=4)){ + d->triggered=false; + switch(tmpint){ + case 0: d->lvl0mask|=1<<(tmpint2-2);break; + case 1: d->lvl1mask|=1<<(tmpint2-2);break; + case 2: d->risemask|=1<<(tmpint2-2);break; + case 3: d->fallmask|=1<<(tmpint2-2);break; + default: d->chgmask|=1<<(tmpint2-2);break; + } + //Dprintf("Trigger channel %d val %d 0x%X\n\r",tmpint2,tmpint,d->lvl0mask); + //Dprintf("LVL0mask 0x%X\n\r",d->lvl0mask); + //Dprintf("LVL1mask 0x%X\n\r",d->lvl1mask); + //Dprintf("risemask 0x%X\n\r",d->risemask); + //Dprintf("fallmask 0x%X\n\r",d->fallmask); + //Dprintf("edgemask 0x%X\n\r",d->chgmask); + }else{ + Dprintf("bad trigger channel %d val %d\n\r",tmpint2,tmpint); + d->triggered=true; + } + */ + ret = 1; + break; + case 'p': // pretrigger count + tmpint = atoi(&(d->cmdstr[1])); + Dprintf("Pre-trigger samples %d cmd %s\n\r", tmpint, d->cmdstr); + ret = 1; + break; + // format is Axyy where x is 0 for disabled, 1 for enabled and yy is channel # + case 'A': /// enable analog channel always a set + tmpint = d->cmdstr[1] - '0'; // extract enable value + tmpint2 = atoi(&(d->cmdstr[2])); // extract channel number + if ((tmpint >= 0) && (tmpint <= 1) && (tmpint2 >= 0) && (tmpint2 <= 31)) + { + d->a_mask = d->a_mask & ~(1 << tmpint2); + d->a_mask = d->a_mask | (tmpint << tmpint2); + // Dprintf("A%d EN %d Msk 0x%X\n\r",tmpint2,tmpint,d->a_mask); + ret = 1; + } + else + { + ret = 0; + } + break; + // format is Dxyy where x is 0 for disabled, 1 for enabled and yy is channel # + case 'D': /// enable digital channel always a set + tmpint = d->cmdstr[1] - '0'; // extract enable value + tmpint2 = atoi(&(d->cmdstr[2])); // extract channel number + if ((tmpint >= 0) && (tmpint <= 1) && (tmpint2 >= 0) && (tmpint2 <= 31)) + { + d->d_mask = d->d_mask & ~(1 << tmpint2); + d->d_mask = d->d_mask | (tmpint << tmpint2); + // Dprintf("D%d EN %d Msk 0x%X\n\r",tmpint2,tmpint,d->d_mask); + ret = 1; + } + else + { + ret = 0; + } + break; + default: + Dprintf("bad command %s\n\r", d->cmdstr); + ret = 0; + } // case + // Dprintf("CmdDone %s\n\r",d->cmdstr); + d->cmdstrptr = 0; + } + else + { // no CR/LF + if (d->cmdstrptr >= 19) + { + d->cmdstr[18] = 0; + Dprintf("Command overflow %s\n\r", d->cmdstr); + d->cmdstrptr = 0; + } + d->cmdstr[d->cmdstrptr++] = charin; + ret = 0; + } // else + // default return 0 means to not send any kind of response + return ret; +} // process_char diff --git a/pico_sdk_sigrok/sr_device.h b/pico_sdk_sigrok/sr_device.h index fe366237..e28255bf 100644 --- a/pico_sdk_sigrok/sr_device.h +++ b/pico_sdk_sigrok/sr_device.h @@ -1,312 +1,101 @@ -//Pin usage -//GP0 and 1 are reserved for debug uart -//GP2-GP22 are digital inputs -//GP23 controls power supply modes and is not a board input -//GP24-25 are not on the board and not used -//GP26-28 are ADC. -//number of analog channels +#ifndef SR_DEVICE_H +#define SR_DEVICE_H +#include +#include + +// Pin usage +// GP0 and 1 are reserved for debug uart +// GP2-GP22 are digital inputs +// GP23 controls power supply modes and is not a board input +// GP24-25 are not on the board and not used +// GP26-28 are ADC. +// number of analog channels #define NUM_A_CHAN 3 -//number of digital channels +// number of digital channels #define NUM_D_CHAN 21 -//Mask of bits 22:2 to use as inputs - +// Mask of bits 22:2 to use as inputs - #define GPIO_D_MASK 0x7FFFFC -//Storage size of the DMA buffer. The buffer is split into two halves so that when the first -//buffer fills we can send the trace data serially while the other buffer is DMA'dinto +// Storage size of the DMA buffer. The buffer is split into two halves so that when the first +// buffer fills we can send the trace data serially while the other buffer is DMA'dinto #define DMA_BUF_SIZE 220000 -//The size of the buffer sent to the CDC serial -//The TUD CDC buffer is only 256B so it doesn't help to have more than this. +// The size of the buffer sent to the CDC serial +// The TUD CDC buffer is only 256B so it doesn't help to have more than this. #define TX_BUF_SIZE 260 #define UART_BAUD 921600 -//This sets the point which we will send data from the txbuf to the usb cdc. -//For the 5-21 channel RLE it must leave a spare ~83 entries to cover the case where -//a new long steady input comes after deciding to not send a sample. +// This sets the point which we will send data from the txbuf to the usb cdc. +// For the 5-21 channel RLE it must leave a spare ~83 entries to cover the case where +// a new long steady input comes after deciding to not send a sample. //(Assuming 128KB samples per half, a max rle value of 1568 we can get -// 256*1024/2/1568=83 max length rles on a steady input). -//Other than that the value is not very specific because the usb tub code -//implement a 256 entry fifo that queues things up and sends max length 64B transactions -//20 is arbitrarly picked to ensure that if we have even a little we send it so that -//at least something goes across the link. +// 256*1024/2/1568=83 max length rles on a steady input). +// Other than that the value is not very specific because the usb tub code +// implement a 256 entry fifo that queues things up and sends max length 64B transactions +// 20 is arbitrarly picked to ensure that if we have even a little we send it so that +// at least something goes across the link. #define TX_BUF_THRESH 20 -//Base value of sys_clk in khz. Must be <=125Mhz per RP2040 spec and a multiple of 24Mhz -//to support integer divisors of the PIO clock and ADC clock +// Base value of sys_clk in khz. Must be <=125Mhz per RP2040 spec and a multiple of 24Mhz +// to support integer divisors of the PIO clock and ADC clock #define SYS_CLK_BASE 120000 -//Boosted sys_clk in khz. Runs the part above its specifed frequency limit to support faster -//processing of digital run length encoding which in some cases may allow for faster -//streaming of digital only data. +// Boosted sys_clk in khz. Runs the part above its specifed frequency limit to support faster +// processing of digital run length encoding which in some cases may allow for faster +// streaming of digital only data. //**************************** -//Use this at your own risk +// Use this at your own risk //*************************** -//Frequency must be a 24Mhz multiple and less than 300Mhz to avoid known issues -//The authors PICO failed at 288Mhz, but testing with 240Mhz seemed reliable -//#define SYS_CLK_BOOST_EN 1 -//#define SYS_CLK_BOOST_FREQ 240000 -int Dprintf(const char *fmt, ...) -{ - - va_list argptr; - int len = 1; - char _dstr[256]; - +// Frequency must be a 24Mhz multiple and less than 300Mhz to avoid known issues +// The authors PICO failed at 288Mhz, but testing with 240Mhz seemed reliable +// #define SYS_CLK_BOOST_EN 1 +// #define SYS_CLK_BOOST_FREQ 240000 - memset(&_dstr, 0x00, sizeof(_dstr) ); - va_start(argptr, fmt); - len = vsprintf(_dstr, fmt, argptr); - va_end(argptr); - - if ( (len > 0) && (len < 240 ) ) - { +typedef struct +{ + uint32_t sample_rate; + uint32_t num_samples; + uint32_t a_mask, d_mask; + uint32_t samples_per_half; // number of samples for one of the 4 dma target arrays + uint8_t a_chan_cnt; // count of enabled analog channels + uint8_t d_chan_cnt; // count of enabled digital channels + uint8_t d_tx_bps; // Digital Transmit bytes per slice + // Pins sampled by the PIO - 4,8,16 or 32 + uint8_t pin_count; + uint8_t d_nps; // digital nibbles per slice from a PIO/DMA perspective. + uint32_t scnt; // number of samples sent + char cmdstrptr; + char cmdstr[20]; // used for parsing input + uint32_t d_size, a_size; // size of each of the two data buffers for each of a& d + uint32_t dbuf0_start, dbuf1_start, abuf0_start, abuf1_start; // starting memory pointers of adc buffers + char rspstr[20]; + // mark key control variables voltatile since multiple cores might access them + volatile bool started; + volatile bool sending; + volatile bool cont; + volatile bool aborted; + /*Depracated trigger logic + //If HW trigger enabled, uncomment all usages + //volatile bool notfirst; //Have we processed at least a first sample (so that lval is correct + // volatile bool triggered; + // uint32_t tlval; //last digital sample value - must keep it across multiple calls to send_slices for trigger + // uint32_t lvl0mask,lvl1mask,risemask,fallmask,chgmask; + End depracated trigger logic*/ +} sr_device_t; - uart_puts(uart0,_dstr); - uart_tx_wait_blocking(uart0); - } - else{ - uart_puts(uart0,"UART OVRFLW"); - uart_tx_wait_blocking(uart0); - - } - return len; - -} -typedef struct sr_device { - uint32_t sample_rate; - uint32_t num_samples; - uint32_t a_mask,d_mask; - uint32_t samples_per_half; //number of samples for one of the 4 dma target arrays - uint8_t a_chan_cnt; //count of enabled analog channels - uint8_t d_chan_cnt; //count of enabled digital channels - uint8_t d_tx_bps; //Digital Transmit bytes per slice - //Pins sampled by the PIO - 4,8,16 or 32 - uint8_t pin_count; - uint8_t d_nps; //digital nibbles per slice from a PIO/DMA perspective. - uint32_t scnt; //number of samples sent - char cmdstrptr; - char cmdstr[20];//used for parsing input - uint32_t d_size,a_size; //size of each of the two data buffers for each of a& d - uint32_t dbuf0_start,dbuf1_start,abuf0_start,abuf1_start; //starting memory pointers of adc buffers - char rspstr[20]; -//mark key control variables voltatile since multiple cores might access them - volatile bool started; - volatile bool sending; - volatile bool cont; - volatile bool aborted; - /*Depracated trigger logic -//If HW trigger enabled, uncomment all usages - //volatile bool notfirst; //Have we processed at least a first sample (so that lval is correct - // volatile bool triggered; - // uint32_t tlval; //last digital sample value - must keep it across multiple calls to send_slices for trigger - // uint32_t lvl0mask,lvl1mask,risemask,fallmask,chgmask; - End depracated trigger logic*/ +// initialize debug uart +int Dprintf(const char *fmt, ...); - } sr_device_t; +// Process incoming character stream +int process_char(sr_device_t *d, char charin); +// reset as part of init, or on a completed send +void reset(sr_device_t *d); -//reset as part of init, or on a completed send -void reset(sr_device_t *d){ - d->sending=0; - d->cont=0; - d->aborted=false; - d->started=false; - d->scnt=0; - //d->notfirst=false; - //Set triggered by default so that we don't check for HW triggers - //unless the driver sends a trigger command - //d->triggered=true; - //d->tlval=0; - //d->lvl0mask=0; - //d->lvl1mask=0; - //d->risemask=0; - //d->fallmask=0; - //d->chgmask=0; -}; -//initial post reset state -void init(sr_device_t *d){ - reset(d); - d->a_mask=0; - d->d_mask=0; - d->sample_rate=5000; - d->num_samples=10; - d->a_chan_cnt=0; - d->d_nps=0; - d->cmdstrptr=0; -} -void tx_init(sr_device_t *d){ - //A reset should have already been called to restart the device. - //An additional one here would clear trigger and other state that had been updated - // reset(d); - d->a_chan_cnt=0; - for(int i=0;ia_mask)>>i)&1){d->a_chan_cnt++;} - } - //Nibbles per slice controls how PIO digital data is stored - //Only support 0,1,2,4 or 8, which use 0,4,8,16 or 32 bits of PIO fifo data - //per sample clock. - d->d_nps=(d->d_mask& 0xF) ? 1 : 0; - d->d_nps=(d->d_mask& 0xF0) ? (d->d_nps)+1 : d->d_nps; - d->d_nps=(d->d_mask& 0xFF00) ? (d->d_nps)+2 : d->d_nps; - d->d_nps=(d->d_mask&0xFFFF0000) ? (d->d_nps)+4 : d->d_nps; - //Dealing with samples on a per nibble, rather than per byte basis in non D4 mode - //creates a bunch of annoying special cases, so forcing non D4 mode to always store a minimum - //of 8 bits. - if((d->d_nps==1)&&(d->a_chan_cnt>0)){d->d_nps=2;} +// initial post reset state +void init(sr_device_t *d); - //Digital channels must enable from D0 and go up, but that is checked by the host - d->d_chan_cnt=0; - for(int i=0;id_mask)>>i)&1){ - // Dprintf("i %d inv %d mask %X\n\r",i,invld,d->d_mask); - d->d_chan_cnt++; - } - } - d->d_tx_bps=(d->d_chan_cnt+6)/7; - d->sending=true; - -} -//Process incoming character stream -//Return 1 if the device rspstr has a response to send to host -//Be sure that rspstr does not have \n or \r. -int process_char(sr_device_t *d,char charin){ - int tmpint,tmpint2,ret; - //set default rspstr for all commands that have a dataless ack - d->rspstr[0]='*'; - d->rspstr[1]=0; - //the reset character works by itself - if(charin=='*'){ - reset(d); - Dprintf("RST* %d\n\r",d->sending); - return 0; - }else if((charin=='\r')||(charin=='\n')){ - d->cmdstr[d->cmdstrptr]=0; - switch(d->cmdstr[0]){ - case 'i': - //SREGEN,AxxyDzz,00 - num analog, analog size, num digital,version - sprintf(d->rspstr,"SRPICO,A%02d1D%02d,02",NUM_A_CHAN,NUM_D_CHAN); - Dprintf("ID rsp %s\n\r",d->rspstr); - ret=1; - break; - case 'R': - tmpint=atol(&(d->cmdstr[1])); - if((tmpint>=5000)&&(tmpint<=120000016)){ //Add 16 to support cfg_bits - d->sample_rate=tmpint; - //Dprintf("SMPRATE= %u\n\r",d->sample_rate); - ret=1; - } - else { - Dprintf("unsupported smp rate %s\n\r",d->cmdstr); - ret=0; - } - break; - //sample limit - case 'L': - tmpint=atol(&(d->cmdstr[1])); - if(tmpint>0){ - d->num_samples=tmpint; - //Dprintf("NUMSMP=%u\n\r",d->num_samples); - ret=1; - }else{ - Dprintf("bad num samples %s\n\r",d->cmdstr); - ret=0; - } - break; - case 'a': - tmpint=atoi(&(d->cmdstr[1])); //extract channel number - if(tmpint>=0){ - //scale and offset are both in integer uVolts - //separated by x - sprintf(d->rspstr,"25700x0"); //3.3/(2^7) and 0V offset - //Dprintf("ASCL%d\n\r",tmpint); - ret=1; - }else{ - Dprintf("bad ascale %s\n\r",d->cmdstr); - ret=1; //this will return a '*' causing the host to fail - } - break; - case 'F': //fixed set of samples - Dprintf("STRT_FIX\n\r"); - tx_init(d); - d->cont=0; - ret=0; - break; - case 'C': //continous mode - tx_init(d); - d->cont=1; - Dprintf("STRT_CONT\n\r"); - ret=0; - break; - case 't': //trigger -format tvxx where v is value and xx is two digit channel - /*HW trigger depracated - tmpint=d->cmdstr[1]-'0'; - tmpint2=atoi(&(d->cmdstr[2])); //extract channel number which starts at D2 - //Dprintf("Trigger input %d val %d\n\r",tmpint2,tmpint); - if((tmpint2>=2)&&(tmpint>=0)&&(tmpint<=4)){ - d->triggered=false; - switch(tmpint){ - case 0: d->lvl0mask|=1<<(tmpint2-2);break; - case 1: d->lvl1mask|=1<<(tmpint2-2);break; - case 2: d->risemask|=1<<(tmpint2-2);break; - case 3: d->fallmask|=1<<(tmpint2-2);break; - default: d->chgmask|=1<<(tmpint2-2);break; - } - //Dprintf("Trigger channel %d val %d 0x%X\n\r",tmpint2,tmpint,d->lvl0mask); - //Dprintf("LVL0mask 0x%X\n\r",d->lvl0mask); - //Dprintf("LVL1mask 0x%X\n\r",d->lvl1mask); - //Dprintf("risemask 0x%X\n\r",d->risemask); - //Dprintf("fallmask 0x%X\n\r",d->fallmask); - //Dprintf("edgemask 0x%X\n\r",d->chgmask); - }else{ - Dprintf("bad trigger channel %d val %d\n\r",tmpint2,tmpint); - d->triggered=true; - } - */ - ret=1; - break; - case 'p': //pretrigger count - tmpint=atoi(&(d->cmdstr[1])); - Dprintf("Pre-trigger samples %d cmd %s\n\r",tmpint,d->cmdstr); - ret=1; - break; - //format is Axyy where x is 0 for disabled, 1 for enabled and yy is channel # - case 'A': ///enable analog channel always a set - tmpint=d->cmdstr[1]-'0'; //extract enable value - tmpint2=atoi(&(d->cmdstr[2])); //extract channel number - if((tmpint>=0)&&(tmpint<=1)&&(tmpint2>=0)&&(tmpint2<=31)){ - d->a_mask=d->a_mask & ~(1<a_mask=d->a_mask | (tmpint<a_mask); - ret=1; - }else{ - ret=0; - } - break; - //format is Dxyy where x is 0 for disabled, 1 for enabled and yy is channel # - case 'D': ///enable digital channel always a set - tmpint=d->cmdstr[1]-'0'; //extract enable value - tmpint2=atoi(&(d->cmdstr[2])); //extract channel number - if((tmpint>=0)&&(tmpint<=1)&&(tmpint2>=0)&&(tmpint2<=31)){ - d->d_mask=d->d_mask & ~(1<d_mask=d->d_mask | (tmpint<d_mask); - ret=1; - }else{ - ret=0; - } - break; - default: - Dprintf("bad command %s\n\r",d->cmdstr); - ret=0; - }//case -// Dprintf("CmdDone %s\n\r",d->cmdstr); - d->cmdstrptr=0; - }else{ //no CR/LF - if(d->cmdstrptr>=19){ - d->cmdstr[18]=0; - Dprintf("Command overflow %s\n\r",d->cmdstr); - d->cmdstrptr=0; - } - d->cmdstr[d->cmdstrptr++]=charin; - ret=0; - }//else -//default return 0 means to not send any kind of response - return ret; -}//process_char +// Initialize the tx buffer +void tx_init(sr_device_t *d); +// Process incoming character stream +// Return 1 if the device rspstr has a response to send to host +// Be sure that rspstr does not have \n or \r. +int process_char(sr_device_t *d, char charin); +#endif /* SR_DEVICE_H */