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Merge branch 'develop' into clock-configure-mhz
2 parents 14c9797 + 7dfbb3c commit ca9e63e

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‎MODULE.bazel

+2-2
Original file line numberDiff line numberDiff line change
@@ -90,15 +90,15 @@ new_git_repository = use_repo_rule("@bazel_tools//tools/build_defs/repo:git.bzl"
9090
new_git_repository(
9191
name = "tinyusb",
9292
build_file = "//src/rp2_common/tinyusb:tinyusb.BUILD",
93-
commit = "5217cee5de4cd555018da90f9f1bcc87fb1c1d3a", # keep-in-sync-with-submodule: lib/tinyusb
93+
commit = "86ad6e56c1700e85f1c5678607a762cfe3aa2f47", # keep-in-sync-with-submodule: lib/tinyusb
9494
remote = "https://github.com/hathach/tinyusb.git",
9595
)
9696

9797
# TODO: Provide btstack as a proper Bazel module.
9898
new_git_repository(
9999
name = "btstack",
100100
build_file = "//src/rp2_common/pico_btstack:btstack.BUILD",
101-
commit = "2b49e57bd1fae85ac32ac1f41cdb7c794de335f6", # keep-in-sync-with-submodule: lib/btstack
101+
commit = "501e6d2b86e6c92bfb9c390bcf55709938e25ac1", # keep-in-sync-with-submodule: lib/btstack
102102
remote = "https://github.com/bluekitchen/btstack.git",
103103
)
104104

‎cmake/preload/toolchains/pico_arm_clang_arm.cmake

-2
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,3 @@
1-
# NOTE: THIS IS A WIP ONLY PICO_ARM_GCC IS CURRENTLY SUPPORTED
2-
# todo there is probably a more "cmake" way of doing this going thru the standard path with our "PICO" platform
31
# i.e. CMake<Lang>Information and whatnot
42
include(${CMAKE_CURRENT_LIST_DIR}/util/find_compiler.cmake)
53

‎cmake/preload/toolchains/pico_arm_cortex_m33_clang.cmake

+1-1
Original file line numberDiff line numberDiff line change
@@ -4,5 +4,5 @@ set(CMAKE_SYSTEM_PROCESSOR cortex-m33)
44
set(PICO_CLANG_RUNTIMES armv8m.main_soft_nofp armv8m.main-unknown-none-eabi)
55

66
set(PICO_COMMON_LANG_FLAGS "-mcpu=cortex-m33 --target=armv8m.main-none-eabi -mfloat-abi=softfp -march=armv8m.main+fp+dsp")
7-
7+
set(PICO_DISASM_OBJDUMP_ARGS --mcpu=cortex-m33 --arch=armv8m.main+fp+dsp)
88
include(${CMAKE_CURRENT_LIST_DIR}/util/pico_arm_clang_common.cmake)

‎lib/btstack

Submodule btstack updated 444 files

‎lib/tinyusb

Submodule tinyusb updated 616 files

‎src/boards/include/boards/sparkfun_iotnode_lorawan_rp2350.h

+88
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,88 @@
1+
/*
2+
* Copyright (c) 2024 Raspberry Pi (Trading) Ltd.
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
// -----------------------------------------------------
8+
// NOTE: THIS HEADER IS ALSO INCLUDED BY ASSEMBLER SO
9+
// SHOULD ONLY CONSIST OF PREPROCESSOR DIRECTIVES
10+
// -----------------------------------------------------
11+
// Board definition for the SparkFun IoT Node LoRaWAN
12+
//
13+
// This header may be included by other board headers as "boards/sparkfun_iotnode_lorawan_rp2350.h"
14+
15+
// pico_cmake_set PICO_PLATFORM=rp2350
16+
17+
#ifndef _BOARDS_SPARKFUN_IOTNODE_LORAWAN_RP2350_H
18+
#define _BOARDS_SPARKFUN_IOTNODE_LORAWAN_RP2350_H
19+
20+
// For board detection
21+
#define SPARKFUN_IOTNODE_LORAWAN_RP2350
22+
23+
// --- RP2350 VARIANT ---
24+
#define PICO_RP2350A 1
25+
26+
// --- UART ---
27+
#ifndef PICO_DEFAULT_UART
28+
#define PICO_DEFAULT_UART 0
29+
#endif
30+
#ifndef PICO_DEFAULT_UART_TX_PIN
31+
#define PICO_DEFAULT_UART_TX_PIN 18
32+
#endif
33+
#ifndef PICO_DEFAULT_UART_RX_PIN
34+
#define PICO_DEFAULT_UART_RX_PIN 19
35+
#endif
36+
37+
// --- LED ---
38+
#ifndef PICO_DEFAULT_WS2812_PIN
39+
#define PICO_DEFAULT_WS2812_PIN 25
40+
#endif
41+
42+
// --- I2C ---
43+
#ifndef PICO_DEFAULT_I2C
44+
#define PICO_DEFAULT_I2C 0
45+
#endif
46+
#ifndef PICO_DEFAULT_I2C_SDA_PIN
47+
#define PICO_DEFAULT_I2C_SDA_PIN 20
48+
#endif
49+
#ifndef PICO_DEFAULT_I2C_SCL_PIN
50+
#define PICO_DEFAULT_I2C_SCL_PIN 21
51+
#endif
52+
53+
// --- SPI ---
54+
#ifndef PICO_DEFAULT_SPI
55+
#define PICO_DEFAULT_SPI 1
56+
#endif
57+
#ifndef PICO_DEFAULT_SPI_SCK_PIN
58+
#define PICO_DEFAULT_SPI_SCK_PIN 14
59+
#endif
60+
#ifndef PICO_DEFAULT_SPI_TX_PIN
61+
#define PICO_DEFAULT_SPI_TX_PIN 15
62+
#endif
63+
#ifndef PICO_DEFAULT_SPI_RX_PIN
64+
#define PICO_DEFAULT_SPI_RX_PIN 12
65+
#endif
66+
#ifndef PICO_DEFAULT_SPI_CSN_PIN
67+
#define PICO_DEFAULT_SPI_CSN_PIN 13
68+
#endif
69+
70+
// --- FLASH ---
71+
72+
#define PICO_BOOT_STAGE2_CHOOSE_W25Q080 1
73+
74+
#ifndef PICO_FLASH_SPI_CLKDIV
75+
#define PICO_FLASH_SPI_CLKDIV 2
76+
#endif
77+
78+
// pico_cmake_set_default PICO_FLASH_SIZE_BYTES = (16 * 1024 * 1024)
79+
#ifndef PICO_FLASH_SIZE_BYTES
80+
#define PICO_FLASH_SIZE_BYTES (16 * 1024 * 1024)
81+
#endif
82+
83+
// pico_cmake_set_default PICO_RP2350_A2_SUPPORTED = 1
84+
#ifndef PICO_RP2350_A2_SUPPORTED
85+
#define PICO_RP2350_A2_SUPPORTED 1
86+
#endif
87+
88+
#endif

‎src/cmake/on_device.cmake

+1-2
Original file line numberDiff line numberDiff line change
@@ -37,10 +37,9 @@ function(pico_add_dis_output TARGET)
3737
set(EXTRA_COMMAND COMMAND picotool coprodis --quiet ${output_path}$<IF:$<BOOL:$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>>,$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>,$<TARGET_PROPERTY:${TARGET},NAME>>.dis ${output_path}$<IF:$<BOOL:$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>>,$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>,$<TARGET_PROPERTY:${TARGET},NAME>>.dis)
3838
endif()
3939
endif()
40-
4140
add_custom_command(TARGET ${TARGET} POST_BUILD
4241
COMMAND ${CMAKE_OBJDUMP} -h $<TARGET_FILE:${TARGET}> > ${output_path}$<IF:$<BOOL:$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>>,$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>,$<TARGET_PROPERTY:${TARGET},NAME>>.dis
43-
COMMAND ${CMAKE_OBJDUMP} -d $<TARGET_FILE:${TARGET}> >> ${output_path}$<IF:$<BOOL:$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>>,$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>,$<TARGET_PROPERTY:${TARGET},NAME>>.dis
42+
COMMAND ${CMAKE_OBJDUMP} -d ${PICO_DISASM_OBJDUMP_ARGS} $<TARGET_FILE:${TARGET}> >> ${output_path}$<IF:$<BOOL:$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>>,$<TARGET_PROPERTY:${TARGET},OUTPUT_NAME>,$<TARGET_PROPERTY:${TARGET},NAME>>.dis
4443
${EXTRA_COMMAND}
4544
VERBATIM
4645
)

‎src/rp2040/pico_platform/include/pico/platform.h

+8
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,10 @@
7777

7878
#ifndef __ASSEMBLER__
7979

80+
#ifdef __cplusplus
81+
extern "C" {
82+
#endif
83+
8084
/*! \brief No-op function for the body of tight loops
8185
* \ingroup pico_platform
8286
*
@@ -210,6 +214,10 @@ return a;
210214
(__builtin_popcount(b) >= 2 ? __mul_instruction(a,b) : (a)*(b)), \
211215
(a)*(b))
212216

217+
#ifdef __cplusplus
218+
}
219+
#endif
220+
213221
#endif // __ASSEMBLER__
214222

215223
#endif

‎src/rp2350/pico_platform/include/pico/platform.h

+8
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,10 @@
7070

7171
#ifndef __ASSEMBLER__
7272

73+
#ifdef __cplusplus
74+
extern "C" {
75+
#endif
76+
7377
/*! \brief No-op function for the body of tight loops
7478
* \ingroup pico_platform
7579
*
@@ -281,6 +285,10 @@ __force_inline static int32_t __mul_instruction(int32_t a, int32_t b) {
281285
(__builtin_popcount(b) >= 2 ? __mul_instruction(a,b) : (a)*(b)), \
282286
(a)*(b))
283287

288+
#ifdef __cplusplus
289+
}
290+
#endif
291+
284292
#endif // __ASSEMBLER__
285293

286294
#endif

‎src/rp2_common/hardware_clocks/clocks.c

+4
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,10 @@ bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32
102102
return false;
103103

104104
uint32_t div = (uint32_t)((((uint64_t) src_freq) << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) / freq);
105+
// only clock divider of 1, or >= 2 are supported
106+
if (div < (2u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB)) {
107+
div = (1u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB);
108+
}
105109
uint32_t actual_freq = (uint32_t) ((((uint64_t) src_freq) << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) / div);
106110

107111
clock_configure_internal(clock, src, auxsrc, actual_freq, div);

‎src/rp2_common/hardware_clocks/include/hardware/clocks.h

+10-3
Original file line numberDiff line numberDiff line change
@@ -262,11 +262,18 @@ extern "C" {
262262

263263
typedef clock_num_t clock_handle_t;
264264

265-
/*! \brief Configure the specified clock
265+
/*! \brief Configure the specified clock with automatic clock divisor setup
266266
* \ingroup hardware_clocks
267267
*
268+
* This method allows both the src_frequency of the input clock source AND the desired
269+
* frequency to be specified, and will set the clock divider to achieve the exact or higher frequency
270+
* achievable, with the maximum being the src_freq.
271+
*
272+
* Note: That the clock hardware only support divisors of exactly 1 or 2.0->65535.0
273+
*
268274
* See the tables in the description for details on the possible values for clock sources.
269275
*
276+
*
270277
* \param clock The clock to configure
271278
* \param src The main clock source, can be 0.
272279
* \param auxsrc The auxiliary clock source, which depends on which clock is being set. Can be 0
@@ -291,7 +298,7 @@ bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32
291298
*/
292299
bool clock_configure_mhz(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint16_t src_freq_mhz, uint16_t freq_mhz);
293300

294-
/*! \brief Configure the specified clock to use the undividded input source
301+
/*! \brief Configure the specified clock to use the undivided input source
295302
* \ingroup hardware_clocks
296303
*
297304
* See the tables in the description for details on the possible values for clock sources.
@@ -303,7 +310,7 @@ bool clock_configure_mhz(clock_handle_t clock, uint32_t src, uint32_t auxsrc, ui
303310
*/
304311
void clock_configure_undivided(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32_t src_freq);
305312

306-
/*! \brief Configure the specified clock to use the undividded input source
313+
/*! \brief Configure the specified clock to use the undivided input source
307314
* \ingroup hardware_clocks
308315
*
309316
* See the tables in the description for details on the possible values for clock sources.

‎src/rp2_common/hardware_dma/include/hardware/dma.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -535,7 +535,7 @@ static inline void dma_channel_start(uint channel) {
535535
*\endcode
536536
*
537537
* \if rp2350_specific
538-
* RP2350 only: Due to errata RP12350-E5 (see the RP2350 datasheet for further detail), it is necessary to clear the enable bit of
538+
* RP2350 only: Due to errata RP2350-E5 (see the RP2350 datasheet for further detail), it is necessary to clear the enable bit of
539539
* the aborted channel and any chained channels prior to the abort to prevent re-triggering.
540540
* \endif
541541
*

‎src/rp2_common/hardware_flash/flash.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -288,7 +288,7 @@ void flash_get_unique_id(uint8_t *id_out) {
288288
#if !PICO_RP2040
289289
// This is a static symbol because the layout of FLASH_DEVINFO is liable to change from device to
290290
// device, so fields must have getters/setters.
291-
static io_rw_16 * flash_devinfo_ptr(void) {
291+
static io_rw_16 * __no_inline_not_in_flash_func(flash_devinfo_ptr)(void) {
292292
// Note the lookup returns a pointer to a 32-bit pointer literal in the ROM
293293
io_rw_16 **p = (io_rw_16 **) rom_data_lookup_inline(ROM_DATA_FLASH_DEVINFO16_PTR);
294294
assert(p);

‎src/rp2_common/hardware_irq/include/hardware/irq.h

+54
Original file line numberDiff line numberDiff line change
@@ -286,6 +286,33 @@ void irq_set_mask_n_enabled(uint n, uint32_t mask, bool enabled);
286286
* This method will assert if there is already any sort of interrupt handler installed
287287
* for the specified irq number.
288288
*
289+
* NOTE: By default, the SDK uses a single shared vector table per core, and the current installed
290+
* IRQ handlers are effectively a linked list starting a vector table entry for a particular IRQ number.
291+
* Therefore, this method (when using the same vector table for both cores) sets the same interrupt handler
292+
* for both cores.
293+
*
294+
* On RP2040 this was never really a cause of any confusion, because it rarely made sense to enable
295+
* the same interrupt number in the NVIC on both cores (see \ref irq_set_enabled()), because the interrupt
296+
* would then fire on both cores, and the interrupt handlers would race.
297+
*
298+
* The problem *does* exist however when dealing with interrupts which are independent on the two cores.
299+
*
300+
* This includes:
301+
*
302+
* * the core local "spare" IRQs
303+
* * on RP2350 the SIO FIFO IRQ which is now the same irq number for both cores (vs RP2040 where it was two)
304+
*
305+
* In the cases where you want to enable the same IRQ on both cores, and both cores are sharing the same vector
306+
* table, you should install the IRQ handler once - it will be used on both cores - and check the core
307+
* number (via \ref get_core_num()) on each core.
308+
*
309+
* NOTE: It is not thread safe to add/remove/handle IRQs for the same irq number in the same vector table
310+
* from both cores concurrently.
311+
*
312+
* NOTE: The SDK defines a PICO_VTABLE_PER_CORE variable indicating whether the two vector tables are separate,
313+
* however as of version 2.1.1 the user cannot set this value, and expect the vector table duplication to be handled
314+
* for them. This functionality will be added in a future SDK version
315+
*
289316
* \param num Interrupt number \ref interrupt_nums
290317
* \param handler The handler to set. See \ref irq_handler_t
291318
* \see irq_add_shared_handler()
@@ -316,6 +343,33 @@ irq_handler_t irq_get_exclusive_handler(uint num);
316343
* the (total across all IRQs on both cores) maximum (configurable via PICO_MAX_SHARED_IRQ_HANDLERS) number of shared handlers
317344
* would be exceeded.
318345
*
346+
* NOTE: By default, the SDK uses a single shared vector table per core, and the current installed
347+
* IRQ handlers are effectively a linked list starting a vector table entry for a particular IRQ number.
348+
* Therefore, this method (when using the same vector table for both cores) add the same interrupt handler
349+
* for both cores.
350+
*
351+
* On RP2040 this was never really a cause of any confusion, because it rarely made sense to enable
352+
* the same interrupt number in the NVIC on both cores (see \ref irq_set_enabled()), because the interrupt
353+
* would then fire on both cores, and the interrupt handlers would race.
354+
*
355+
* The problem *does* exist however when dealing with interrupts which are independent on the two cores.
356+
*
357+
* This includes:
358+
*
359+
* * the core local "spare" IRQs
360+
* * on RP2350 the SIO FIFO IRQ which is now the same irq number for both cores (vs RP2040 where it was two)
361+
*
362+
* In the cases where you want to enable the same IRQ on both cores, and both cores are sharing the same vector
363+
* table, you should install the IRQ handler once - it will be used on both cores - and check the core
364+
* number (via \ref get_core_num()) on each core.
365+
*
366+
* NOTE: It is not thread safe to add/remove/handle IRQs for the same irq number in the same vector table
367+
* from both cores concurrently.
368+
*
369+
* NOTE: The SDK defines a PICO_VTABLE_PER_CORE variable indicating whether the two vector tables are separate,
370+
* however as of version 2.1.1 the user cannot set this value, and expect the vector table duplication to be handled
371+
* for them. This functionality will be added in a future SDK version
372+
*
319373
* \param num Interrupt number \ref interrupt_nums
320374
* \param handler The handler to set. See \ref irq_handler_t
321375
* \param order_priority The order priority controls the order that handlers for the same IRQ number on the core are called.

‎src/rp2_common/hardware_pio/include/hardware/pio.h

+12-1
Original file line numberDiff line numberDiff line change
@@ -172,6 +172,9 @@ typedef pio_hw_t *PIO;
172172
*/
173173
#ifndef PIO_NUM
174174
static_assert(PIO1_BASE - PIO0_BASE == (1u << 20), "hardware layout mismatch");
175+
#if NUM_PIOS > 2
176+
static_assert(PIO2_BASE - PIO0_BASE == (2u << 20), "hardware layout mismatch");
177+
#endif
175178
#define PIO_NUM(pio) (((uintptr_t)(pio) - PIO0_BASE) >> 20)
176179
#endif
177180

@@ -185,6 +188,9 @@ static_assert(PIO1_BASE - PIO0_BASE == (1u << 20), "hardware layout mismatch");
185188
*/
186189
#ifndef PIO_INSTANCE
187190
static_assert(PIO1_BASE - PIO0_BASE == (1u << 20), "hardware layout mismatch");
191+
#if NUM_PIOS > 2
192+
static_assert(PIO2_BASE - PIO0_BASE == (2u << 20), "hardware layout mismatch");
193+
#endif
188194
#define PIO_INSTANCE(instance) ((pio_hw_t *)(PIO0_BASE + (instance) * (1u << 20)))
189195
#endif
190196

@@ -214,8 +220,13 @@ static_assert(DREQ_PIO0_TX1 == DREQ_PIO0_TX0 + 1, "");
214220
static_assert(DREQ_PIO0_TX2 == DREQ_PIO0_TX0 + 2, "");
215221
static_assert(DREQ_PIO0_TX3 == DREQ_PIO0_TX0 + 3, "");
216222
static_assert(DREQ_PIO0_RX0 == DREQ_PIO0_TX0 + NUM_PIO_STATE_MACHINES, "");
223+
static_assert(DREQ_PIO1_TX0 == DREQ_PIO0_RX0 + NUM_PIO_STATE_MACHINES, "");
217224
static_assert(DREQ_PIO1_RX0 == DREQ_PIO1_TX0 + NUM_PIO_STATE_MACHINES, "");
218-
#define PIO_DREQ_NUM(pio, sm, is_tx) ((sm) + (((is_tx) ? 0 : NUM_PIO_STATE_MACHINES) + PIO_NUM(pio) * (DREQ_PIO1_TX0 - DREQ_PIO0_TX0)))
225+
#if NUM_PIOS > 2
226+
static_assert(DREQ_PIO2_TX0 == DREQ_PIO1_RX0 + NUM_PIO_STATE_MACHINES, "");
227+
static_assert(DREQ_PIO2_RX0 == DREQ_PIO2_TX0 + NUM_PIO_STATE_MACHINES, "");
228+
#endif
229+
#define PIO_DREQ_NUM(pio, sm, is_tx) (DREQ_PIO0_TX0 + (sm) + (((is_tx) ? 0 : NUM_PIO_STATE_MACHINES) + PIO_NUM(pio) * (DREQ_PIO1_TX0 - DREQ_PIO0_TX0)))
219230
#endif
220231

221232
/**

‎src/rp2_common/pico_aon_timer/BUILD.bazel

+4
Original file line numberDiff line numberDiff line change
@@ -6,10 +6,14 @@ cc_library(
66
name = "pico_aon_timer",
77
srcs = ["aon_timer.c"],
88
hdrs = ["include/pico/aon_timer.h"],
9+
defines = [
10+
"LIB_PICO_AON_TIMER=1",
11+
],
912
includes = ["include"],
1013
target_compatible_with = compatible_with_rp2(),
1114
deps = [
1215
"//src/common/pico_util",
16+
"//src/common/pico_time",
1317
"//src/rp2_common:hardware_regs",
1418
"//src/rp2_common:pico_platform",
1519
"//src/rp2_common/hardware_irq",

‎src/rp2_common/pico_aon_timer/CMakeLists.txt

+1
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@ pico_mirrored_target_link_libraries(pico_aon_timer INTERFACE pico_util)
1212

1313
if (TARGET hardware_rtc)
1414
pico_mirrored_target_link_libraries(pico_aon_timer INTERFACE hardware_rtc)
15+
target_link_libraries(pico_aon_timer_headers INTERFACE pico_time_headers)
1516
endif()
1617

1718
if (TARGET hardware_powman)

‎src/rp2_common/pico_aon_timer/aon_timer.c

+6
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,8 @@ static aon_timer_alarm_handler_t aon_timer_alarm_handler;
1313
#if HAS_RP2040_RTC
1414
#include "hardware/rtc.h"
1515
#include "pico/util/datetime.h"
16+
#include "pico/time.h"
17+
#include "hardware/clocks.h"
1618

1719
#elif HAS_POWMAN_TIMER
1820
#include "hardware/powman.h"
@@ -56,6 +58,10 @@ bool aon_timer_set_time_calendar(const struct tm *tm) {
5658
datetime_t dt;
5759
tm_to_datetime(tm, &dt);
5860
rtc_set_datetime(&dt);
61+
62+
// Writing to the RTC will take 2 clk_rtc clock periods to arrive
63+
uint rtc_freq = clock_get_hz(clk_rtc);
64+
busy_wait_us(((1000000 + rtc_freq - 1) / rtc_freq) * 2);
5965
return true;
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#elif HAS_POWMAN_TIMER
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struct timespec ts;

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