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| 1 | +//! This test needs a connection between: |
| 2 | +//! |
| 3 | +//! | from GPIO (pico Pin) | to GPIO (pico Pin) | |
| 4 | +//! | -------------------- | ------------------ | |
| 5 | +//! | 0 (1) | 2 (4) | |
| 6 | +//! | 1 (2) | 3 (5) | |
| 7 | +
|
| 8 | +#![no_std] |
| 9 | +#![no_main] |
| 10 | +#![cfg(test)] |
| 11 | + |
| 12 | +use defmt_rtt as _; // defmt transport |
| 13 | +use defmt_test as _; |
| 14 | +use panic_probe as _; |
| 15 | +use rp2040_hal as hal; // memory layout // panic handler |
| 16 | + |
| 17 | +use hal::pac::interrupt; |
| 18 | + |
| 19 | +/// The linker will place this boot block at the start of our program image. We |
| 20 | +/// need this to help the ROM bootloader get our code up and running. |
| 21 | +/// Note: This boot block is not necessary when using a rp-hal based BSP |
| 22 | +/// as the BSPs already perform this step. |
| 23 | +#[link_section = ".boot2"] |
| 24 | +#[used] |
| 25 | +pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H; |
| 26 | + |
| 27 | +/// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust |
| 28 | +/// if your board has a different frequency |
| 29 | +const XTAL_FREQ_HZ: u32 = 12_000_000u32; |
| 30 | + |
| 31 | +pub mod i2c_tests; |
| 32 | + |
| 33 | +#[interrupt] |
| 34 | +unsafe fn I2C1_IRQ() { |
| 35 | + i2c_tests::blocking::peripheral_handler(); |
| 36 | +} |
| 37 | + |
| 38 | +#[defmt_test::tests] |
| 39 | +mod tests { |
| 40 | + use crate::i2c_tests::{self, blocking::State, ADDR_10BIT, ADDR_7BIT}; |
| 41 | + |
| 42 | + #[init] |
| 43 | + fn setup() -> State { |
| 44 | + i2c_tests::blocking::system_setup(super::XTAL_FREQ_HZ, ADDR_7BIT) |
| 45 | + } |
| 46 | + |
| 47 | + #[test] |
| 48 | + fn write(state: &mut State) { |
| 49 | + i2c_tests::blocking::write(state, ADDR_7BIT); |
| 50 | + i2c_tests::blocking::write(state, ADDR_10BIT); |
| 51 | + } |
| 52 | + |
| 53 | + #[test] |
| 54 | + fn write_iter(state: &mut State) { |
| 55 | + i2c_tests::blocking::write_iter(state, ADDR_7BIT); |
| 56 | + i2c_tests::blocking::write_iter(state, ADDR_10BIT); |
| 57 | + } |
| 58 | + |
| 59 | + #[test] |
| 60 | + fn write_iter_read(state: &mut State) { |
| 61 | + i2c_tests::blocking::write_iter_read(state, ADDR_7BIT, 1..=1); |
| 62 | + i2c_tests::blocking::write_iter_read(state, ADDR_10BIT, 2..=2); |
| 63 | + } |
| 64 | + |
| 65 | + #[test] |
| 66 | + fn write_read(state: &mut State) { |
| 67 | + i2c_tests::blocking::write_read(state, ADDR_7BIT, 1..=1); |
| 68 | + i2c_tests::blocking::write_read(state, ADDR_10BIT, 2..=2); |
| 69 | + } |
| 70 | + |
| 71 | + #[test] |
| 72 | + fn read(state: &mut State) { |
| 73 | + i2c_tests::blocking::read(state, ADDR_7BIT, 0..=0); |
| 74 | + i2c_tests::blocking::read(state, ADDR_10BIT, 1..=1); |
| 75 | + } |
| 76 | + |
| 77 | + #[test] |
| 78 | + fn transactions_read(state: &mut State) { |
| 79 | + i2c_tests::blocking::transactions_read(state, ADDR_7BIT, 0..=0); |
| 80 | + i2c_tests::blocking::transactions_read(state, ADDR_10BIT, 1..=1); |
| 81 | + } |
| 82 | + |
| 83 | + #[test] |
| 84 | + fn transactions_write(state: &mut State) { |
| 85 | + i2c_tests::blocking::transactions_write(state, ADDR_7BIT); |
| 86 | + i2c_tests::blocking::transactions_write(state, ADDR_10BIT); |
| 87 | + } |
| 88 | + |
| 89 | + #[test] |
| 90 | + fn transactions_read_write(state: &mut State) { |
| 91 | + i2c_tests::blocking::transactions_read_write(state, ADDR_7BIT, 1..=1); |
| 92 | + i2c_tests::blocking::transactions_read_write(state, ADDR_10BIT, 2..=2); |
| 93 | + } |
| 94 | + |
| 95 | + #[test] |
| 96 | + fn transactions_write_read(state: &mut State) { |
| 97 | + i2c_tests::blocking::transactions_write_read(state, ADDR_7BIT, 1..=1); |
| 98 | + i2c_tests::blocking::transactions_write_read(state, ADDR_10BIT, 2..=2); |
| 99 | + } |
| 100 | + |
| 101 | + #[test] |
| 102 | + fn transaction(state: &mut State) { |
| 103 | + i2c_tests::blocking::transaction(state, ADDR_7BIT, 7..=9); |
| 104 | + i2c_tests::blocking::transaction(state, ADDR_10BIT, 7..=14); |
| 105 | + } |
| 106 | + |
| 107 | + #[test] |
| 108 | + fn transactions_iter(state: &mut State) { |
| 109 | + i2c_tests::blocking::transactions_iter(state, ADDR_7BIT, 1..=1); |
| 110 | + i2c_tests::blocking::transactions_iter(state, ADDR_10BIT, 2..=2); |
| 111 | + } |
| 112 | + |
| 113 | + #[test] |
| 114 | + fn embedded_hal(state: &mut State) { |
| 115 | + i2c_tests::blocking::embedded_hal(state, ADDR_7BIT, 2..=2); |
| 116 | + i2c_tests::blocking::embedded_hal(state, ADDR_10BIT, 2..=7); |
| 117 | + } |
| 118 | + |
| 119 | + // Sad paths: |
| 120 | + // Peripheral Nack on Addr |
| 121 | + #[test] |
| 122 | + fn nak_on_addr(state: &mut State) { |
| 123 | + i2c_tests::blocking::nak_on_addr(state, ADDR_7BIT, ADDR_7BIT + 1); |
| 124 | + i2c_tests::blocking::nak_on_addr(state, ADDR_10BIT, ADDR_10BIT + 1); |
| 125 | + i2c_tests::blocking::nak_on_addr(state, ADDR_10BIT, ADDR_10BIT + 0x100); |
| 126 | + } |
| 127 | + // Peripheral Nack on Data |
| 128 | + // |
| 129 | + // Arbritration conflict |
| 130 | +} |
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