diff --git a/CHANGELOG.md b/CHANGELOG.md
index 36c0946..6ff84ac 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -19,6 +19,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - Ignore enters and exits relating to the `ThreadMode` interrupt: RTIC always executes tasks in handler mode and then returns to `ThreadMode` on `cortex_m::asm::wfi()`.
 - Bumped `itm` to v0.7.0 with its `"serial"` feature; the latter used to configure a TTY source.
 - Emit a warning if a DWT watch address used for software task tracing is read. Such an address should only ever be written to. This error would indicate that something has gone very wrong.
+- Crate documentation for `rtic-scope-frontend-dummy`, `cortex-m-rtic-trace`, and `rtic-scope-api` which is now the same as `README.md` used for the organization documentation but with a small header summarizing the crate.
+- Bumped `cortex-m`, ensuring additional target support verification during `cortex_m_rtic_trace::configure`.
 
 ### Deprecated
 
diff --git a/Cargo.lock b/Cargo.lock
index 975bcb9..6267784 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -497,7 +497,7 @@ dependencies = [
 [[package]]
 name = "cortex-m"
 version = "0.7.4"
-source = "git+https://github.com/rtic-scope/cortex-m?branch=rtic-scope#987c900added2aad32d906a615ed23c83f46acd0"
+source = "git+https://github.com/rtic-scope/cortex-m?branch=rtic-scope#83e0b768f90b62d03abcae4b347003772225edfa"
 dependencies = [
  "bare-metal",
  "bitfield",
diff --git a/Cargo.toml b/Cargo.toml
index b0eeda9..51e3453 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -8,3 +8,4 @@ members = [
 
 [patch.crates-io]
 include_dir = { version = "0.6.3-alpha.0", git = "https://github.com/tmplt/include_dir.git", branch = "feat/extract-overwrite" }
+cortex-m = { version = "0.7", git = "https://github.com/rtic-scope/cortex-m", branch = "rtic-scope" }
diff --git a/cargo-rtic-scope/Cargo.toml b/cargo-rtic-scope/Cargo.toml
index 0464df4..f093066 100644
--- a/cargo-rtic-scope/Cargo.toml
+++ b/cargo-rtic-scope/Cargo.toml
@@ -31,7 +31,7 @@ include_dir = "0.6.3-alpha.0"
 libloading = "0.7"
 rtic-syntax = "1.0.0"
 tempfile = "3"
-cortex-m = { version = "0.7", git = "https://github.com/rtic-scope/cortex-m", branch = "rtic-scope", default-features = false, features = ["serde", "std"]}
+cortex-m = { version = "0.7", default-features = false, features = ["serde", "std"]}
 
 # Probe support
 probe-rs = { version = "0.12", git = "https://github.com/rtic-scope/probe-rs.git", branch = "feat/swo-read" }
diff --git a/cortex-m-rtic-trace/Cargo.toml b/cortex-m-rtic-trace/Cargo.toml
index ee2efa5..d8c9609 100644
--- a/cortex-m-rtic-trace/Cargo.toml
+++ b/cortex-m-rtic-trace/Cargo.toml
@@ -9,5 +9,5 @@ homepage = "https://github.com/rtic-scope/cortex-m-rtic-trace"
 license = "MIT OR Apache-2.0"
 
 [dependencies]
-cortex-m = { version = "0.7.3", git = "https://github.com/rtic-scope/cortex-m.git", branch = "rtic-scope" }
+cortex-m = "0.7.3"
 rtic-trace-macros = { path = "macros", version = "0.0.0" }
diff --git a/cortex-m-rtic-trace/src/lib.rs b/cortex-m-rtic-trace/src/lib.rs
index 9e61d35..16f21a7 100644
--- a/cortex-m-rtic-trace/src/lib.rs
+++ b/cortex-m-rtic-trace/src/lib.rs
@@ -6,7 +6,7 @@
 use cortex_m::peripheral::{
     self as Core,
     dwt::{AccessType, ComparatorAddressSettings, ComparatorFunction, EmitOption},
-    itm::ITMSettings,
+    itm::ITMConfiguration,
 };
 pub use cortex_m::peripheral::{
     itm::{GlobalTimestampOptions, ITMConfigurationError, LocalTimestampOptions, TimestampClkSrc},
@@ -106,22 +106,25 @@ pub fn configure(
         }
     }
 
-    // Configure DCB, TPIU, DWT, ITM for hardware task tracing.
+    // Globally enable DWT and ITM features
     dcb.enable_trace();
+
     tpiu.set_swo_baud_rate(config.tpiu_freq, config.tpiu_baud);
     tpiu.set_trace_output_protocol(config.protocol);
     tpiu.enable_continuous_formatting(false); // drop ETM packets
-    dwt.enable_exception_tracing();
-    itm.unlock();
-    itm.configure(ITMSettings {
+
+    itm.configure(ITMConfiguration {
         enable: true,      // ITMENA: master enable
         forward_dwt: true, // TXENA: forward DWT packets
         local_timestamps: config.delta_timestamps,
         global_timestamps: config.absolute_timestamps,
-        bus_id: None, // only a single trace source is currently supported
+        bus_id: Some(1), // only a single trace source is currently supported
         timestamp_clk_src: config.timestamp_clk_src,
     })?;
 
+    // Enable hardware task tracing
+    dwt.enable_exception_tracing();
+
     // Configure DWT comparators for software task tracing.
     let enter_addr: u32 = unsafe { &WATCH_VARIABLE_ENTER.id as *const _ } as u32;
     let exit_addr: u32 = unsafe { &WATCH_VARIABLE_EXIT.id as *const _ } as u32;