Will this still work on a pi 5?

[PFLAtm]

It was stated in the tutorial that this is for pi3 and pi4 but I guess at this point in time the pi5 wasn't released yet.

[BartMassey]

It's going to be more difficult on a Pi 5. The newer processor is quite a bit different, and I'm not sure what the QEMU situation is there. If you do try this on a Pi 5 please do take detailed notes and contribute them back here 😀 .

[kindermax]

Hi, I did some progress porting this kernel to Raspberry Pi 5.
https://github.com/kindermax/rust-raspberrypi-OS
You can look at commit history on master branch.

However I've stuck on implementing MMU, in particular after the last isb barrier it just hangs or the uart stops working - anyway, i can not see any logs.

I tried to replace isb with dsb barrier, and something works (kindermax@ffff330) but later in exceptions chapter in the main.rs where we are trying to access some out of range memory, it does not throws an exception, so my guess that MMU is not working properly.

Also since RPI 5 has all the peripherals on Southbridge RP1 chip, I can not use PL011 uart drivers the usual way without setting up PCIe driver first. Instead I use so called early uart which means that some uarts already configured by firmware and are ready to use, no need for driver initialization.
One such uart is debug uart which is 3pin uart, other uart on gpio pins (similar to rpi3/4) can be used with special address (see memory.rs::mmio). In practice I use both uarts so i can load kernel via one uart and debug via another uart

I would like to receive some help/advice so I can move forward)