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Use size_of from the prelude instead of imported
Use `std::mem::{size_of, size_of_val, align_of, align_of_val}` from the prelude instead of importing or qualifying them. These functions were added to all preludes in Rust 1.80.
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beginners-guide.md

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@@ -80,12 +80,12 @@ Most of the portable SIMD API is designed to allow the user to gloss over the de
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Fortunately, most SIMD types have a fairly predictable size. `i32x4` is bit-equivalent to `[i32; 4]` and so can be bitcast to it, e.g. using [`mem::transmute`], though the API usually offers a safe cast you can use instead.
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However, this is not the same as alignment. Computer architectures generally prefer aligned accesses, especially when moving data between memory and vector registers, and while some support specialized operations that can bend the rules to help with this, unaligned access is still typically slow, or even undefined behavior. In addition, different architectures can require different alignments when interacting with their native SIMD types. For this reason, any `#[repr(simd)]` type has a non-portable alignment. If it is necessary to directly interact with the alignment of these types, it should be via [`mem::align_of`].
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However, this is not the same as alignment. Computer architectures generally prefer aligned accesses, especially when moving data between memory and vector registers, and while some support specialized operations that can bend the rules to help with this, unaligned access is still typically slow, or even undefined behavior. In addition, different architectures can require different alignments when interacting with their native SIMD types. For this reason, any `#[repr(simd)]` type has a non-portable alignment. If it is necessary to directly interact with the alignment of these types, it should be via [`align_of`].
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When working with slices, data correctly aligned for SIMD can be acquired using the [`as_simd`] and [`as_simd_mut`] methods of the slice primitive.
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[`mem::transmute`]: https://doc.rust-lang.org/core/mem/fn.transmute.html
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[`mem::align_of`]: https://doc.rust-lang.org/core/mem/fn.align_of.html
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[`align_of`]: https://doc.rust-lang.org/core/mem/fn.align_of.html
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[`as_simd`]: https://doc.rust-lang.org/nightly/std/primitive.slice.html#method.as_simd
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[`as_simd_mut`]: https://doc.rust-lang.org/nightly/std/primitive.slice.html#method.as_simd_mut
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crates/core_simd/src/masks/full_masks.rs

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@@ -81,7 +81,7 @@ macro_rules! impl_reverse_bits {
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#[inline(always)]
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fn reverse_bits(self, n: usize) -> Self {
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let rev = <$int>::reverse_bits(self);
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let bitsize = core::mem::size_of::<$int>() * 8;
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let bitsize = size_of::<$int>() * 8;
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if n < bitsize {
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// Shift things back to the right
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rev >> (bitsize - n)

crates/core_simd/src/simd/num/float.rs

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@@ -302,14 +302,14 @@ macro_rules! impl_trait {
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#[inline]
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fn to_bits(self) -> Simd<$bits_ty, N> {
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assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<Self::Bits>());
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assert_eq!(size_of::<Self>(), size_of::<Self::Bits>());
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// Safety: transmuting between vector types is safe
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unsafe { core::mem::transmute_copy(&self) }
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}
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#[inline]
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fn from_bits(bits: Simd<$bits_ty, N>) -> Self {
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assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<Self::Bits>());
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assert_eq!(size_of::<Self>(), size_of::<Self::Bits>());
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// Safety: transmuting between vector types is safe
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unsafe { core::mem::transmute_copy(&bits) }
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}

crates/core_simd/src/simd/ptr/const_ptr.rs

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@@ -109,7 +109,7 @@ where
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fn cast<U>(self) -> Self::CastPtr<U> {
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// SimdElement currently requires zero-sized metadata, so this should never fail.
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// If this ever changes, `simd_cast_ptr` should produce a post-mono error.
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use core::{mem::size_of, ptr::Pointee};
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use core::ptr::Pointee;
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assert_eq!(size_of::<<T as Pointee>::Metadata>(), 0);
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assert_eq!(size_of::<<U as Pointee>::Metadata>(), 0);
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crates/core_simd/src/simd/ptr/mut_ptr.rs

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@@ -106,7 +106,7 @@ where
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fn cast<U>(self) -> Self::CastPtr<U> {
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// SimdElement currently requires zero-sized metadata, so this should never fail.
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// If this ever changes, `simd_cast_ptr` should produce a post-mono error.
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use core::{mem::size_of, ptr::Pointee};
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use core::ptr::Pointee;
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assert_eq!(size_of::<<T as Pointee>::Metadata>(), 0);
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assert_eq!(size_of::<<U as Pointee>::Metadata>(), 0);
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crates/core_simd/src/vector.rs

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@@ -83,7 +83,7 @@ use crate::simd::{
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/// converting `[T]` to `[Simd<T, N>]`, and allows soundly operating on an aligned SIMD body,
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/// but it may cost more time when handling the scalar head and tail.
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/// If these are not enough, it is most ideal to design data structures to be already aligned
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/// to `mem::align_of::<Simd<T, N>>()` before using `unsafe` Rust to read or write.
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/// to `align_of::<Simd<T, N>>()` before using `unsafe` Rust to read or write.
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/// Other ways to compensate for these facts, like materializing `Simd` to or from an array first,
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/// are handled by safe methods like [`Simd::from_array`] and [`Simd::from_slice`].
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///

crates/core_simd/tests/layout.rs

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@@ -7,8 +7,8 @@ macro_rules! layout_tests {
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test_helpers::test_lanes! {
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fn no_padding<const LANES: usize>() {
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assert_eq!(
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core::mem::size_of::<core_simd::simd::Simd::<$ty, LANES>>(),
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core::mem::size_of::<[$ty; LANES]>(),
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size_of::<core_simd::simd::Simd::<$ty, LANES>>(),
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size_of::<[$ty; LANES]>(),
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);
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}
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}

crates/core_simd/tests/round.rs

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@@ -58,7 +58,7 @@ macro_rules! float_rounding_test {
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// all of the mantissa digits set to 1, pushed up to the MSB.
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const ALL_MANTISSA_BITS: IntScalar = ((1 << <Scalar>::MANTISSA_DIGITS) - 1);
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const MAX_REPRESENTABLE_VALUE: Scalar =
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(ALL_MANTISSA_BITS << (core::mem::size_of::<Scalar>() * 8 - <Scalar>::MANTISSA_DIGITS as usize - 1)) as Scalar;
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(ALL_MANTISSA_BITS << (size_of::<Scalar>() * 8 - <Scalar>::MANTISSA_DIGITS as usize - 1)) as Scalar;
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let mut runner = test_helpers::make_runner();
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runner.run(

crates/test_helpers/src/subnormals.rs

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@@ -12,7 +12,7 @@ macro_rules! impl_float {
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$(
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impl FlushSubnormals for $ty {
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fn flush(self) -> Self {
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let is_f32 = core::mem::size_of::<Self>() == 4;
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let is_f32 = size_of::<Self>() == 4;
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let ppc_flush = is_f32 && cfg!(all(
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any(target_arch = "powerpc", all(target_arch = "powerpc64", target_endian = "big")),
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target_feature = "altivec",

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