LLVM 20 produces different assembly for rust/tests/assembly/riscv-soft-abi-with-float-features.rs

[krasimirgg]

After #131807, we're seeing some test failures in our experimental rust + LLVM-at-HEAD build bot:

• https://buildkite.com/llvm-project/rust-llvm-integrate-prototype/builds/32097#0192c31f-15a1-47c2-a4c2-a946d7b089a2/951-952

It seems that here the new assembly is just lw a0, 0(a0); not sure if that's OK.

rust/tests/assembly/riscv-soft-abi-with-float-features.rs

Line 34 in 97ae1df

// CHECK: flw fa5, 0(a0)

[krasimirgg]

@rustbot label: A-LLVM

[jieyouxu]

cc @beetrees @workingjubilee as you may know more about the intended behavior

[hanna-kruppe]

The change seems correct to me. It loads from the same location as before and puts the same bits in the return value register for the soft float ABI. Both variants just load 32 bits from memory into the low half of a0 (all of the involved instructions preserve non-canonical NaNs) and sign-extend to fill the upper 32 bits of a0 (previously in the fmv.x.w step, now it’s part of the “integer” load lw).

[beetrees]

The change is correct; the soft-float ABI for RISC-V states "Scalars that are at most XLEN bits wide are passed in a single argument register, or on the stack by value if none is available. [..] When passed in registers or on the stack, floating-point types narrower than XLEN bits are widened to XLEN bits, with the upper bits undefined."