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Description
This code:
#![no_std]
#![feature(asm)]
#![feature(start)]
#![feature(lang_items)]
#[lang = "eh_personality"] extern fn eh_personality() {}
#[panic_handler] fn panic(info: &::core::panic::PanicInfo) -> ! { loop {} }
#[start] fn start(_argc: isize, _argv: *const *const u8) -> isize {0}
#[no_mangle] pub fn abort() -> ! { loop {} }
#[no_mangle]
pub fn _start(a: [u32; 6]) {
unsafe {
asm!("mv a0, $0
mv a1, $1
mv a2, $2
mv a3, $3
mv a4, $4
mv a5, $5"
:: "r"(a[0]),
"r"(a[1]),
"r"(a[2]),
"r"(a[3]),
"r"(a[4]),
"r"(a[5])
: "a0",
"a1",
"a2",
"a3",
"a4",
"a5"
);
}
}
When compiled for the riscv64imac target (and other riscv targets):
$ cargo rustc --release --target riscv64imac-unknown-none-elf
Produces code which uses the clobbered registers to pass in values, resulting in the inputs being overwritten before they can be used:
0000000000011000 <_start>:
11000: 01456583 lwu a1,20(a0)
11004: 01056603 lwu a2,16(a0)
11008: 00c56683 lwu a3,12(a0)
1100c: 00856703 lwu a4,8(a0)
11010: 00456783 lwu a5,4(a0)
11014: 00056503 lwu a0,0(a0)
11018: 852a mv a0,a0
1101a: 85be mv a1,a5
1101c: 863a mv a2,a4
1101e: 86b6 mv a3,a3
11020: 8732 mv a4,a2
11022: 87ae mv a5,a1
11024: 8082 ret
See also: #60391
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Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Inline assembly (`asm!(…)`)Category: This is a bug.Target: RISC-V architectureRelevant to the compiler team, which will review and decide on the PR/issue.This issue requires a nightly compiler in some way.