@@ -3502,6 +3502,94 @@ Simplification rules
35023502* Immediate values for the ``count `` operand are truncated to five or
35033503 six bits for 32-bit or 64-bit operands, respectively.
35043504
3505+ .. _umlinst-bfx :
3506+
3507+ BFX
3508+ ~~~
3509+
3510+ Extract a contiguous bit field from an integer value.
3511+
3512+ +---------------------------------+-----------------------------------------------+
3513+ | Disassembly | Usage |
3514+ +=================================+===============================================+
3515+ | .. code-block:: | .. code-block:: C++ |
3516+ | | |
3517+ | bfxu dst,src,shift,width | UML_BFXU(block, dst, src, shift, width); |
3518+ | bfxs dst,src,shift,width | UML_BFXS(block, dst, src, shift, width); |
3519+ | dbfxu dst,src,shift,width | UML_DBFXU(block, dst, src, shift, width); |
3520+ | dbfxs dst,src,shift,width | UML_DBFXS(block, dst, src, shift, width); |
3521+ +---------------------------------+-----------------------------------------------+
3522+
3523+ Extracts and right-aligns a contiguous bit field from the value of
3524+ ``src ``, specified by its least significant bit position and width in
3525+ bits. The field must be narrower than the ``src `` operand, but it may
3526+ wrap around from the most significant bit position to the least
3527+ significant bit position. BFXU and DBFXU zero-extend an unsigned field,
3528+ while BFXS and DBFXS sign-extend a signed field.
3529+
3530+ Back-ends may be able to optimise some forms of this instruction for
3531+ example when the ``shift `` and ``width `` operands are both immediate
3532+ values.
3533+
3534+ Operands
3535+ ^^^^^^^^
3536+
3537+ dst (32-bit or 64-bit – memory, integer register)
3538+ The destination where the extracted field will be stored.
3539+ src (32-bit or 64-bit – memory, integer register, immediate, map variable)
3540+ The value to extract a contiguous bit field from.
3541+ shift (32-bit or 64-bit – memory, integer register, immediate, map variable)
3542+ The position of the least significant bit of the field to extract,
3543+ where zero is the least significant bit position, and bit numbers
3544+ increase toward the most significant bit position. Only the least
3545+ significant five bits or six bits of this operand are used,
3546+ depending on the instruction size.
3547+ width (32-bit or 64-bit – memory, integer register, immediate, map variable)
3548+ The width of the field to extract in bits. Only the least
3549+ significant five bits or six bits of this operand are used,
3550+ depending on the instruction size. The result is undefined if the
3551+ width modulo the instruction size in bits is zero.
3552+
3553+ Flags
3554+ ^^^^^
3555+
3556+ carry (C)
3557+ Undefined.
3558+ overflow (V)
3559+ Undefined.
3560+ zero (Z)
3561+ Set if the result is zero, or cleared otherwise.
3562+ sign (S)
3563+ Set to the value of the most significant bit of the result (set if
3564+ the result is a negative signed integer value, or cleared
3565+ otherwise).
3566+ unordered (U)
3567+ Undefined.
3568+
3569+ Simplification rules
3570+ ^^^^^^^^^^^^^^^^^^^^
3571+
3572+ * Converted to :ref: `MOV <umlinst-mov >`, :ref: `AND <umlinst-and >` or
3573+ :ref: `OR <umlinst-or >` if the ``src ``, ``shift `` and ``width ``
3574+ operands are all immediate values, or if the ``width `` operand is the
3575+ immediate value zero.
3576+ * Converted to :ref: `SHR <umlinst-shr >` or :ref: `SAR <umlinst-sar >` if
3577+ the ``src `` operand is not an immediate value, the ``shift `` and
3578+ ``width `` operands are both immediate values, and the sum of the value
3579+ of the ``shift `` operand and the value of the ``width `` operand is
3580+ equal to the instruction size in bits.
3581+ * BFXU and DBFXU are converted to :ref: `AND <umlinst-and >` if the
3582+ ``shift `` operand is the immediate value zero and ``width `` operand is
3583+ an immediate value.
3584+ * BFXS and DBFXS are converted to :ref: `SEXT <umlinst-sext >` if the
3585+ ``shift `` operand is the immediate value zero and ``width `` operand is
3586+ the immediate value 8, 16 or 32.
3587+ * Immediate values for the ``src `` operand are truncated to the
3588+ instruction size.
3589+ * Immediate values for the ``shift `` and ``width `` operands are
3590+ truncated to five or six bits for 32-bit or 64-bit operands,
3591+ respectively.
3592+
35053593.. _umlinst-roland :
35063594
35073595ROLAND
@@ -3572,10 +3660,10 @@ Simplification rules
35723660 immediate value and the ``mask `` operand is an immediate value
35733661 containing a single contiguous left-aligned sequence of set bits of
35743662 the appropriate length for the value of the ``count `` operand.
3575- * Converted to :ref: `SHR <umlinst-shr >` if the `` count `` operand is an
3576- immediate value and the ``mask `` operand is an immediate value
3577- containing a single contiguous right-aligned sequence of set bits of
3578- the appropriate length for the value of the `` count `` operand .
3663+ * Converted to :ref: `SHR <umlinst-shr >` or :ref: ` BFX < umlinst-bfx >` if
3664+ the ``count `` operand is an immediate value and the `` mask `` operand
3665+ is an immediate value containing a single contiguous right-aligned
3666+ sequence of set bits .
35793667* Immediate values for the ``src `` and ``mask `` operands are truncated
35803668 to the instruction size.
35813669* Immediate values for the ``count `` operand are truncated to five or
0 commit comments