Release v2.0.1 (maintenance)

* Python 3.13, Verilatorv5.036, yosys0.52, cocotbv2.0.1

* Add v2.0.1 to history

Author: cmomin

.github/workflows/ci.yml

@@ -11,12 +11,12 @@ on:
       - main
 jobs:
   build_latex:
-    runs-on: ubuntu-latest
+    runs-on: ubuntu-26.04
     steps:
       - name: Set up Git repository
-        uses: actions/checkout@v4
+        uses: actions/checkout@v5
       - name: Cache documentation build
-        uses: actions/cache@v4
+        uses: actions/cache@v5
         with:
           key: "doc-pdf-v1-${{ hashFiles('docs/**') }}"
           restore-keys: "doc-pdf-v1"
@@ -30,13 +30,13 @@ jobs:
           root_file: SMAesH.tex
           args: -auxdir=build -pdf -file-line-error -halt-on-error -interaction=nonstopmode
       - name: Upload PDF file
-        uses: actions/upload-artifact@v4
+        uses: actions/upload-artifact@v6
         with:
           name: docs
           path: docs/SMAesH.pdf
 
   sbox:
-    runs-on: ubuntu-24.04
+    runs-on: ubuntu-26.04
     strategy:
       fail-fast: true
       matrix:
@@ -45,7 +45,7 @@ jobs:
       NSHARES: "${{ matrix.nshares }}"
     steps:
       - name: Check out repository code
-        uses: actions/checkout@v4
+        uses: actions/checkout@v5
         with:
           submodules: true
       - name: Get COMPRESS version
@@ -55,21 +55,22 @@ jobs:
         shell: bash
 
       - run: sudo apt-get install -y yosys
+      - run: wget -qO- https://astral.sh/uv/install.sh | sh
       - name: Cache COMPRESS Sbox
-        uses: actions/cache@v4
+        uses: actions/cache@v5
         with:
           key: "sbox-compress-v1-d${{ matrix.nshares }}-${{ hashFiles('sboxes-compress/canright_aes_sbox_dual.v') }}-${{ steps.compress-version.outputs.cv }}"
-          path: work/d${{ matrix.nshares }}/sbox
+          path: work-python3.13/d${{ matrix.nshares }}/sbox
       - run: make sbox DIR_MATCHI_ROOT=.
       - name: Upload COMPRESS sbox
-        uses: actions/upload-artifact@v4
+        uses: actions/upload-artifact@v6
         with:
           name: sbox_${{ matrix.nshares }}
-          path: work/d${{ matrix.nshares }}/sbox/*
+          path: work-python3.13/d${{ matrix.nshares }}/sbox/*
 
   functest:
     needs: [sbox]
-    runs-on: ubuntu-24.04
+    runs-on: ubuntu-26.04
     strategy:
       fail-fast: true
       matrix:
@@ -78,71 +79,75 @@ jobs:
       NSHARES: "${{ matrix.nshares }}"
     steps:
       - name: Check out repository code
-        uses: actions/checkout@v4
+        uses: actions/checkout@v5
         with:
           submodules: true
-      - uses: actions/download-artifact@v4
+      - uses: actions/download-artifact@v7
         with:
           name: sbox_${{ matrix.nshares }}
-          path: work/d${{ matrix.nshares }}/sbox
-      - run: sudo apt-get install -y yosys verilator iverilog
+          path: work-python3.13/d${{ matrix.nshares }}/sbox
+      - run: sudo apt-get install -y yosys iverilog
+      - run: wget -qO- https://astral.sh/uv/install.sh | sh
+      - run: (curl -L https://github.com/simple-crypto/hw-devtools/releases/download/v261506/hw-devtools.tar.gz | tar xz; sudo apt install ./hw-devtools/*.deb)
       - run: make func-tests DIR_MATCHI_ROOT=.
 
   formal_verif_matchi:
     needs: [sbox]
-    runs-on: ubuntu-24.04
+    runs-on: ubuntu-26.04
     strategy:
       fail-fast: true
       matrix:
         nshares: [2]
     steps:
       - name: Check out repository code
-        uses: actions/checkout@v4
+        uses: actions/checkout@v5
         with:
           submodules: true
-      - uses: actions/download-artifact@v4
+      - uses: actions/download-artifact@v7
         with:
           name: sbox_${{ matrix.nshares }}
-          path: work/d${{ matrix.nshares }}/sbox
-      - run: sudo apt-get install -y yosys iverilog python3.12-venv
+          path: work-python3.13/d${{ matrix.nshares }}/sbox
+      - run: sudo apt-get install -y yosys iverilog
+      - run: wget -qO- https://astral.sh/uv/install.sh | sh
       - run: mkdir -p ${{ github.workspace }}/verif-tools
       - run: wget https://github.com/cassiersg/matchi/releases/download/v0.1.0/matchi -P ${{ github.workspace }}/verif-tools
       - run: chmod +x ${{ github.workspace }}/verif-tools/matchi
       - run: (cd ${{ github.workspace }}/verif-tools; curl -L https://github.com/cassiersg/matchi/archive/refs/tags/v0.1.0.tar.gz | tar xz)
-      - run: (curl -L https://github.com/simple-crypto/hw-devtools/releases/download/v241002-5/hw-devtools.tar.gz | tar xz; sudo apt install ./hw-devtools/*.deb)
-      - run: mkdir -p work
-      - run: verilator --version > work/verilator_version
-      - run: yosys --version > work/yosys_version
+      - run: (curl -L https://github.com/simple-crypto/hw-devtools/releases/download/v261506/hw-devtools.tar.gz | tar xz; sudo apt install ./hw-devtools/*.deb)
+      - run: mkdir -p work-python3.13
+      - run: verilator --version > work-python3.13/verilator_version
+      - run: yosys --version > work-python3.13/yosys_version
       - run: make formal-tests DIR_MATCHI_ROOT=. MATCHI_CELLS=${{ github.workspace }}/verif-tools/matchi-0.1.0/matchi_cells MATCHI_BIN=${{ github.workspace }}/verif-tools/matchi
 
   lint:
     needs: [sbox]
-    runs-on: ubuntu-24.04
+    runs-on: ubuntu-26.04
     strategy:
       fail-fast: true
       matrix:
         nshares: [2]
     steps:
       - name: Check out repository code
-        uses: actions/checkout@v4
+        uses: actions/checkout@v5
         with:
           submodules: true
-      - uses: actions/download-artifact@v4
+      - uses: actions/download-artifact@v7
         with:
           name: sbox_${{ matrix.nshares }}
-          path: work/d${{ matrix.nshares }}/sbox
-      - run: sudo apt-get install -y python3.12-venv
+          path: work-python3.13/d${{ matrix.nshares }}/sbox
+      - run: sudo apt-get install -y
+      - run: wget -qO- https://astral.sh/uv/install.sh | sh
       - run: mkdir -p ${{ github.workspace }}/verif-tools
-      - run: (curl -L https://github.com/simple-crypto/hw-devtools/releases/download/v241002-5/hw-devtools.tar.gz | tar xz; sudo apt install ./hw-devtools/*.deb)
-      - run: (cd ${{ github.workspace }}/verif-tools; curl -L https://github.com/chipsalliance/verible/releases/download/v0.0-3831-g32b2456e/verible-v0.0-3831-g32b2456e-linux-static-x86_64.tar.gz | tar xz;)
-      - run: make lint VERIBLE=${{ github.workspace }}/verif-tools/verible-v0.0-3831-g32b2456e/bin/verible-verilog-lint
+      - run: (curl -L https://github.com/simple-crypto/hw-devtools/releases/download/v261506/hw-devtools.tar.gz | tar xz; sudo apt install ./hw-devtools/*.deb)
+      - run: (cd ${{ github.workspace }}/verif-tools; curl -L https://github.com/chipsalliance/verible/releases/download/v0.0-4071-g8d9f2c97/verible-v0.0-4071-g8d9f2c97-linux-static-x86_64.tar.gz | tar xz;)
+      - run: make lint VERIBLE=${{ github.workspace }}/verif-tools/verible-v0.0-4071-g8d9f2c97/bin/verible-verilog-lint
 
   release:
     needs: [build_latex, functest, formal_verif_matchi, lint]
     if: github.event_name == 'push' && startsWith(github.ref, 'refs/tags/v')
     runs-on: ubuntu-latest
     steps:
-      - uses: actions/download-artifact@v4
+      - uses: actions/download-artifact@v7
         with:
           name: docs
           path: release

.gitignore

@@ -1,5 +1,6 @@
 
 formal_verif/work
+formal_verif/dump.vcd
 beh_simu/work
 beh_simu/tvs/generated
 

Makefile

@@ -1,13 +1,15 @@
 # Use in order to use the compress-optimized sbox. 
 NSHARES?=2
-WORK?=work/d$(NSHARES)
+PYTHON_VERSION?=3.13
+UV_EXEC?=uv
+WORK?=work-python$(PYTHON_VERSION)/d$(NSHARES)
 WORKDIR=$(abspath $(WORK))
 
 # Python Venv
 SHELL=/bin/bash
-VE=$(abspath $(WORKDIR)/ve)
+VE=$(abspath $(WORKDIR)/ve-$(PYTHON_VERSION))
 VE_INSTALLED=$(VE)/installed
-PYTHON_VE=source $(VE)/bin/activate
+ACTIVATE_VE=$(VE)/bin/activate
 
 ### HDL configuration
 # Directory created containing all the HDL files
@@ -28,15 +30,13 @@ DIR_SMAESH_HDL=hdl/smaesh_hpc
 
 ## Python venv setting
 $(VE)/pyvenv.cfg:
-	mkdir -p $(WORKDIR)
-	python3 -m venv $(VE)
+	set -e; (mkdir -p $(WORKDIR) && $(UV_EXEC) venv $(VE) -p $(PYTHON_VERSION)) || exit 1
 
-$(VE_INSTALLED): $(VE)/pyvenv.cfg
-	${PYTHON_VE}; python -m pip install -r func_tests/requirements.txt
-	touch $(VE_INSTALLED)
+$(VE_INSTALLED): | $(VE)/pyvenv.cfg
+	set -e; (source ${ACTIVATE_VE} && $(UV_EXEC) pip install -r func_tests/requirements.txt) || exit 1
 
 $(SBOX_FILE): sboxes-compress/canright_aes_sbox_dual.v
-	cd sboxes-compress; SBOX_FILE=$(SBOX_FILE) WORK=$(COMPRESS_WORKDIR) NSHARES=$(NSHARES) ./compress.sh
+	cd sboxes-compress; UV_EXEC=$(UV_EXEC) PYTHON_VERSION=$(PYTHON_VERSION) SBOX_FILE=$(SBOX_FILE) WORK=$(COMPRESS_WORKDIR) NSHARES=$(NSHARES) ./compress.sh
 
 sbox: $(SBOX_FILE)
 
@@ -51,9 +51,9 @@ hdl: $(HDL_DONE)
 ## Functionnal testing
 FUNC_LOG=$(WORKDIR)/functests/simu.log
 FUNC_SUCCESS=$(WORKDIR)/functests/success
-$(FUNC_LOG): $(VE_INSTALLED) $(HDL_DONE)
+$(FUNC_LOG): $(HDL_DONE) | $(VE_INSTALLED) 
 	mkdir -p $(dir $(FUNC_LOG))
-	$(PYTHON_VE); make -C func_tests NSHARES=$(NSHARES) WORK_CASE=$(WORKDIR)/functests RTL_DIR_HDL=$(DIR_HDL) simu | tee $@
+	source $(ACTIVATE_VE) && make -C func_tests NSHARES=$(NSHARES) WORK_CASE=$(WORKDIR)/functests RTL_DIR_HDL=$(DIR_HDL) simu | tee $@
 
 # Mark simulation success (simulation always return a zero exit code).
 %/success: %/simu.log
@@ -76,11 +76,11 @@ matchi_configured:
 	@set e; if [ -z $${DIR_MATCHI_ROOT+x} ]; then echo "DIR_MATCHI_ROOT must be set for formal verification" && exit 1; else echo "DIR_MATCHI_ROOT=${DIR_MATCHI_ROOT}"; fi
 
 FORMAL_VERIF_DONE=$(DIR_FORMAL_VERIF)/.formal_verif
-$(FORMAL_VERIF_DONE): $(VE_INSTALLED) $(HDL_DONE) matchi_configured
+$(FORMAL_VERIF_DONE): $(HDL_DONE) matchi_configured | $(VE_INSTALLED)  
 	# Verify encryption
-	$(foreach ksize,$(KEY_SIZE),$(PYTHON_VE); make -C ./formal_verif NSHARES=$(NSHARES) KEY_SIZE=$(ksize) INVERSE=0 MATCHI_CELLS=$(MATCHI_CELLS) MATCHI_BIN=$(MATCHI_BIN) WORKDIR=$(DIR_FORMAL_VERIF) HDL_DIR=$(DIR_HDL) matchi-run || exit 1;)
+	$(foreach ksize,$(KEY_SIZE),source $(ACTIVATE_VE); make -C ./formal_verif NSHARES=$(NSHARES) KEY_SIZE=$(ksize) INVERSE=0 MATCHI_CELLS=$(MATCHI_CELLS) MATCHI_BIN=$(MATCHI_BIN) WORKDIR=$(DIR_FORMAL_VERIF) HDL_DIR=$(DIR_HDL) matchi-run || exit 1;)
 	# Verify decryption
-	$(foreach ksize,$(KEY_SIZE),$(PYTHON_VE); make -C ./formal_verif NSHARES=$(NSHARES) KEY_SIZE=$(ksize) INVERSE=1 MATCHI_CELLS=$(MATCHI_CELLS) MATCHI_BIN=$(MATCHI_BIN) WORKDIR=$(DIR_FORMAL_VERIF) HDL_DIR=$(DIR_HDL) matchi-run || exit 1;)
+	$(foreach ksize,$(KEY_SIZE),source $(ACTIVATE_VE); make -C ./formal_verif NSHARES=$(NSHARES) KEY_SIZE=$(ksize) INVERSE=1 MATCHI_CELLS=$(MATCHI_CELLS) MATCHI_BIN=$(MATCHI_BIN) WORKDIR=$(DIR_FORMAL_VERIF) HDL_DIR=$(DIR_HDL) matchi-run || exit 1;)
 	touch $(FORMAL_VERIF_DONE)
 
 formal-tests: $(FORMAL_VERIF_DONE)

docs/SMAesH.tex

@@ -55,6 +55,7 @@ \section{Overview}
 
 \section{History}
 \begin{description}
+    \item[2.0.1 (2026-07-17)] Update to Python3.13, Verilator5.036, Yosys0.52, Cocotb2.0.1 .
     \item[2.0.0 (2024-10-08)] Major (breaking API) update: add AES-192, AES-256 and decryption .
     \item[1.1.0 (2024-09-02)] 4 cycles Canright S-box (new optimized architecture).
     \item[1.0.1 (2023-06-15)] Fix latency in Section 5.4 (documentation change only).

formal_verif/.gitignore

@@ -1,2 +1,3 @@
 __pycache__
 work
+.vcd

formal_verif/Makefile

@@ -51,9 +51,9 @@ export SIM_BUILD ?= $(WORK_SYNTH)
 export VERILOG_INCLUDE_DIRS?= $(HDL_DIR)
 export VERILOG_SOURCES ?= $(SYNTH_NETLIST_VERILOG) $(HDL_DIR)/smaesh_hpc.sv 
 # TOPLEVEL is the name of the toplevel module in your Verilog or VHDL file
-export TOPLEVEL ?= smaesh_hpc
+export COCOTB_TOPLEVEL ?= smaesh_hpc
 # MODULE is the basename of the Python test file
-export MODULE ?= matchi_simu
+export COCOTB_TEST_MODULES ?= matchi_simu
 # Logging level
 export COCOTB_LOG_LEVEL ?= INFO
 # Results
@@ -90,7 +90,7 @@ $(MATCHI_SUCCESS): $(BEH_SIMU_VCD)
 	$(MATCHI_BIN) \
 	    --json $(SYNTH_NETLIST_JSON) \
 	    --vcd $(BEH_SIMU_VCD) \
-	    --dut top.smaesh_hpc.aes_core \
+	    --dut smaesh_hpc.aes_core \
 	    --gname $(SYNTH_MAIN_MODULE) \
 	    --output-vcd $(MATCHI_VCD) > $(MATCHI_LOG) 2> $(MATCHI_LOG).error && touch $(MATCHI_SUCCESS) || exit 1
 

formal_verif/synth.tcl

@@ -15,6 +15,8 @@ yosys hierarchy -check -libdir $IMPLEM_DIR -top $MAIN_MODULE
 
 # Remove verilog high-level constructs, in favor of netlists
 yosys proc;
+# 
+yosys pmuxtree 
 # Map yosys RTL library to yosys Gate library.
 yosys techmap
 # Map gates to our "matchi_cells" library.
@@ -30,7 +32,7 @@ yosys proc
 yosys hierarchy -check -top $MAIN_MODULE
 
 # Output the result in verilog (for simulation) and json (for analysis).
-yosys write_json $OUT_DIR/${MAIN_MODULE}_synth.json
+yosys write_json -noscopeinfo $OUT_DIR/${MAIN_MODULE}_synth.json
 
 yosys write_verilog -norename $OUT_DIR/${MAIN_MODULE}_synth.v;
 yosys write_verilog -noattr -norename $OUT_DIR/${MAIN_MODULE}_synth_noattr.v;

func_tests/Makefile

@@ -21,9 +21,9 @@ export SIM_BUILD ?= $(WORK_CASE)
 export VERILOG_INCLUDE_DIRS?= $(RTL_DIR_HDL)
 export VERILOG_SOURCES ?= $(RTL_DIR_HDL)/*.v $(RTL_DIR_HDL)/*.sv
 # TOPLEVEL is the name of the toplevel module in your Verilog or VHDL file
-export TOPLEVEL ?= smaesh_hpc
+export COCOTB_TOPLEVEL ?= smaesh_hpc
 # MODULE is the basename of the Python test file
-export MODULE ?= functionnal_tests
+export COCOTB_TEST_MODULES ?= functionnal_tests
 # Logging level
 export COCOTB_LOG_LEVEL ?= INFO
 # Results

func_tests/functionnal_tests.py

@@ -146,7 +146,7 @@ async def svrs_output_data_transaction(dut):
     dut.out_ready.value = 1
     # Wait for falling
     await wait_signal_asserted(dut,dut.out_valid)
-    out_shares_data_int = int(dut.out_shares_data)
+    out_shares_data_int = int(dut.out_shares_data.value)
     # End transaction by waiting till the next Rising edged and clearing
     # input signal
     await RisingEdge(dut.clk)
@@ -243,8 +243,8 @@ async def KSU_features_TEMPLATE(dut, case, inverse:bool, repeat, nshares):
 class SyncMonitor:
     def __init__(self, 
             logger,
-            clk: cocotb.handle.ModifiableObject, 
-            sigs: list[cocotb.handle.ModifiableObject],
+            clk, 
+            sigs,
             description= "Monitor"
             ):
         self.description = description
@@ -271,7 +271,7 @@ async def run(self):
 # Generator of clock, with feature to stop the clock generation
 # and counter for the clock cycle generated
 class ClockGenerator:
-    def __init__(self, clk: cocotb.handle.ModifiableObject, ncycles=None, units="ns", period=2):
+    def __init__(self, clk, ncycles=None, units="ns", period=2):
         self.clk = clk
         self.ncycles = ncycles
         self.units=units

func_tests/requirements.txt

@@ -1,3 +1,4 @@
 cocotb
 numpy
 cryptography
+pytest