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Merge pull request #1164 from larsclausen/fix-undefined-delay
Fix vector assignment with undefined delay
2 parents cbdaa86 + fa83f42 commit 07d5c6f

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4 files changed

+61
-2
lines changed

4 files changed

+61
-2
lines changed
Lines changed: 54 additions & 0 deletions
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module test;
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// Test that intra-assignment delay values of 'z and 'x get treated as a zero
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// delay. Check this for different types of assignments. The assignment should
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// not be skipped.
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reg failed = 1'b0;
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`define check(expr, val) \
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if (expr !== val) begin \
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$display("FAILED(%0d): `%s`, expected %0x, got %0x", `__LINE__, `"expr`", val, expr); \
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failed = 1'b1; \
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end
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integer delay_x = 32'hx;
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wire [31:0] delay_z;
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reg [31:0] x;
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reg [31:0] a[0:1];
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integer i = 0, j = 0;
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`define test(var) \
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// Non-blocking \
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var = 0; \
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var <= #delay_x 1; \
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#1 `check(var, 1) \
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var = 0; \
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var <= #delay_z 1; \
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#1 `check(var, 1) \
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// blocking \
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var = 0; \
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var = #delay_x 1; \
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`check(var, 1) \
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var = 0; \
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var = #delay_z 1; \
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`check(var, 1)
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initial begin
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`test(x)
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`test(x[0])
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`test(x[i])
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`test(a[0])
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`test(a[0][0])
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`test(a[0][j])
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`test(a[i])
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`test(a[i][0])
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`test(a[i][j])
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if (!failed) begin
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$display("PASSED");
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end
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end
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endmodule

ivtest/regress-vvp.list

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -266,6 +266,7 @@ vams_abs2 vvp_tests/vams_abs2.json
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vams_abs2-vlog95 vvp_tests/vams_abs2-vlog95.json
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vams_abs3 vvp_tests/vams_abs3.json
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vams_abs3-vlog95 vvp_tests/vams_abs3-vlog95.json
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vardly_undefined_vec vvp_tests/vardly_undefined_vec.json
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va_math vvp_tests/va_math.json
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warn_opt_sys_tf vvp_tests/warn_opt_sys_tf.json
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wreal vvp_tests/wreal.json
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{
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"type" : "normal",
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"source" : "vardly_undefined_vec.v"
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}

tgt-vvp/vvp_process.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -317,14 +317,14 @@ static void assign_to_lvector(ivl_lval_t lval,
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// instruction to handle this case.
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int offset_index = allocate_word();
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int delay_index = allocate_word();
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fprintf(vvp_out, " %%ix/load %d, %lu, 0;\n", offset_index, part_off);
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if (dexp) {
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draw_eval_expr_into_integer(dexp,delay_index);
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} else {
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fprintf(vvp_out, " %%ix/load %d, %lu, %lu;\n",
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delay_index, low_d, hig_d);
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fprintf(vvp_out, " %%flag_set/imm 4, 0;\n");
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}
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fprintf(vvp_out, " %%ix/load %d, %lu, 0;\n", offset_index, part_off);
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fprintf(vvp_out, " %%flag_set/imm 4, 0;\n");
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fprintf(vvp_out, " %s/vec4/off/d v%p_%lu, %d, %d;\n",
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assign_op, sig, use_word, offset_index, delay_index);
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clr_word(offset_index);

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