Update to embedded-hal v1.0.0

Author: richardeoin

CHANGELOG.md

@@ -2,6 +2,8 @@
 
 ## [Unreleased]
 
+* Upgrade to embedded-hal v1.0.0-rc.3
+
 ## [v0.3.0] 2022-12-29
 
 * Parallel NAND Flash is supported with the `nand ` feature flag [#9]

Cargo.toml

@@ -24,7 +24,7 @@ version = "0.3"
 optional = true
 
 [dependencies]
-embedded-hal = "0.2.4"
+embedded-hal = { version = "=1.0.0-rc.3" }
 
 [dev-dependencies]
 paste = "1.0"

src/nand.rs

@@ -4,7 +4,7 @@
 use core::cmp;
 use core::marker::PhantomData;
 
-use embedded_hal::blocking::delay::DelayUs;
+use embedded_hal::delay::DelayNs;
 
 use crate::fmc::{FmcBank, FmcRegisters};
 use crate::FmcPeripheral;
@@ -136,7 +136,7 @@ impl<IC: NandChip, FMC: FmcPeripheral> Nand<FMC, IC> {
     /// required by the NAND device
     pub fn init<D>(&mut self, delay: &mut D) -> device::NandDevice
     where
-        D: DelayUs<u8>,
+        D: DelayNs,
     {
         // calculate clock period, round down
         let fmc_source_ck_hz = self.fmc.source_clock_hz();
@@ -150,7 +150,7 @@ impl<IC: NandChip, FMC: FmcPeripheral> Nand<FMC, IC> {
 
         // enable memory controller
         self.fmc.memory_controller_enable();
-        delay.delay_us(1u8);
+        delay.delay_us(1);
 
         // NOTE(unsafe): FMC controller has been initialized and enabled for
         // this bank

src/sdram.rs

@@ -4,7 +4,7 @@ use core::cmp;
 use core::convert::TryInto;
 use core::marker::PhantomData;
 
-use embedded_hal::blocking::delay::DelayUs;
+use embedded_hal::delay::DelayNs;
 
 use crate::fmc::{AddressPinSet, FmcBank, FmcRegisters};
 use crate::FmcPeripheral;
@@ -254,7 +254,7 @@ impl<IC: SdramChip, FMC: FmcPeripheral> Sdram<FMC, IC> {
     /// maximum SD clock in `IC::TIMING`
     pub fn init<D>(&mut self, delay: &mut D) -> *mut u32
     where
-        D: DelayUs<u8>,
+        D: DelayNs,
     {
         use SdramCommand::*;