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burrbullTheZoq2
burrbull
authored and
TheZoq2
committed
Add rcc bus trait (#98)
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lines changed

10 files changed

+172
-98
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‎CHANGELOG.md‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
77

88
## [Unreleased]
99

10+
### Added
11+
12+
- RCC `Bus` trait + private `Enable` and `Reset` traits
13+
1014
### Breaking changes
1115

1216
- Change timer/pwm init API

‎src/adc.rs‎

Lines changed: 8 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ use embedded_hal::adc::{Channel, OneShot};
44

55
use crate::gpio::Analog;
66
use crate::gpio::{gpioa, gpiob, gpioc};
7-
use crate::rcc::{APB2, Clocks};
7+
use crate::rcc::{APB2, Clocks, Enable, Reset};
88
use crate::dma::{Receive, TransferPayload, dma1::C1, CircBuffer, Transfer, W, RxDma};
99
use core::sync::atomic::{self, Ordering};
1010
use cortex_m::asm::delay;
@@ -162,11 +162,7 @@ pub struct StoredConfig(AdcSampleTime, AdcAlign);
162162

163163
macro_rules! adc_hal {
164164
($(
165-
$ADC:ident: (
166-
$init:ident,
167-
$adcxen:ident,
168-
$adcxrst:ident
169-
),
165+
$ADC:ident: ($init:ident),
170166
)+) => {
171167
$(
172168

@@ -258,16 +254,15 @@ macro_rules! adc_hal {
258254
}
259255

260256
fn reset(&mut self, apb2: &mut APB2) {
261-
apb2.rstr().modify(|_, w| w.$adcxrst().set_bit());
262-
apb2.rstr().modify(|_, w| w.$adcxrst().clear_bit());
257+
$ADC::reset(apb2);
263258
}
264259

265260
fn enable_clock(&mut self, apb2: &mut APB2) {
266-
apb2.enr().modify(|_, w| w.$adcxen().set_bit());
261+
$ADC::enable(apb2);
267262
}
268263

269264
fn disable_clock(&mut self, apb2: &mut APB2) {
270-
apb2.enr().modify(|_, w| w.$adcxen().clear_bit());
265+
$ADC::disable(apb2);
271266
}
272267

273268
fn calibrate(&mut self) {
@@ -500,27 +495,15 @@ impl Adc<ADC1> {
500495
feature = "stm32f101",
501496
))]
502497
adc_hal! {
503-
ADC1: (
504-
adc1,
505-
adc1en,
506-
adc1rst
507-
),
498+
ADC1: (adc1),
508499
}
509500

510501
#[cfg(any(
511502
feature = "stm32f103",
512503
))]
513504
adc_hal! {
514-
ADC1: (
515-
adc1,
516-
adc1en,
517-
adc1rst
518-
),
519-
ADC2: (
520-
adc2,
521-
adc2en,
522-
adc2rst
523-
),
505+
ADC1: (adc1),
506+
ADC2: (adc2),
524507
}
525508

526509
pub struct AdcPayload<PIN: Channel<ADC1>> {

‎src/afio.rs‎

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
//! # Alternate Function I/Os
22
use crate::pac::{afio, AFIO};
33

4-
use crate::rcc::APB2;
4+
use crate::rcc::{APB2, Enable, Reset};
55

66
use crate::gpio::{
77
Debugger,
@@ -17,9 +17,8 @@ pub trait AfioExt {
1717

1818
impl AfioExt for AFIO {
1919
fn constrain(self, apb2: &mut APB2) -> Parts {
20-
apb2.enr().modify(|_, w| w.afioen().set_bit());
21-
apb2.rstr().modify(|_, w| w.afiorst().set_bit());
22-
apb2.rstr().modify(|_, w| w.afiorst().clear_bit());
20+
AFIO::enable(apb2);
21+
AFIO::reset(apb2);
2322

2423
Parts {
2524
evcr: EVCR { _0: () },

‎src/dma.rs‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -111,7 +111,7 @@ pub struct R;
111111
pub struct W;
112112

113113
macro_rules! dma {
114-
($($DMAX:ident: ($dmaX:ident, $dmaXen:ident, $dmaXrst:ident, {
114+
($($DMAX:ident: ($dmaX:ident, {
115115
$($CX:ident: (
116116
$chX:ident,
117117
$htifX:ident,
@@ -129,7 +129,7 @@ macro_rules! dma {
129129
use crate::pac::{$DMAX, dma1};
130130

131131
use crate::dma::{CircBuffer, DmaExt, Error, Event, Half, Transfer, W, RxDma, TxDma, TransferPayload};
132-
use crate::rcc::AHB;
132+
use crate::rcc::{AHB, Enable};
133133

134134
pub struct Channels((), $(pub $CX),+);
135135

@@ -368,7 +368,7 @@ macro_rules! dma {
368368
type Channels = Channels;
369369

370370
fn split(self, ahb: &mut AHB) -> Channels {
371-
ahb.enr().modify(|_, w| w.$dmaXen().set_bit());
371+
$DMAX::enable(ahb);
372372

373373
// reset the DMA control registers (stops all on-going transfers)
374374
$(
@@ -384,7 +384,7 @@ macro_rules! dma {
384384
}
385385

386386
dma! {
387-
DMA1: (dma1, dma1en, dma1rst, {
387+
DMA1: (dma1, {
388388
C1: (
389389
ch1,
390390
htif1, tcif1,
@@ -422,7 +422,7 @@ dma! {
422422
),
423423
}),
424424

425-
DMA2: (dma2, dma2en, dma2rst, {
425+
DMA2: (dma2, {
426426
C1: (
427427
ch1,
428428
htif1, tcif1,

‎src/gpio.rs‎

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ pub enum State {
7272
}
7373

7474
macro_rules! gpio {
75-
($GPIOX:ident, $gpiox:ident, $gpioy:ident, $iopxenr:ident, $iopxrst:ident, $PXx:ident, [
75+
($GPIOX:ident, $gpiox:ident, $gpioy:ident, $PXx:ident, [
7676
$($PXi:ident: ($pxi:ident, $i:expr, $MODE:ty, $CR:ident),)+
7777
]) => {
7878
/// GPIO
@@ -83,7 +83,7 @@ macro_rules! gpio {
8383
use crate::hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin, toggleable};
8484
use crate::pac::{$gpioy, $GPIOX};
8585

86-
use crate::rcc::APB2;
86+
use crate::rcc::{APB2, Enable, Reset};
8787
use super::{
8888
Alternate, Floating, GpioExt, Input,
8989
OpenDrain,
@@ -112,10 +112,9 @@ macro_rules! gpio {
112112
impl GpioExt for $GPIOX {
113113
type Parts = Parts;
114114

115-
fn split(self, apb2: &mut APB2) -> Parts {
116-
apb2.enr().modify(|_, w| w.$iopxenr().set_bit());
117-
apb2.rstr().modify(|_, w| w.$iopxrst().set_bit());
118-
apb2.rstr().modify(|_, w| w.$iopxrst().clear_bit());
115+
fn split(self, apb: &mut APB2) -> Parts {
116+
$GPIOX::enable(apb);
117+
$GPIOX::reset(apb);
119118

120119
Parts {
121120
crl: CRL { _0: () },
@@ -532,7 +531,7 @@ macro_rules! gpio {
532531
}
533532
}
534533

535-
gpio!(GPIOA, gpioa, gpioa, iopaen, ioparst, PAx, [
534+
gpio!(GPIOA, gpioa, gpioa, PAx, [
536535
PA0: (pa0, 0, Input<Floating>, CRL),
537536
PA1: (pa1, 1, Input<Floating>, CRL),
538537
PA2: (pa2, 2, Input<Floating>, CRL),
@@ -551,7 +550,7 @@ gpio!(GPIOA, gpioa, gpioa, iopaen, ioparst, PAx, [
551550
PA15: (pa15, 15, Debugger, CRH),
552551
]);
553552

554-
gpio!(GPIOB, gpiob, gpioa, iopben, iopbrst, PBx, [
553+
gpio!(GPIOB, gpiob, gpioa, PBx, [
555554
PB0: (pb0, 0, Input<Floating>, CRL),
556555
PB1: (pb1, 1, Input<Floating>, CRL),
557556
PB2: (pb2, 2, Input<Floating>, CRL),
@@ -570,7 +569,7 @@ gpio!(GPIOB, gpiob, gpioa, iopben, iopbrst, PBx, [
570569
PB15: (pb15, 15, Input<Floating>, CRH),
571570
]);
572571

573-
gpio!(GPIOC, gpioc, gpioa, iopcen, iopcrst, PCx, [
572+
gpio!(GPIOC, gpioc, gpioa, PCx, [
574573
PC0: (pc0, 0, Input<Floating>, CRL),
575574
PC1: (pc1, 1, Input<Floating>, CRL),
576575
PC2: (pc2, 2, Input<Floating>, CRL),
@@ -589,7 +588,7 @@ gpio!(GPIOC, gpioc, gpioa, iopcen, iopcrst, PCx, [
589588
PC15: (pc15, 15, Input<Floating>, CRH),
590589
]);
591590

592-
gpio!(GPIOD, gpiod, gpioa, iopden, iopdrst, PDx, [
591+
gpio!(GPIOD, gpiod, gpioa, PDx, [
593592
PD0: (pd0, 0, Input<Floating>, CRL),
594593
PD1: (pd1, 1, Input<Floating>, CRL),
595594
PD2: (pd2, 2, Input<Floating>, CRL),
@@ -608,7 +607,7 @@ gpio!(GPIOD, gpiod, gpioa, iopden, iopdrst, PDx, [
608607
PD15: (pd15, 15, Input<Floating>, CRH),
609608
]);
610609

611-
gpio!(GPIOE, gpioe, gpioa, iopeen, ioperst, PEx, [
610+
gpio!(GPIOE, gpioe, gpioa, PEx, [
612611
PE0: (pe0, 0, Input<Floating>, CRL),
613612
PE1: (pe1, 1, Input<Floating>, CRL),
614613
PE2: (pe2, 2, Input<Floating>, CRL),

‎src/i2c.rs‎

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ use crate::gpio::{Alternate, OpenDrain};
66
use crate::hal::blocking::i2c::{Read, Write, WriteRead};
77
use nb::Error::{Other, WouldBlock};
88
use nb::{Error as NbError, Result as NbResult};
9-
use crate::rcc::{Clocks, APB1};
9+
use crate::rcc::{Clocks, APB1, Enable, Reset};
1010
use crate::pac::{DWT, I2C1, I2C2};
1111

1212
/// I2C error
@@ -235,7 +235,7 @@ macro_rules! busy_wait_cycles {
235235
}
236236

237237
macro_rules! hal {
238-
($($I2CX:ident: ($i2cX:ident, $i2cXen:ident, $i2cXrst:ident),)+) => {
238+
($($I2CX:ident: ($i2cX:ident),)+) => {
239239
$(
240240
impl<PINS> I2c<$I2CX, PINS> {
241241
/// Configures the I2C peripheral to work in master mode
@@ -246,9 +246,8 @@ macro_rules! hal {
246246
clocks: Clocks,
247247
apb: &mut APB1,
248248
) -> Self {
249-
apb.enr().modify(|_, w| w.$i2cXen().set_bit());
250-
apb.rstr().modify(|_, w| w.$i2cXrst().set_bit());
251-
apb.rstr().modify(|_, w| w.$i2cXrst().clear_bit());
249+
$I2CX::enable(apb);
250+
$I2CX::reset(apb);
252251

253252
let pclk1 = clocks.pclk1().0;
254253

@@ -476,6 +475,6 @@ macro_rules! hal {
476475
}
477476

478477
hal! {
479-
I2C1: (_i2c1, i2c1en, i2c1rst),
480-
I2C2: (_i2c2, i2c2en, i2c2rst),
478+
I2C1: (_i2c1),
479+
I2C2: (_i2c2),
481480
}

‎src/rcc.rs‎

Lines changed: 112 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -466,3 +466,115 @@ impl Clocks {
466466
}
467467
}
468468

469+
/// Bus associated to peripheral
470+
pub trait RccBus {
471+
/// Bus type;
472+
type Bus;
473+
}
474+
475+
/// Enable/disable peripheral
476+
pub(crate) trait Enable: RccBus {
477+
fn enable(apb: &mut Self::Bus);
478+
fn disable(apb: &mut Self::Bus);
479+
}
480+
481+
/// Reset peripheral
482+
pub(crate) trait Reset: RccBus {
483+
fn reset(apb: &mut Self::Bus);
484+
}
485+
486+
macro_rules! bus {
487+
($($PER:ident => ($apbX:ty, $peren:ident, $perrst:ident),)+) => {
488+
$(
489+
impl RccBus for crate::pac::$PER {
490+
type Bus = $apbX;
491+
}
492+
impl Enable for crate::pac::$PER {
493+
#[inline(always)]
494+
fn enable(apb: &mut Self::Bus) {
495+
apb.enr().modify(|_, w| w.$peren().set_bit());
496+
}
497+
#[inline(always)]
498+
fn disable(apb: &mut Self::Bus) {
499+
apb.enr().modify(|_, w| w.$peren().clear_bit());
500+
}
501+
}
502+
impl Reset for crate::pac::$PER {
503+
#[inline(always)]
504+
fn reset(apb: &mut Self::Bus) {
505+
apb.rstr().modify(|_, w| w.$perrst().set_bit());
506+
apb.rstr().modify(|_, w| w.$perrst().clear_bit());
507+
}
508+
}
509+
)+
510+
}
511+
}
512+
513+
macro_rules! ahb_bus {
514+
($($PER:ident => ($peren:ident),)+) => {
515+
$(
516+
impl RccBus for crate::pac::$PER {
517+
type Bus = AHB;
518+
}
519+
impl Enable for crate::pac::$PER {
520+
#[inline(always)]
521+
fn enable(apb: &mut Self::Bus) {
522+
apb.enr().modify(|_, w| w.$peren().set_bit());
523+
}
524+
#[inline(always)]
525+
fn disable(apb: &mut Self::Bus) {
526+
apb.enr().modify(|_, w| w.$peren().clear_bit());
527+
}
528+
}
529+
)+
530+
}
531+
}
532+
533+
#[cfg(any(
534+
feature = "stm32f100",
535+
feature = "stm32f103",
536+
))]
537+
bus! {
538+
TIM1 => (APB2, tim1en, tim1rst),
539+
}
540+
#[cfg(feature = "stm32f103")]
541+
bus! {
542+
ADC2 => (APB2, adc2en, adc2rst),
543+
CAN1 => (APB1, canen, canrst),
544+
}
545+
bus! {
546+
ADC1 => (APB2, adc1en, adc1rst),
547+
AFIO => (APB2, afioen, afiorst),
548+
GPIOA => (APB2, iopaen, ioparst),
549+
GPIOB => (APB2, iopben, iopbrst),
550+
GPIOC => (APB2, iopcen, iopcrst),
551+
GPIOD => (APB2, iopden, iopdrst),
552+
GPIOE => (APB2, iopeen, ioperst),
553+
I2C1 => (APB1, i2c1en, i2c1rst),
554+
I2C2 => (APB1, i2c2en, i2c2rst),
555+
SPI1 => (APB2, spi1en, spi1rst),
556+
SPI2 => (APB1, spi2en, spi2rst),
557+
TIM2 => (APB1, tim2en, tim2rst),
558+
TIM3 => (APB1, tim3en, tim3rst),
559+
TIM4 => (APB1, tim4en, tim4rst),
560+
USART1 => (APB2, usart1en, usart1rst),
561+
USART2 => (APB1, usart2en, usart2rst),
562+
USART3 => (APB1, usart3en, usart3rst),
563+
WWDG => (APB1, wwdgen, wwdgrst),
564+
}
565+
#[cfg(feature = "high")]
566+
bus! {
567+
TIM6 => (APB1, tim6en, tim6rst),
568+
TIM7 => (APB1, tim7en, tim7rst),
569+
}
570+
571+
ahb_bus! {
572+
CRC => (crcen),
573+
DMA1 => (dma1en),
574+
DMA2 => (dma2en),
575+
}
576+
577+
#[cfg(feature = "high")]
578+
ahb_bus! {
579+
FSMC => (fsmcen),
580+
}

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