From 9ad72a47521aa59490df8274e25dc74ddb92c297 Mon Sep 17 00:00:00 2001 From: Albin Hedman Date: Wed, 24 Jan 2024 16:23:15 +0100 Subject: [PATCH] HRTIM: Move some inherent methods to traits on HrTim --- src/hrtim/timer.rs | 53 ++++++++++++++++++++++++++++++++++------------ 1 file changed, 39 insertions(+), 14 deletions(-) diff --git a/src/hrtim/timer.rs b/src/hrtim/timer.rs index b09f0c01..c6f52369 100644 --- a/src/hrtim/timer.rs +++ b/src/hrtim/timer.rs @@ -47,6 +47,27 @@ pub trait HrTimer { fn as_period_adc_trigger(&self) -> super::adc_trigger::TimerPeriod; } +pub trait HrSlaveTimer: HrTimer +{ + type CaptureCh1: super::capture::HrCapture; + type CaptureCh2: super::capture::HrCapture; + + /// Start listening to the specified event + fn enable_reset_event>( + &mut self, + _event: &E, + ); + + /// Stop listening to the specified event + fn disable_reset_event>( + &mut self, + _event: &E, + ); + + fn capture_ch1(&mut self) -> &mut Self::CaptureCh1; + fn capture_ch2(&mut self) -> &mut Self::CaptureCh2; +} + macro_rules! hrtim_timer { ($( $TIMX:ident: @@ -135,8 +156,11 @@ macro_rules! hrtim_timer { } } - $(// Only for Non-Master timers - impl HrTim<$TIMX, PSCL> { + $( + impl HrSlaveTimer for HrTim<$TIMX, PSCL> { + type CaptureCh1 = HrCapt; + type CaptureCh2 = HrCapt; + /// Reset this timer every time the specified event occurs /// /// Behaviour depends on `timer_mode`: @@ -152,20 +176,31 @@ macro_rules! hrtim_timer { /// * `HrTimerMode::Continuous`: Enabling the timer enables and starts it simultaneously. /// When the counter reaches the PER value, it rolls-over to 0x0000 and resumes counting. /// The counter can be reset at any time - pub fn enable_reset_event>(&mut self, _event: &E) { + fn enable_reset_event>(&mut self, _event: &E) { let tim = unsafe { &*$TIMX::ptr() }; unsafe { tim.$rstXr.modify(|r, w| w.bits(r.bits() | E::BITS)); } } /// Stop listening to the specified event - pub fn disable_reset_event>(&mut self, _event: &E) { + fn disable_reset_event>(&mut self, _event: &E) { let tim = unsafe { &*$TIMX::ptr() }; unsafe { tim.$rstXr.modify(|r, w| w.bits(r.bits() & !E::BITS)); } } + + /// Access the timers first capture channel + fn capture_ch1(&mut self) -> &mut Self::CaptureCh1 { + &mut self.capture_ch1 + } + + /// Access the timers second capture channel + fn capture_ch2(&mut self) -> &mut Self::CaptureCh2 { + &mut self.capture_ch2 + } } + /// Timer Period event impl super::event::EventSource for HrTim<$TIMX, PSCL> { // $rstXr @@ -228,16 +263,6 @@ hrtim_timer_adc_trigger! { HRTIM_TIMF: [(Adc13: [(PER: 1 << 24), (RST: 1 << 28)]), (Adc24: [(PER: 1 << 24), ]), (Adc579: [(PER: 30), (RST: 31)]), (Adc6810: [(PER: 31), ])] } -impl HrTim { - pub fn capture_ch1(&mut self) -> &mut HrCapt { - &mut self.capture_ch1 - } - - pub fn capture_ch2(&mut self) -> &mut HrCapt { - &mut self.capture_ch2 - } -} - /// Master Timer Period event impl super::event::TimerResetEventSource for HrTim { const BITS: u32 = 1 << 4; // MSTPER