Skip to content

Commit 0b6efb3

Browse files
Kheliconfpistm
Khelicon
and
fpistm
authored
Added new Agafia SG0 Board (#1690)
* Added new Agafia SG0 Board AGAFIA SG0 board is based on STM32G071CB Signed-off-by: arsimranjit Sindhar <[email protected]> Co-authored-by: Frederic Pillon <[email protected]>
1 parent 437cbed commit 0b6efb3

File tree

5 files changed

+545
-0
lines changed

5 files changed

+545
-0
lines changed

‎README.md

+1
Original file line numberDiff line numberDiff line change
@@ -296,6 +296,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
296296
| :green_heart: | STM32G030C6<br>STM32G030C8 | Generic Board | *2.2.0* |
297297
| :green_heart: | STM32G030F6<br>STM32G030F6 | Generic Board | *2.2.0* |
298298
| :green_heart: | STM32G030K8 | [Aurora One](https://www.bfy.kr/aurora-one/) | *2.0.0* |
299+
| :yellow_heart: | STM32G071CB | [AGAFIA SG0](https://www.sigmaic.com/store/p7/agafia-sgo.html) | **2.3.0** |
299300
| :green_heart: | STM32G030K6<br>STM32G030K8 | Generic Board | *2.0.0* | |
300301
| :green_heart: | STM32G031J4<br>STM32G031J6 | Generic Board | *2.0.0* | |
301302
| :yellow_heart: | STM32G031F4<br>STM32G031F6<br>STM32G031F8 | Generic Board | **2.3.0** | |

‎boards.txt

+9
Original file line numberDiff line numberDiff line change
@@ -3181,6 +3181,15 @@ GenG0.build.series=STM32G0xx
31813181
GenG0.build.cmsis_lib_gcc=arm_cortexM0l_math
31823182
GenG0.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
31833183

3184+
# AGAFIA SG0
3185+
GenG0.menu.pnum.AGAFIA_SG0=AGAFIA SG0
3186+
GenG0.menu.pnum.AGAFIA_SG0.upload.maximum_size=131072
3187+
GenG0.menu.pnum.AGAFIA_SG0.upload.maximum_data_size=36864
3188+
GenG0.menu.pnum.AGAFIA_SG0.build.board=AGAFIA_SG0
3189+
GenG0.menu.pnum.AGAFIA_SG0.build.product_line=STM32G071xx
3190+
GenG0.menu.pnum.AGAFIA_SG0.build.variant=STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)
3191+
GenG0.menu.pnum.AGAFIA_SG0.build.variant_h=variant_{build.board}.h
3192+
31843193
# Aurora One G030K8
31853194
GenG0.menu.pnum.AURORA_ONE=Aurora One
31863195
GenG0.menu.pnum.AURORA_ONE.upload.maximum_size=65536

‎variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)/ldscript.ld

+185
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,185 @@
1+
/*
2+
******************************************************************************
3+
**
4+
** @file : LinkerScript.ld
5+
**
6+
** @author : Auto-generated by STM32CubeIDE
7+
**
8+
** @brief : Linker script for STM32G071CBTx Device from STM32G0 series
9+
** 128Kbytes FLASH
10+
** 36Kbytes RAM
11+
**
12+
** Set heap size, stack size and stack location according
13+
** to application requirements.
14+
**
15+
** Set memory bank area and size if external memory is used
16+
**
17+
** Target : STMicroelectronics STM32
18+
**
19+
** Distribution: The file is distributed as is, without any warranty
20+
** of any kind.
21+
**
22+
******************************************************************************
23+
** @attention
24+
**
25+
** Copyright (c) 2022 STMicroelectronics.
26+
** All rights reserved.
27+
**
28+
** This software is licensed under terms that can be found in the LICENSE file
29+
** in the root directory of this software component.
30+
** If no LICENSE file comes with this software, it is provided AS-IS.
31+
**
32+
******************************************************************************
33+
*/
34+
35+
/* Entry Point */
36+
ENTRY(Reset_Handler)
37+
38+
/* Highest address of the user mode stack */
39+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
40+
41+
_Min_Heap_Size = 0x200; /* required amount of heap */
42+
_Min_Stack_Size = 0x400; /* required amount of stack */
43+
44+
/* Memories definition */
45+
MEMORY
46+
{
47+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
48+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
49+
}
50+
51+
/* Sections */
52+
SECTIONS
53+
{
54+
/* The startup code into "FLASH" Rom type memory */
55+
.isr_vector :
56+
{
57+
. = ALIGN(4);
58+
KEEP(*(.isr_vector)) /* Startup code */
59+
. = ALIGN(4);
60+
} >FLASH
61+
62+
/* The program code and other data into "FLASH" Rom type memory */
63+
.text :
64+
{
65+
. = ALIGN(4);
66+
*(.text) /* .text sections (code) */
67+
*(.text*) /* .text* sections (code) */
68+
*(.glue_7) /* glue arm to thumb code */
69+
*(.glue_7t) /* glue thumb to arm code */
70+
*(.eh_frame)
71+
72+
KEEP (*(.init))
73+
KEEP (*(.fini))
74+
75+
. = ALIGN(4);
76+
_etext = .; /* define a global symbols at end of code */
77+
} >FLASH
78+
79+
/* Constant data into "FLASH" Rom type memory */
80+
.rodata :
81+
{
82+
. = ALIGN(4);
83+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
84+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
85+
. = ALIGN(4);
86+
} >FLASH
87+
88+
.ARM.extab : {
89+
. = ALIGN(4);
90+
*(.ARM.extab* .gnu.linkonce.armextab.*)
91+
. = ALIGN(4);
92+
} >FLASH
93+
94+
.ARM : {
95+
. = ALIGN(4);
96+
__exidx_start = .;
97+
*(.ARM.exidx*)
98+
__exidx_end = .;
99+
. = ALIGN(4);
100+
} >FLASH
101+
102+
.preinit_array :
103+
{
104+
. = ALIGN(4);
105+
PROVIDE_HIDDEN (__preinit_array_start = .);
106+
KEEP (*(.preinit_array*))
107+
PROVIDE_HIDDEN (__preinit_array_end = .);
108+
. = ALIGN(4);
109+
} >FLASH
110+
111+
.init_array :
112+
{
113+
. = ALIGN(4);
114+
PROVIDE_HIDDEN (__init_array_start = .);
115+
KEEP (*(SORT(.init_array.*)))
116+
KEEP (*(.init_array*))
117+
PROVIDE_HIDDEN (__init_array_end = .);
118+
. = ALIGN(4);
119+
} >FLASH
120+
121+
.fini_array :
122+
{
123+
. = ALIGN(4);
124+
PROVIDE_HIDDEN (__fini_array_start = .);
125+
KEEP (*(SORT(.fini_array.*)))
126+
KEEP (*(.fini_array*))
127+
PROVIDE_HIDDEN (__fini_array_end = .);
128+
. = ALIGN(4);
129+
} >FLASH
130+
131+
/* Used by the startup to initialize data */
132+
_sidata = LOADADDR(.data);
133+
134+
/* Initialized data sections into "RAM" Ram type memory */
135+
.data :
136+
{
137+
. = ALIGN(4);
138+
_sdata = .; /* create a global symbol at data start */
139+
*(.data) /* .data sections */
140+
*(.data*) /* .data* sections */
141+
*(.RamFunc) /* .RamFunc sections */
142+
*(.RamFunc*) /* .RamFunc* sections */
143+
144+
. = ALIGN(4);
145+
_edata = .; /* define a global symbol at data end */
146+
147+
} >RAM AT> FLASH
148+
149+
/* Uninitialized data section into "RAM" Ram type memory */
150+
. = ALIGN(4);
151+
.bss :
152+
{
153+
/* This is used by the startup in order to initialize the .bss section */
154+
_sbss = .; /* define a global symbol at bss start */
155+
__bss_start__ = _sbss;
156+
*(.bss)
157+
*(.bss*)
158+
*(COMMON)
159+
160+
. = ALIGN(4);
161+
_ebss = .; /* define a global symbol at bss end */
162+
__bss_end__ = _ebss;
163+
} >RAM
164+
165+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
166+
._user_heap_stack :
167+
{
168+
. = ALIGN(8);
169+
PROVIDE ( end = . );
170+
PROVIDE ( _end = . );
171+
. = . + _Min_Heap_Size;
172+
. = . + _Min_Stack_Size;
173+
. = ALIGN(8);
174+
} >RAM
175+
176+
/* Remove information from the compiler libraries */
177+
/DISCARD/ :
178+
{
179+
libc.a ( * )
180+
libm.a ( * )
181+
libgcc.a ( * )
182+
}
183+
184+
.ARM.attributes 0 : { *(.ARM.attributes) }
185+
}

‎variants/STM32G0xx/G071C(6-8-B)(T-U)_G081CB(T-U)/variant_AGAFIA_SG0.cpp

+164
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,164 @@
1+
/*
2+
*******************************************************************************
3+
* Copyright (c) 2019, STMicroelectronics
4+
* All rights reserved.
5+
*
6+
* Redistribution and use in source and binary forms, with or without
7+
* modification, are permitted provided that the following conditions are met:
8+
*
9+
* 1. Redistributions of source code must retain the above copyright notice,
10+
* this list of conditions and the following disclaimer.
11+
* 2. Redistributions in binary form must reproduce the above copyright notice,
12+
* this list of conditions and the following disclaimer in the documentation
13+
* and/or other materials provided with the distribution.
14+
* 3. Neither the name of STMicroelectronics nor the names of its contributors
15+
* may be used to endorse or promote products derived from this software
16+
* without specific prior written permission.
17+
*
18+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19+
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21+
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22+
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23+
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24+
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25+
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26+
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27+
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28+
*******************************************************************************
29+
*/
30+
31+
#if defined(ARDUINO_AGAFIA_SG0)
32+
#include "pins_arduino.h"
33+
34+
#ifdef __cplusplus
35+
extern "C" {
36+
#endif
37+
38+
// Pin number
39+
const PinName digitalPin[] = {
40+
PA_10, // D0
41+
PA_9, // D1
42+
PA_12, // D2
43+
PC_6, // D3 - SPI_CLK
44+
PB_15, // D4
45+
PB_14, // D5
46+
PA_8, // D6
47+
PB_13, // D7
48+
PC_7, // D8
49+
PB_3, // D9
50+
PB_0, // D10 - SPI_CS
51+
PA_7, // D11 - SPI_MOSI
52+
PA_6, // D12 - PI_MISO
53+
PA_5, // D13 - SPI_CLK
54+
PB_9, // D14
55+
PB_8, // D15
56+
57+
PA_3, // D16
58+
PA_2, // D17
59+
PA_0, // D18
60+
PA_1, // D19
61+
62+
PA_11, // D20
63+
PA_15, // D21
64+
PD_0, // D22
65+
PD_1, // D23
66+
PD_2, // D24
67+
PD_3, // D25
68+
PD_4, // D26
69+
PB_4, // D27
70+
PB_5, // D28
71+
PB_6, // D29
72+
PB_7, // D30
73+
74+
PA_14, // D31
75+
PA_13, // D32
76+
77+
PF_0, // D33
78+
PF_1, // D34
79+
PC_13, // D35
80+
81+
PA_4, // D36/A0 - DAC1
82+
PB_12, // D37/A1
83+
PB_11, // D38/A2
84+
PB_10, // D39/A3
85+
PB_2, // D40/A4
86+
PB_1 // D41/A5
87+
};
88+
89+
// Analog (Ax) pin number array
90+
const uint32_t analogInputPin[] = {
91+
36, // A0, PA4
92+
37, // A1, PB12
93+
38, // A2, PB11
94+
39, // A3, PB10
95+
40, // A4, PB2
96+
41, // A5, PB1
97+
};
98+
99+
100+
#ifdef __cplusplus
101+
}
102+
#endif
103+
104+
// ----------------------------------------------------------------------------
105+
106+
#ifdef __cplusplus
107+
extern "C" {
108+
#endif
109+
110+
/**
111+
* @brief System Clock Configuration
112+
* The system Clock is configured as follows :
113+
* System Clock source = PLL (HSI)
114+
* SYSCLK(Hz) = 64000000
115+
* HCLK(Hz) = 64000000
116+
* AHB Prescaler = 1
117+
* APB1 Prescaler = 1
118+
* MSI Frequency(Hz) = 16000000
119+
* PLL_M = 1
120+
* PLL_N = 8
121+
* PLL_R = 2
122+
* PLL_P = 2
123+
* PLL_Q = 2
124+
* Flash Latency(WS) = 2
125+
* @param None
126+
* @retval None
127+
*/
128+
WEAK void SystemClock_Config(void)
129+
{
130+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
131+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
132+
133+
/* Configure the main internal regulator output voltage */
134+
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
135+
/* Initializes the CPU, AHB and APB busses clocks */
136+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
137+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
138+
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
139+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
140+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
141+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
142+
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
143+
RCC_OscInitStruct.PLL.PLLN = 8;
144+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
145+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
146+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
147+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
148+
Error_Handler();
149+
}
150+
/* Initializes the CPU, AHB and APB busses clocks */
151+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
152+
| RCC_CLOCKTYPE_PCLK1;
153+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
154+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
155+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
156+
157+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
158+
Error_Handler();
159+
}
160+
}
161+
#ifdef __cplusplus
162+
}
163+
#endif
164+
#endif /* ARDUINO_AGAFIA_SG0 */

0 commit comments

Comments
 (0)