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call-with-count-ptr.c
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
// REQUIRES: system-darwin
// RUN: %clang_cc1 -O0 -triple x86_64 -fbounds-safety -Wno-int-conversion -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK_X64_O0
// RUN: %clang_cc1 -O0 -triple arm64-apple-iphoneos -fbounds-safety -Wno-int-conversion -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK_ARM64_O0
#include <ptrcheck.h>
#define memmove_(b, ...) __builtin___memmove_chk(b, __VA_ARGS__, b)
#define memmove(d, h, e) memmove_(d, h, e)
int arr[] = {0, 1, 2, 3, 4, 5};
// CHECK_X64_O0-LABEL: define dso_local i32 @foo(
// CHECK_X64_O0-SAME: ptr noundef [[BUF:%.*]], ptr noundef [[LEN:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK_X64_O0-NEXT: [[ENTRY:.*:]]
// CHECK_X64_O0-NEXT: [[BUF_ADDR:%.*]] = alloca ptr, align 8
// CHECK_X64_O0-NEXT: [[LEN_ADDR:%.*]] = alloca ptr, align 8
// CHECK_X64_O0-NEXT: [[TMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8
// CHECK_X64_O0-NEXT: [[TMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP9:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP18:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP19:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP34:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP35:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP48:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP55:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP65:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP74:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP82:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP83:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP98:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP99:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP118:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_X64_O0-NEXT: [[AGG_TEMP125:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8
// CHECK_X64_O0-NEXT: store ptr [[BUF]], ptr [[BUF_ADDR]], align 8
// CHECK_X64_O0-NEXT: store ptr [[LEN]], ptr [[LEN_ADDR]], align 8
// CHECK_X64_O0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BUF_ADDR]], align 8
// CHECK_X64_O0-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LEN_ADDR]], align 8
// CHECK_X64_O0-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK_X64_O0-NEXT: [[IDX_EXT:%.*]] = sext i32 [[TMP2]] to i64
// CHECK_X64_O0-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[IDX_EXT]]
// CHECK_X64_O0-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0
// CHECK_X64_O0-NEXT: store ptr [[TMP0]], ptr [[TMP3]], align 8
// CHECK_X64_O0-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1
// CHECK_X64_O0-NEXT: store ptr [[ADD_PTR]], ptr [[TMP4]], align 8
// CHECK_X64_O0-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2
// CHECK_X64_O0-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR]], align 8
// CHECK_X64_O0-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 0
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR]], ptr [[TMP6]], align 8
// CHECK_X64_O0-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 1
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB]], ptr [[TMP7]], align 8
// CHECK_X64_O0-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 2
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB]], ptr [[TMP8]], align 8
// CHECK_X64_O0-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0
// CHECK_X64_O0-NEXT: store ptr @arr, ptr [[TMP9]], align 8
// CHECK_X64_O0-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1
// CHECK_X64_O0-NEXT: store ptr getelementptr inbounds (i32, ptr @arr, i64 6), ptr [[TMP10]], align 8
// CHECK_X64_O0-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2
// CHECK_X64_O0-NEXT: store ptr @arr, ptr [[TMP11]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR4:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR3]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB6:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR5]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB8:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR7]], align 8
// CHECK_X64_O0-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 0
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR4]], ptr [[TMP12]], align 8
// CHECK_X64_O0-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 1
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB6]], ptr [[TMP13]], align 8
// CHECK_X64_O0-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 2
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB8]], ptr [[TMP14]], align 8
// CHECK_X64_O0-NEXT: [[TMP15:%.*]] = load ptr, ptr [[BUF_ADDR]], align 8
// CHECK_X64_O0-NEXT: [[TMP16:%.*]] = load ptr, ptr [[LEN_ADDR]], align 8
// CHECK_X64_O0-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
// CHECK_X64_O0-NEXT: [[IDX_EXT10:%.*]] = sext i32 [[TMP17]] to i64
// CHECK_X64_O0-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i64 [[IDX_EXT10]]
// CHECK_X64_O0-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 0
// CHECK_X64_O0-NEXT: store ptr [[TMP15]], ptr [[TMP18]], align 8
// CHECK_X64_O0-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 1
// CHECK_X64_O0-NEXT: store ptr [[ADD_PTR11]], ptr [[TMP19]], align 8
// CHECK_X64_O0-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 2
// CHECK_X64_O0-NEXT: store ptr [[TMP15]], ptr [[TMP20]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 0
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR13:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR12]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 1
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB15:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR14]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 2
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB17:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR16]], align 8
// CHECK_X64_O0-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR13]] to i64
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP19]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META2:![0-9]+]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB21:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR20]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB21]], ptr [[TMP22]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR23:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR22]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB25:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR24]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB27:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR26]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR23]], ptr [[TMP23]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB25]], ptr [[TMP24]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB27]], ptr [[TMP25]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR29:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR28]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB31:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR30]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB33:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR32]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP35]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR37:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR36]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR38:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB39:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR38]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR40:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB41:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR40]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR37]], ptr [[TMP26]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB39]], ptr [[TMP27]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB41]], ptr [[TMP28]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR42:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR43:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR42]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR44:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB45:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR44]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR46:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB47:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR46]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR29]] to i64, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR43]] to i64, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]], !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[CMP:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB]], !annotation [[META2]]
// CHECK_X64_O0-NEXT: br i1 [[CMP]], label %[[CONT:.*]], label %[[TRAP:.*]], !annotation [[META2]]
// CHECK_X64_O0: [[TRAP]]:
// CHECK_X64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5:[0-9]+]], !annotation [[META2]]
// CHECK_X64_O0-NEXT: unreachable, !annotation [[META2]]
// CHECK_X64_O0: [[CONT]]:
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP48]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR49:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR50:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR49]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR51:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB52:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR51]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR53:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB54:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR53]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP55]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR56:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB57:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR56]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB57]], ptr [[TMP29]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR58:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR59:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR58]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR60:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB61:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR60]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR62:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB63:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR62]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[CMP64:%.*]] = icmp ule ptr [[WIDE_PTR_PTR50]], [[WIDE_PTR_PTR59]], !annotation [[META2]]
// CHECK_X64_O0-NEXT: br i1 [[CMP64]], label %[[LAND_LHS_TRUE:.*]], label %[[LAND_END:.*]], !annotation [[META2]]
// CHECK_X64_O0: [[LAND_LHS_TRUE]]:
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP65]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR66:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB67:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR66]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB67]], ptr [[TMP30]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR68:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR69:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR68]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR70:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB71:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR70]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR72:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB73:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR72]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP74]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR75:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR76:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR75]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR77:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB78:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR77]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR79:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB80:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR79]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[CMP81:%.*]] = icmp ule ptr [[WIDE_PTR_PTR69]], [[WIDE_PTR_PTR76]], !annotation [[META2]]
// CHECK_X64_O0-NEXT: br i1 [[CMP81]], label %[[LAND_RHS:.*]], label %[[LAND_END]], !annotation [[META2]]
// CHECK_X64_O0: [[LAND_RHS]]:
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP83]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR84:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB85:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR84]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB85]], ptr [[TMP31]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR86:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR87:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR86]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR88:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB89:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR88]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR90:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB91:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR90]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR87]], ptr [[TMP32]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB89]], ptr [[TMP33]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB91]], ptr [[TMP34]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR92:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR93:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR92]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR94:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB95:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR94]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR96:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB97:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR96]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP99]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR100:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR101:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR100]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR102:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB103:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR102]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR104:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB105:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR104]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR101]], ptr [[TMP35]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB103]], ptr [[TMP36]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB105]], ptr [[TMP37]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR106:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 0, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR107:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR106]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR108:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 1, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB109:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR108]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR110:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 2, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB111:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR110]], align 8, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[SUB_PTR_LHS_CAST112:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR93]] to i64, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[SUB_PTR_RHS_CAST113:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR107]] to i64, !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[SUB_PTR_SUB114:%.*]] = sub i64 [[SUB_PTR_LHS_CAST112]], [[SUB_PTR_RHS_CAST113]], !annotation [[META2]]
// CHECK_X64_O0-NEXT: [[CMP115:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB114]], !annotation [[META2]]
// CHECK_X64_O0-NEXT: br label %[[LAND_END]], !annotation [[META2]]
// CHECK_X64_O0: [[LAND_END]]:
// CHECK_X64_O0-NEXT: [[TMP38:%.*]] = phi i1 [ false, %[[LAND_LHS_TRUE]] ], [ false, %[[CONT]] ], [ [[CMP115]], %[[LAND_RHS]] ], !annotation [[META2]]
// CHECK_X64_O0-NEXT: br i1 [[TMP38]], label %[[CONT117:.*]], label %[[TRAP116:.*]], !annotation [[META2]]
// CHECK_X64_O0: [[TRAP116]]:
// CHECK_X64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5]], !annotation [[META2]]
// CHECK_X64_O0-NEXT: unreachable, !annotation [[META2]]
// CHECK_X64_O0: [[CONT117]]:
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP118]], ptr align 8 [[TMP]], i64 24, i1 false)
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR119:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 0
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR120:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR119]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR121:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 1
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB122:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR121]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR123:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 2
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB124:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR123]], align 8
// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP125]], ptr align 8 [[TMP1]], i64 24, i1 false)
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR126:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 0
// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR127:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR126]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR128:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 1
// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB129:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR128]], align 8
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR130:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 2
// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB131:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR130]], align 8
// CHECK_X64_O0-NEXT: [[CALL:%.*]] = call ptr @__memmove_chk(ptr noundef [[WIDE_PTR_PTR120]], ptr noundef [[WIDE_PTR_PTR127]], i64 noundef 24, i64 noundef [[TMP21]]) #[[ATTR6:[0-9]+]]
// CHECK_X64_O0-NEXT: call void @llvm.assume(i1 true)
// CHECK_X64_O0-NEXT: [[ADD_PTR132:%.*]] = getelementptr inbounds nuw i8, ptr [[CALL]], i64 24
// CHECK_X64_O0-NEXT: ret i32 0
//
// CHECK_ARM64_O0-LABEL: define dso_local i32 @foo(
// CHECK_ARM64_O0-SAME: ptr noundef [[BUF:%.*]], ptr noundef [[LEN:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK_ARM64_O0-NEXT: [[ENTRY:.*:]]
// CHECK_ARM64_O0-NEXT: [[BUF_ADDR:%.*]] = alloca ptr, align 8
// CHECK_ARM64_O0-NEXT: [[LEN_ADDR:%.*]] = alloca ptr, align 8
// CHECK_ARM64_O0-NEXT: [[TMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8
// CHECK_ARM64_O0-NEXT: [[TMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP9:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP18:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP19:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP34:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP35:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP48:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP55:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP65:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP74:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP82:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP83:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP98:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP99:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP118:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8
// CHECK_ARM64_O0-NEXT: [[AGG_TEMP125:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8
// CHECK_ARM64_O0-NEXT: store ptr [[BUF]], ptr [[BUF_ADDR]], align 8
// CHECK_ARM64_O0-NEXT: store ptr [[LEN]], ptr [[LEN_ADDR]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BUF_ADDR]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LEN_ADDR]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
// CHECK_ARM64_O0-NEXT: [[IDX_EXT:%.*]] = sext i32 [[TMP2]] to i64
// CHECK_ARM64_O0-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[IDX_EXT]]
// CHECK_ARM64_O0-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: store ptr [[TMP0]], ptr [[TMP3]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: store ptr [[ADD_PTR]], ptr [[TMP4]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR]], ptr [[TMP6]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB]], ptr [[TMP7]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB]], ptr [[TMP8]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: store ptr @arr, ptr [[TMP9]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: store ptr getelementptr inbounds (i32, ptr @arr, i64 6), ptr [[TMP10]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: store ptr @arr, ptr [[TMP11]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR4:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR3]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB6:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR5]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB8:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR7]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR4]], ptr [[TMP12]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB6]], ptr [[TMP13]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB8]], ptr [[TMP14]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP15:%.*]] = load ptr, ptr [[BUF_ADDR]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP16:%.*]] = load ptr, ptr [[LEN_ADDR]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
// CHECK_ARM64_O0-NEXT: [[IDX_EXT10:%.*]] = sext i32 [[TMP17]] to i64
// CHECK_ARM64_O0-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i64 [[IDX_EXT10]]
// CHECK_ARM64_O0-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: store ptr [[TMP15]], ptr [[TMP18]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: store ptr [[ADD_PTR11]], ptr [[TMP19]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: store ptr [[TMP15]], ptr [[TMP20]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR13:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR12]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB15:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR14]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB17:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR16]], align 8
// CHECK_ARM64_O0-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR13]] to i64
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP19]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META2:![0-9]+]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB21:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR20]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB21]], ptr [[TMP22]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR23:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR22]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB25:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR24]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB27:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR26]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR23]], ptr [[TMP23]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB25]], ptr [[TMP24]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB27]], ptr [[TMP25]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR29:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR28]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB31:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR30]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB33:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR32]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP35]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR37:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR36]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR38:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB39:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR38]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR40:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB41:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR40]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR37]], ptr [[TMP26]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB39]], ptr [[TMP27]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB41]], ptr [[TMP28]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR42:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR43:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR42]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR44:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB45:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR44]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR46:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB47:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR46]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR29]] to i64, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR43]] to i64, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]], !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[CMP:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB]], !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: br i1 [[CMP]], label %[[CONT:.*]], label %[[TRAP:.*]], !annotation [[META2]]
// CHECK_ARM64_O0: [[TRAP]]:
// CHECK_ARM64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5:[0-9]+]], !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: unreachable, !annotation [[META2]]
// CHECK_ARM64_O0: [[CONT]]:
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP48]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR49:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR50:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR49]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR51:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB52:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR51]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR53:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB54:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR53]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP55]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR56:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB57:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR56]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB57]], ptr [[TMP29]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR58:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR59:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR58]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR60:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB61:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR60]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR62:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB63:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR62]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[CMP64:%.*]] = icmp ule ptr [[WIDE_PTR_PTR50]], [[WIDE_PTR_PTR59]], !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: br i1 [[CMP64]], label %[[LAND_LHS_TRUE:.*]], label %[[LAND_END:.*]], !annotation [[META2]]
// CHECK_ARM64_O0: [[LAND_LHS_TRUE]]:
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP65]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR66:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB67:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR66]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB67]], ptr [[TMP30]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR68:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR69:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR68]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR70:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB71:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR70]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR72:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB73:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR72]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP74]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR75:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR76:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR75]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR77:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB78:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR77]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR79:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB80:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR79]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[CMP81:%.*]] = icmp ule ptr [[WIDE_PTR_PTR69]], [[WIDE_PTR_PTR76]], !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: br i1 [[CMP81]], label %[[LAND_RHS:.*]], label %[[LAND_END]], !annotation [[META2]]
// CHECK_ARM64_O0: [[LAND_RHS]]:
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP83]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR84:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB85:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR84]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB85]], ptr [[TMP31]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR86:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR87:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR86]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR88:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB89:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR88]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR90:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB91:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR90]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR87]], ptr [[TMP32]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB89]], ptr [[TMP33]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB91]], ptr [[TMP34]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR92:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR93:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR92]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR94:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB95:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR94]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR96:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB97:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR96]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP99]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR100:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR101:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR100]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR102:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB103:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR102]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR104:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB105:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR104]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR101]], ptr [[TMP35]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB103]], ptr [[TMP36]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB105]], ptr [[TMP37]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR106:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 0, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR107:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR106]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR108:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 1, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB109:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR108]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR110:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 2, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB111:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR110]], align 8, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[SUB_PTR_LHS_CAST112:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR93]] to i64, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[SUB_PTR_RHS_CAST113:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR107]] to i64, !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[SUB_PTR_SUB114:%.*]] = sub i64 [[SUB_PTR_LHS_CAST112]], [[SUB_PTR_RHS_CAST113]], !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: [[CMP115:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB114]], !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: br label %[[LAND_END]], !annotation [[META2]]
// CHECK_ARM64_O0: [[LAND_END]]:
// CHECK_ARM64_O0-NEXT: [[TMP38:%.*]] = phi i1 [ false, %[[LAND_LHS_TRUE]] ], [ false, %[[CONT]] ], [ [[CMP115]], %[[LAND_RHS]] ], !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: br i1 [[TMP38]], label %[[CONT117:.*]], label %[[TRAP116:.*]], !annotation [[META2]]
// CHECK_ARM64_O0: [[TRAP116]]:
// CHECK_ARM64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5]], !annotation [[META2]]
// CHECK_ARM64_O0-NEXT: unreachable, !annotation [[META2]]
// CHECK_ARM64_O0: [[CONT117]]:
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP118]], ptr align 8 [[TMP]], i64 24, i1 false)
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR119:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR120:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR119]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR121:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB122:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR121]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR123:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB124:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR123]], align 8
// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP125]], ptr align 8 [[TMP1]], i64 24, i1 false)
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR126:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 0
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR127:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR126]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR128:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 1
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB129:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR128]], align 8
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR130:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 2
// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB131:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR130]], align 8
// CHECK_ARM64_O0-NEXT: [[CALL:%.*]] = call ptr @__memmove_chk(ptr noundef [[WIDE_PTR_PTR120]], ptr noundef [[WIDE_PTR_PTR127]], i64 noundef 24, i64 noundef [[TMP21]]) #[[ATTR6:[0-9]+]]
// CHECK_ARM64_O0-NEXT: call void @llvm.assume(i1 true)
// CHECK_ARM64_O0-NEXT: [[ADD_PTR132:%.*]] = getelementptr inbounds nuw i8, ptr [[CALL]], i64 24
// CHECK_ARM64_O0-NEXT: ret i32 0
//
int foo(int *__counted_by(*len) buf, int *len) {
memmove(buf, arr, sizeof(arr));
return 0;
}
//.
// CHECK_X64_O0: [[META2]] = !{!"bounds-safety-generic"}
//.
// CHECK_ARM64_O0: [[META2]] = !{!"bounds-safety-generic"}
//.