diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp index c4cfdd06b4836..c403fc337f2d2 100644 --- a/clang/lib/CodeGen/CGExpr.cpp +++ b/clang/lib/CodeGen/CGExpr.cpp @@ -6876,14 +6876,8 @@ LValue CodeGenFunction::EmitMaterializeSequenceExprLValue( const MaterializeSequenceExpr *MSE) { if (MSE->isBinding()) { for (auto *OVE : MSE->opaquevalues()) { - if (CodeGenFunction::OpaqueValueMappingData::shouldBindAsLValue(OVE)) { - RValue PtrRV = EmitAnyExpr(OVE->getSourceExpr()); - LValue LV = MakeAddrLValue(PtrRV.getAggregateAddress(), OVE->getType()); - CodeGenFunction::OpaqueValueMappingData::bind(*this, OVE, LV); - } else { - CodeGenFunction::OpaqueValueMappingData::bind( - *this, OVE, OVE->getSourceExpr()); - } + CodeGenFunction::OpaqueValueMappingData::bind( + *this, OVE, OVE->getSourceExpr()); } } diff --git a/clang/lib/CodeGen/CGExprAgg.cpp b/clang/lib/CodeGen/CGExprAgg.cpp index 3fdb2ed4ead92..661cfd0177afb 100644 --- a/clang/lib/CodeGen/CGExprAgg.cpp +++ b/clang/lib/CodeGen/CGExprAgg.cpp @@ -595,13 +595,7 @@ void AggExprEmitter::VisitPredefinedBoundsCheckExpr( void AggExprEmitter::VisitMaterializeSequenceExpr(MaterializeSequenceExpr *MSE) { if (MSE->isBinding()) { for (auto *OVE : MSE->opaquevalues()) { - if (CodeGenFunction::OpaqueValueMappingData::shouldBindAsLValue(OVE)) { - RValue PtrRV = CGF.EmitAnyExpr(OVE->getSourceExpr()); - LValue LV = CGF.MakeAddrLValue(PtrRV.getAggregateAddress(), OVE->getType()); - CodeGenFunction::OpaqueValueMappingData::bind(CGF, OVE, LV); - } else { - CodeGenFunction::OpaqueValueMappingData::bind(CGF, OVE, OVE->getSourceExpr()); - } + CodeGenFunction::OpaqueValueMappingData::bind(CGF, OVE, OVE->getSourceExpr()); } } diff --git a/clang/test/BoundsSafety/CodeGen/array_subscript_agg.c b/clang/test/BoundsSafety/CodeGen/array_subscript_agg.c index 86114d8103cc1..02dd57012bf11 100644 --- a/clang/test/BoundsSafety/CodeGen/array_subscript_agg.c +++ b/clang/test/BoundsSafety/CodeGen/array_subscript_agg.c @@ -814,17 +814,15 @@ struct HasFAM { // NEW-NEXT: [[IDX_ADDR:%.*]] = alloca i32, align 4 // NEW-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 // NEW-NEXT: [[AGG_TEMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// NEW-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// NEW-NEXT: [[AGG_TEMP5:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// NEW-NEXT: [[AGG_TEMP4:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 // NEW-NEXT: store ptr [[HAS_FAM]], ptr [[HAS_FAM_INDIRECT_ADDR]], align 8 // NEW-NEXT: store i32 [[IDX]], ptr [[IDX_ADDR]], align 4 // NEW-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP1]], ptr align 8 [[HAS_FAM]], i64 24, i1 false) -// NEW-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP2]], ptr align 8 [[AGG_TEMP1]], i64 24, i1 false) -// NEW-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0 +// NEW-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 0 // NEW-NEXT: [[WIDE_PTR_PTR:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR]], align 8 -// NEW-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1 +// NEW-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 1 // NEW-NEXT: [[WIDE_PTR_UB:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR]], align 8 -// NEW-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2 +// NEW-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 2 // NEW-NEXT: [[WIDE_PTR_LB:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR]], align 8 // NEW-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_HASFAM:%.*]], ptr [[WIDE_PTR_PTR]], i64 1 // NEW-NEXT: [[TMP1:%.*]] = icmp ule ptr [[TMP0]], [[WIDE_PTR_UB]], !annotation [[META5:![0-9]+]] @@ -834,54 +832,54 @@ struct HasFAM { // NEW-NEXT: unreachable, !annotation [[META5]] // NEW: [[CONT]]: // NEW-NEXT: [[TMP2:%.*]] = icmp ule ptr [[WIDE_PTR_LB]], [[WIDE_PTR_PTR]], !annotation [[META3]] -// NEW-NEXT: br i1 [[TMP2]], label %[[CONT4:.*]], label %[[TRAP3:.*]], !annotation [[META3]] -// NEW: [[TRAP3]]: +// NEW-NEXT: br i1 [[TMP2]], label %[[CONT3:.*]], label %[[TRAP2:.*]], !annotation [[META3]] +// NEW: [[TRAP2]]: // NEW-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR3]], !annotation [[META3]] // NEW-NEXT: unreachable, !annotation [[META3]] -// NEW: [[CONT4]]: +// NEW: [[CONT3]]: // NEW-NEXT: [[FAM:%.*]] = getelementptr inbounds nuw [[STRUCT_HASFAM]], ptr [[WIDE_PTR_PTR]], i32 0, i32 1 // NEW-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [0 x %struct.Foo], ptr [[FAM]], i64 0, i64 0 -// NEW-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP5]], ptr align 8 [[AGG_TEMP1]], i64 24, i1 false) -// NEW-NEXT: [[WIDE_PTR_UB_ADDR6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP5]], i32 0, i32 1 -// NEW-NEXT: [[WIDE_PTR_UB7:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR6]], align 8 -// NEW-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP5]], i32 0, i32 0 -// NEW-NEXT: store ptr [[WIDE_PTR_UB7]], ptr [[TMP3]], align 8 -// NEW-NEXT: [[WIDE_PTR_PTR_ADDR8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP5]], i32 0, i32 0 -// NEW-NEXT: [[WIDE_PTR_PTR9:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR8]], align 8 +// NEW-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP4]], ptr align 8 [[HAS_FAM]], i64 24, i1 false) +// NEW-NEXT: [[WIDE_PTR_UB_ADDR5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP4]], i32 0, i32 1 +// NEW-NEXT: [[WIDE_PTR_UB6:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR5]], align 8 +// NEW-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP4]], i32 0, i32 0 +// NEW-NEXT: store ptr [[WIDE_PTR_UB6]], ptr [[TMP3]], align 8 +// NEW-NEXT: [[WIDE_PTR_PTR_ADDR7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP4]], i32 0, i32 0 +// NEW-NEXT: [[WIDE_PTR_PTR8:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR7]], align 8 // NEW-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 0 // NEW-NEXT: store ptr [[ARRAYDECAY]], ptr [[TMP4]], align 8 // NEW-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 1 -// NEW-NEXT: store ptr [[WIDE_PTR_PTR9]], ptr [[TMP5]], align 8 +// NEW-NEXT: store ptr [[WIDE_PTR_PTR8]], ptr [[TMP5]], align 8 // NEW-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 2 // NEW-NEXT: store ptr [[ARRAYDECAY]], ptr [[TMP6]], align 8 -// NEW-NEXT: [[WIDE_PTR_PTR_ADDR10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 0 -// NEW-NEXT: [[WIDE_PTR_PTR11:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR10]], align 8 +// NEW-NEXT: [[WIDE_PTR_PTR_ADDR9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 0 +// NEW-NEXT: [[WIDE_PTR_PTR10:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR9]], align 8 // NEW-NEXT: [[TMP7:%.*]] = load i32, ptr [[IDX_ADDR]], align 4 // NEW-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 -// NEW-NEXT: [[ARRAYIDX:%.*]] = getelementptr [[STRUCT_FOO]], ptr [[WIDE_PTR_PTR11]], i64 [[IDXPROM]] -// NEW-NEXT: [[WIDE_PTR_UB_ADDR12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 1 -// NEW-NEXT: [[WIDE_PTR_UB13:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR12]], align 8 -// NEW-NEXT: [[WIDE_PTR_LB_ADDR14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 2 -// NEW-NEXT: [[WIDE_PTR_LB15:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR14]], align 8 +// NEW-NEXT: [[ARRAYIDX:%.*]] = getelementptr [[STRUCT_FOO]], ptr [[WIDE_PTR_PTR10]], i64 [[IDXPROM]] +// NEW-NEXT: [[WIDE_PTR_UB_ADDR11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 1 +// NEW-NEXT: [[WIDE_PTR_UB12:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR11]], align 8 +// NEW-NEXT: [[WIDE_PTR_LB_ADDR13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 2 +// NEW-NEXT: [[WIDE_PTR_LB14:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR13]], align 8 // NEW-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_FOO]], ptr [[ARRAYIDX]], i64 1, !annotation [[META2]] -// NEW-NEXT: [[TMP9:%.*]] = icmp ule ptr [[TMP8]], [[WIDE_PTR_UB13]], !annotation [[META2]] -// NEW-NEXT: br i1 [[TMP9]], label %[[CONT17:.*]], label %[[TRAP16:.*]], !annotation [[META2]] -// NEW: [[TRAP16]]: +// NEW-NEXT: [[TMP9:%.*]] = icmp ule ptr [[TMP8]], [[WIDE_PTR_UB12]], !annotation [[META2]] +// NEW-NEXT: br i1 [[TMP9]], label %[[CONT16:.*]], label %[[TRAP15:.*]], !annotation [[META2]] +// NEW: [[TRAP15]]: // NEW-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR3]], !annotation [[META2]] // NEW-NEXT: unreachable, !annotation [[META2]] -// NEW: [[CONT17]]: +// NEW: [[CONT16]]: // NEW-NEXT: [[TMP10:%.*]] = icmp ule ptr [[ARRAYIDX]], [[TMP8]], !annotation [[META2]] -// NEW-NEXT: br i1 [[TMP10]], label %[[CONT19:.*]], label %[[TRAP18:.*]], !annotation [[META2]] -// NEW: [[TRAP18]]: +// NEW-NEXT: br i1 [[TMP10]], label %[[CONT18:.*]], label %[[TRAP17:.*]], !annotation [[META2]] +// NEW: [[TRAP17]]: // NEW-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR3]], !annotation [[META2]] // NEW-NEXT: unreachable, !annotation [[META2]] -// NEW: [[CONT19]]: -// NEW-NEXT: [[TMP11:%.*]] = icmp uge ptr [[ARRAYIDX]], [[WIDE_PTR_LB15]], !annotation [[META3]] -// NEW-NEXT: br i1 [[TMP11]], label %[[CONT21:.*]], label %[[TRAP20:.*]], !annotation [[META3]] -// NEW: [[TRAP20]]: +// NEW: [[CONT18]]: +// NEW-NEXT: [[TMP11:%.*]] = icmp uge ptr [[ARRAYIDX]], [[WIDE_PTR_LB14]], !annotation [[META3]] +// NEW-NEXT: br i1 [[TMP11]], label %[[CONT20:.*]], label %[[TRAP19:.*]], !annotation [[META3]] +// NEW: [[TRAP19]]: // NEW-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR3]], !annotation [[META3]] // NEW-NEXT: unreachable, !annotation [[META3]] -// NEW: [[CONT21]]: +// NEW: [[CONT20]]: // NEW-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[RETVAL]], ptr align 4 [[ARRAYIDX]], i64 8, i1 false) // NEW-NEXT: [[TMP12:%.*]] = load i64, ptr [[RETVAL]], align 4 // NEW-NEXT: ret i64 [[TMP12]] @@ -894,17 +892,15 @@ struct HasFAM { // LEGACY-NEXT: [[IDX_ADDR:%.*]] = alloca i32, align 4 // LEGACY-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 // LEGACY-NEXT: [[AGG_TEMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// LEGACY-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// LEGACY-NEXT: [[AGG_TEMP5:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// LEGACY-NEXT: [[AGG_TEMP4:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 // LEGACY-NEXT: store ptr [[HAS_FAM]], ptr [[HAS_FAM_INDIRECT_ADDR]], align 8 // LEGACY-NEXT: store i32 [[IDX]], ptr [[IDX_ADDR]], align 4 // LEGACY-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP1]], ptr align 8 [[HAS_FAM]], i64 24, i1 false) -// LEGACY-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP2]], ptr align 8 [[AGG_TEMP1]], i64 24, i1 false) -// LEGACY-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0 +// LEGACY-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 0 // LEGACY-NEXT: [[WIDE_PTR_PTR:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR]], align 8 -// LEGACY-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1 +// LEGACY-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 1 // LEGACY-NEXT: [[WIDE_PTR_UB:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR]], align 8 -// LEGACY-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2 +// LEGACY-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 2 // LEGACY-NEXT: [[WIDE_PTR_LB:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR]], align 8 // LEGACY-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_HASFAM:%.*]], ptr [[WIDE_PTR_PTR]], i64 1 // LEGACY-NEXT: [[TMP1:%.*]] = icmp ule ptr [[TMP0]], [[WIDE_PTR_UB]], !annotation [[META3:![0-9]+]] @@ -914,31 +910,31 @@ struct HasFAM { // LEGACY-NEXT: unreachable, !annotation [[META3]] // LEGACY: [[CONT]]: // LEGACY-NEXT: [[TMP2:%.*]] = icmp ule ptr [[WIDE_PTR_LB]], [[WIDE_PTR_PTR]], !annotation [[META4:![0-9]+]] -// LEGACY-NEXT: br i1 [[TMP2]], label %[[CONT4:.*]], label %[[TRAP3:.*]], !annotation [[META4]] -// LEGACY: [[TRAP3]]: +// LEGACY-NEXT: br i1 [[TMP2]], label %[[CONT3:.*]], label %[[TRAP2:.*]], !annotation [[META4]] +// LEGACY: [[TRAP2]]: // LEGACY-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR3]], !annotation [[META4]] // LEGACY-NEXT: unreachable, !annotation [[META4]] -// LEGACY: [[CONT4]]: +// LEGACY: [[CONT3]]: // LEGACY-NEXT: [[FAM:%.*]] = getelementptr inbounds nuw [[STRUCT_HASFAM]], ptr [[WIDE_PTR_PTR]], i32 0, i32 1 // LEGACY-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [0 x %struct.Foo], ptr [[FAM]], i64 0, i64 0 -// LEGACY-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP5]], ptr align 8 [[AGG_TEMP1]], i64 24, i1 false) -// LEGACY-NEXT: [[WIDE_PTR_UB_ADDR6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP5]], i32 0, i32 1 -// LEGACY-NEXT: [[WIDE_PTR_UB7:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR6]], align 8 -// LEGACY-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP5]], i32 0, i32 0 -// LEGACY-NEXT: store ptr [[WIDE_PTR_UB7]], ptr [[TMP3]], align 8 -// LEGACY-NEXT: [[WIDE_PTR_PTR_ADDR8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP5]], i32 0, i32 0 -// LEGACY-NEXT: [[WIDE_PTR_PTR9:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR8]], align 8 +// LEGACY-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP4]], ptr align 8 [[HAS_FAM]], i64 24, i1 false) +// LEGACY-NEXT: [[WIDE_PTR_UB_ADDR5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP4]], i32 0, i32 1 +// LEGACY-NEXT: [[WIDE_PTR_UB6:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR5]], align 8 +// LEGACY-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP4]], i32 0, i32 0 +// LEGACY-NEXT: store ptr [[WIDE_PTR_UB6]], ptr [[TMP3]], align 8 +// LEGACY-NEXT: [[WIDE_PTR_PTR_ADDR7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP4]], i32 0, i32 0 +// LEGACY-NEXT: [[WIDE_PTR_PTR8:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR7]], align 8 // LEGACY-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 0 // LEGACY-NEXT: store ptr [[ARRAYDECAY]], ptr [[TMP4]], align 8 // LEGACY-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 1 -// LEGACY-NEXT: store ptr [[WIDE_PTR_PTR9]], ptr [[TMP5]], align 8 +// LEGACY-NEXT: store ptr [[WIDE_PTR_PTR8]], ptr [[TMP5]], align 8 // LEGACY-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 2 // LEGACY-NEXT: store ptr [[ARRAYDECAY]], ptr [[TMP6]], align 8 -// LEGACY-NEXT: [[WIDE_PTR_PTR_ADDR10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 0 -// LEGACY-NEXT: [[WIDE_PTR_PTR11:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR10]], align 8 +// LEGACY-NEXT: [[WIDE_PTR_PTR_ADDR9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 0 +// LEGACY-NEXT: [[WIDE_PTR_PTR10:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR9]], align 8 // LEGACY-NEXT: [[TMP7:%.*]] = load i32, ptr [[IDX_ADDR]], align 4 // LEGACY-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP7]] to i64 -// LEGACY-NEXT: [[ARRAYIDX:%.*]] = getelementptr [[STRUCT_FOO]], ptr [[WIDE_PTR_PTR11]], i64 [[IDXPROM]] +// LEGACY-NEXT: [[ARRAYIDX:%.*]] = getelementptr [[STRUCT_FOO]], ptr [[WIDE_PTR_PTR10]], i64 [[IDXPROM]] // LEGACY-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[RETVAL]], ptr align 4 [[ARRAYIDX]], i64 8, i1 false) // LEGACY-NEXT: [[TMP8:%.*]] = load i64, ptr [[RETVAL]], align 4 // LEGACY-NEXT: ret i64 [[TMP8]] diff --git a/clang/test/BoundsSafety/CodeGen/builtin-memcpy-count-annotation.c b/clang/test/BoundsSafety/CodeGen/builtin-memcpy-count-annotation.c index 650aa399d765b..c6738576c7b1a 100644 --- a/clang/test/BoundsSafety/CodeGen/builtin-memcpy-count-annotation.c +++ b/clang/test/BoundsSafety/CodeGen/builtin-memcpy-count-annotation.c @@ -1,280 +1,284 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 // REQUIRES: system-darwin -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --replace-value-regex "!annotation ![0-9]+" "!tbaa ![0-9]+" "!tbaa\.struct ![0-9]+" "!nosanitize ![0-9]+" "!srcloc ![0-9]+" --prefix-filecheck-ir-name TMP_ // RUN: %clang_cc1 -O0 -triple x86_64 -fbounds-safety -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -O0 -triple x86_64 -fbounds-safety -x objective-c -fbounds-attributes-objc-experimental -emit-llvm %s -o - | FileCheck %s #include // -// CHECK-LABEL: @foo( -// CHECK-NEXT: entry: +// CHECK-LABEL: define dso_local void @foo( +// CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: [[ENTRY:.*]]: // CHECK-NEXT: [[DST:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 // CHECK-NEXT: [[SRC:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK-NEXT: [[AGG_TEMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK-NEXT: [[AGG_TEMP3:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK-NEXT: [[AGG_TEMP10:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK-NEXT: [[AGG_TEMP17:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK-NEXT: [[AGG_TEMP26:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK-NEXT: [[AGG_TEMP35:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK-NEXT: [[AGG_TEMP43:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 -// CHECK-NEXT: [[AGG_TEMP44:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK-NEXT: [[AGG_TEMP59:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 -// CHECK-NEXT: [[AGG_TEMP60:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK-NEXT: [[AGG_TEMP74:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK-NEXT: [[AGG_TEMP81:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK-NEXT: [[AGG_TEMP92:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK-NEXT: [[AGG_TEMP101:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK-NEXT: [[AGG_TEMP110:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK-NEXT: [[AGG_TEMP111:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK-NEXT: [[AGG_TEMP126:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK-NEXT: [[AGG_TEMP127:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK-NEXT: [[AGG_TEMP147:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK-NEXT: [[AGG_TEMP154:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[DST]], i8 0, i64 24, i1 false), {{!annotation ![0-9]+}} -// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[SRC]], i8 0, i64 24, i1 false), {{!annotation ![0-9]+}} -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP1]], ptr align 8 [[DST]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP1]], i32 0, i32 0 +// CHECK-NEXT: [[TMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[TMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP9:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP16:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP25:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP34:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP42:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK-NEXT: [[AGG_TEMP43:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP58:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK-NEXT: [[AGG_TEMP59:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP73:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP80:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP91:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP100:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP109:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP110:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP125:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP126:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP146:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP153:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[DST]], i8 0, i64 24, i1 false), !annotation [[META2:![0-9]+]] +// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[SRC]], i8 0, i64 24, i1 false), !annotation [[META2]] +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP]], ptr align 8 [[DST]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 0 // CHECK-NEXT: [[WIDE_PTR_PTR:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP1]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 1 // CHECK-NEXT: [[WIDE_PTR_UB:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP1]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 2 // CHECK-NEXT: [[WIDE_PTR_LB:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR]], align 8 -// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0 +// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 0 // CHECK-NEXT: store ptr [[WIDE_PTR_PTR]], ptr [[TMP0]], align 8 -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1 +// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 1 // CHECK-NEXT: store ptr [[WIDE_PTR_UB]], ptr [[TMP1]], align 8 -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2 +// CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 2 // CHECK-NEXT: store ptr [[WIDE_PTR_LB]], ptr [[TMP2]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP3]], ptr align 8 [[SRC]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP3]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR5:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR4]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP3]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB7:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR6]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP3]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB9:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR8]], align 8 -// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP2]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_PTR5]], ptr [[TMP3]], align 8 -// CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP2]], i32 0, i32 1 -// CHECK-NEXT: store ptr [[WIDE_PTR_UB7]], ptr [[TMP4]], align 8 -// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP2]], i32 0, i32 2 -// CHECK-NEXT: store ptr [[WIDE_PTR_LB9]], ptr [[TMP5]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP10]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP10]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR12:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR11]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP10]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB14:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR13]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR15:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP10]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB16:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR15]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP17]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP17]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB19:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR18]], align 8 -// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP17]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_UB19]], ptr [[TMP6]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP17]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR21:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR20]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP17]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB23:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR22]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP17]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB25:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR24]], align 8 -// CHECK-NEXT: [[CMP:%.*]] = icmp ule ptr [[WIDE_PTR_PTR12]], [[WIDE_PTR_PTR21]] -// CHECK-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[LAND_END:%.*]] -// CHECK: land.lhs.true: -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP26]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB28:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR27]], align 8 -// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_LB28]], ptr [[TMP7]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR30:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR29]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB32:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR31]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB34:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR33]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP35]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR37:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR36]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR38:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB39:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR38]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR40:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB41:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR40]], align 8 -// CHECK-NEXT: [[CMP42:%.*]] = icmp ule ptr [[WIDE_PTR_PTR30]], [[WIDE_PTR_PTR37]] -// CHECK-NEXT: br i1 [[CMP42]], label [[LAND_RHS:%.*]], label [[LAND_END]] -// CHECK: land.rhs: -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP44]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR45:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP44]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB46:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR45]], align 8 -// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP44]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_UB46]], ptr [[TMP8]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR47:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP44]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR48:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR47]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR49:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP44]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB50:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR49]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR51:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP44]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB52:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR51]], align 8 -// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP43]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_PTR48]], ptr [[TMP9]], align 8 -// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP43]], i32 0, i32 1 -// CHECK-NEXT: store ptr [[WIDE_PTR_UB50]], ptr [[TMP10]], align 8 -// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP43]], i32 0, i32 2 -// CHECK-NEXT: store ptr [[WIDE_PTR_LB52]], ptr [[TMP11]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR53:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP43]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR54:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR53]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR55:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP43]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB56:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR55]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR57:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP43]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB58:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR57]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP60]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR61:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP60]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR62:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR61]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR63:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP60]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB64:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR63]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR65:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP60]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB66:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR65]], align 8 -// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP59]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_PTR62]], ptr [[TMP12]], align 8 -// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP59]], i32 0, i32 1 -// CHECK-NEXT: store ptr [[WIDE_PTR_UB64]], ptr [[TMP13]], align 8 -// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP59]], i32 0, i32 2 -// CHECK-NEXT: store ptr [[WIDE_PTR_LB66]], ptr [[TMP14]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR67:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP59]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR68:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR67]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR69:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP59]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB70:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR69]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR71:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP59]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB72:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR71]], align 8 -// CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR54]] to i64 -// CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR68]] to i64 -// CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] -// CHECK-NEXT: [[CMP73:%.*]] = icmp ule i64 10, [[SUB_PTR_SUB]] -// CHECK-NEXT: br label [[LAND_END]] -// CHECK: land.end: -// CHECK-NEXT: [[TMP15:%.*]] = phi i1 [ false, [[LAND_LHS_TRUE]] ], [ false, [[ENTRY:%.*]] ], [ [[CMP73]], [[LAND_RHS]] ], {{!annotation ![0-9]+}} -// CHECK-NEXT: br i1 [[TMP15]], label [[CONT:%.*]], label [[TRAP:%.*]], {{!annotation ![0-9]+}} -// CHECK: trap: -// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5:[0-9]+]], {{!annotation ![0-9]+}} -// CHECK-NEXT: unreachable -// CHECK: cont: -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP74]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR75:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP74]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR76:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR75]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR77:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP74]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB78:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR77]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR79:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP74]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB80:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR79]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP81]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR82:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP81]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB83:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR82]], align 8 -// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP81]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_UB83]], ptr [[TMP16]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR84:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP81]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR85:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR84]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR86:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP81]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB87:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR86]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR88:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP81]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB89:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR88]], align 8 -// CHECK-NEXT: [[CMP90:%.*]] = icmp ule ptr [[WIDE_PTR_PTR76]], [[WIDE_PTR_PTR85]] -// CHECK-NEXT: br i1 [[CMP90]], label [[LAND_LHS_TRUE91:%.*]], label [[LAND_END144:%.*]] -// CHECK: land.lhs.true91: -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP92]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR93:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP92]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB94:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR93]], align 8 -// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP92]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_LB94]], ptr [[TMP17]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR95:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP92]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR96:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR95]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR97:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP92]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB98:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR97]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR99:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP92]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB100:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR99]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP101]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR102:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP101]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR103:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR102]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR104:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP101]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB105:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR104]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR106:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP101]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB107:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR106]], align 8 -// CHECK-NEXT: [[CMP108:%.*]] = icmp ule ptr [[WIDE_PTR_PTR96]], [[WIDE_PTR_PTR103]] -// CHECK-NEXT: br i1 [[CMP108]], label [[LAND_RHS109:%.*]], label [[LAND_END144]] -// CHECK: land.rhs109: -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP111]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR112:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP111]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB113:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR112]], align 8 -// CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP111]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_UB113]], ptr [[TMP18]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR114:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP111]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR115:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR114]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR116:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP111]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB117:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR116]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR118:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP111]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB119:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR118]], align 8 -// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP110]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_PTR115]], ptr [[TMP19]], align 8 -// CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP110]], i32 0, i32 1 -// CHECK-NEXT: store ptr [[WIDE_PTR_UB117]], ptr [[TMP20]], align 8 -// CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP110]], i32 0, i32 2 -// CHECK-NEXT: store ptr [[WIDE_PTR_LB119]], ptr [[TMP21]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR120:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP110]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR121:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR120]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR122:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP110]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB123:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR122]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR124:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP110]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB125:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR124]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP127]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR128:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP127]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR129:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR128]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR130:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP127]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB131:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR130]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR132:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP127]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB133:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR132]], align 8 -// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP126]], i32 0, i32 0 -// CHECK-NEXT: store ptr [[WIDE_PTR_PTR129]], ptr [[TMP22]], align 8 -// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP126]], i32 0, i32 1 -// CHECK-NEXT: store ptr [[WIDE_PTR_UB131]], ptr [[TMP23]], align 8 -// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP126]], i32 0, i32 2 -// CHECK-NEXT: store ptr [[WIDE_PTR_LB133]], ptr [[TMP24]], align 8 -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR134:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP126]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR135:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR134]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR136:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP126]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB137:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR136]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR138:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP126]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB139:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR138]], align 8 -// CHECK-NEXT: [[SUB_PTR_LHS_CAST140:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR121]] to i64 -// CHECK-NEXT: [[SUB_PTR_RHS_CAST141:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR135]] to i64 -// CHECK-NEXT: [[SUB_PTR_SUB142:%.*]] = sub i64 [[SUB_PTR_LHS_CAST140]], [[SUB_PTR_RHS_CAST141]] -// CHECK-NEXT: [[CMP143:%.*]] = icmp ule i64 10, [[SUB_PTR_SUB142]] -// CHECK-NEXT: br label [[LAND_END144]] -// CHECK: land.end144: -// CHECK-NEXT: [[TMP25:%.*]] = phi i1 [ false, [[LAND_LHS_TRUE91]] ], [ false, [[CONT]] ], [ [[CMP143]], [[LAND_RHS109]] ], {{!annotation ![0-9]+}} -// CHECK-NEXT: br i1 [[TMP25]], label [[CONT146:%.*]], label [[TRAP145:%.*]], {{!annotation ![0-9]+}} -// CHECK: trap145: -// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5]], {{!annotation ![0-9]+}} -// CHECK-NEXT: unreachable -// CHECK: cont146: -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP147]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR148:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP147]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR149:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR148]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR150:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP147]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB151:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR150]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR152:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP147]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB153:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR152]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP154]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR155:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP154]], i32 0, i32 0 -// CHECK-NEXT: [[WIDE_PTR_PTR156:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR155]], align 8 -// CHECK-NEXT: [[WIDE_PTR_UB_ADDR157:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP154]], i32 0, i32 1 -// CHECK-NEXT: [[WIDE_PTR_UB158:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR157]], align 8 -// CHECK-NEXT: [[WIDE_PTR_LB_ADDR159:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP154]], i32 0, i32 2 -// CHECK-NEXT: [[WIDE_PTR_LB160:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR159]], align 8 -// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[WIDE_PTR_PTR149]], ptr align 1 [[WIDE_PTR_PTR156]], i64 10, i1 false) +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP2]], ptr align 8 [[SRC]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP2]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR4:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR3]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP2]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB6:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR5]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP2]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB8:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR7]], align 8 +// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR4]], ptr [[TMP3]], align 8 +// CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB6]], ptr [[TMP4]], align 8 +// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[WIDE_PTR_LB8]], ptr [[TMP5]], align 8 +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP9]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META3:![0-9]+]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP9]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR11:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR10]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP9]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB13:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR12]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP9]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB15:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR14]], align 8, !annotation [[META3]] +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP16]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR17:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP16]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB18:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR17]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP16]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_UB18]], ptr [[TMP6]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR19:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP16]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR20:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR19]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR21:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP16]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB22:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR21]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP16]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB24:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR23]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[CMP:%.*]] = icmp ule ptr [[WIDE_PTR_PTR11]], [[WIDE_PTR_PTR20]], !annotation [[META3]] +// CHECK-NEXT: br i1 [[CMP]], label %[[LAND_LHS_TRUE:.*]], label %[[LAND_END:.*]], !annotation [[META3]] +// CHECK: [[LAND_LHS_TRUE]]: +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP25]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP25]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB27:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR26]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP25]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_LB27]], ptr [[TMP7]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP25]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR29:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR28]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP25]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB31:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR30]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP25]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB33:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR32]], align 8, !annotation [[META3]] +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP34]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR35:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP34]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR36:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR35]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP34]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB38:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR37]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR39:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP34]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB40:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR39]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[CMP41:%.*]] = icmp ule ptr [[WIDE_PTR_PTR29]], [[WIDE_PTR_PTR36]], !annotation [[META3]] +// CHECK-NEXT: br i1 [[CMP41]], label %[[LAND_RHS:.*]], label %[[LAND_END]], !annotation [[META3]] +// CHECK: [[LAND_RHS]]: +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP43]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR44:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP43]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB45:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR44]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP43]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_UB45]], ptr [[TMP8]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR46:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP43]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR47:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR46]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR48:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP43]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB49:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR48]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR50:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP43]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB51:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR50]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR47]], ptr [[TMP9]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_UB49]], ptr [[TMP10]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_LB51]], ptr [[TMP11]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR52:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR53:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR52]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR54:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB55:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR54]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR56:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB57:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR56]], align 8, !annotation [[META3]] +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP59]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR60:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP59]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR61:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR60]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR62:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP59]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB63:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR62]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR64:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP59]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB65:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR64]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP58]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR61]], ptr [[TMP12]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP58]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_UB63]], ptr [[TMP13]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP58]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_LB65]], ptr [[TMP14]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR66:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP58]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR67:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR66]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR68:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP58]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB69:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR68]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR70:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP58]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB71:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR70]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR53]] to i64, !annotation [[META3]] +// CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR67]] to i64, !annotation [[META3]] +// CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]], !annotation [[META3]] +// CHECK-NEXT: [[CMP72:%.*]] = icmp ule i64 10, [[SUB_PTR_SUB]], !annotation [[META3]] +// CHECK-NEXT: br label %[[LAND_END]], !annotation [[META3]] +// CHECK: [[LAND_END]]: +// CHECK-NEXT: [[TMP15:%.*]] = phi i1 [ false, %[[LAND_LHS_TRUE]] ], [ false, %[[ENTRY]] ], [ [[CMP72]], %[[LAND_RHS]] ], !annotation [[META3]] +// CHECK-NEXT: br i1 [[TMP15]], label %[[CONT:.*]], label %[[TRAP:.*]], !annotation [[META3]] +// CHECK: [[TRAP]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5:[0-9]+]], !annotation [[META3]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT]]: +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP73]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR74:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP73]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR75:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR74]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR76:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP73]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB77:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR76]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR78:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP73]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB79:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR78]], align 8, !annotation [[META3]] +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP80]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR81:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP80]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB82:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR81]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP80]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_UB82]], ptr [[TMP16]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR83:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP80]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR84:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR83]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR85:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP80]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB86:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR85]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR87:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP80]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB88:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR87]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[CMP89:%.*]] = icmp ule ptr [[WIDE_PTR_PTR75]], [[WIDE_PTR_PTR84]], !annotation [[META3]] +// CHECK-NEXT: br i1 [[CMP89]], label %[[LAND_LHS_TRUE90:.*]], label %[[LAND_END143:.*]], !annotation [[META3]] +// CHECK: [[LAND_LHS_TRUE90]]: +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP91]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR92:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP91]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB93:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR92]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP91]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_LB93]], ptr [[TMP17]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR94:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP91]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR95:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR94]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR96:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP91]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB97:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR96]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR98:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP91]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB99:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR98]], align 8, !annotation [[META3]] +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP100]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR101:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP100]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR102:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR101]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR103:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP100]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB104:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR103]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR105:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP100]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB106:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR105]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[CMP107:%.*]] = icmp ule ptr [[WIDE_PTR_PTR95]], [[WIDE_PTR_PTR102]], !annotation [[META3]] +// CHECK-NEXT: br i1 [[CMP107]], label %[[LAND_RHS108:.*]], label %[[LAND_END143]], !annotation [[META3]] +// CHECK: [[LAND_RHS108]]: +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP110]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR111:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP110]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB112:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR111]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP110]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_UB112]], ptr [[TMP18]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR113:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP110]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR114:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR113]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR115:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP110]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB116:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR115]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR117:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP110]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB118:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR117]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP109]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR114]], ptr [[TMP19]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP109]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_UB116]], ptr [[TMP20]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP109]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_LB118]], ptr [[TMP21]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR119:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP109]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR120:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR119]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR121:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP109]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB122:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR121]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR123:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP109]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB124:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR123]], align 8, !annotation [[META3]] +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP126]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR127:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP126]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR128:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR127]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR129:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP126]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB130:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR129]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR131:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP126]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB132:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR131]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP125]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR128]], ptr [[TMP22]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP125]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_UB130]], ptr [[TMP23]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP125]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: store ptr [[WIDE_PTR_LB132]], ptr [[TMP24]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR133:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP125]], i32 0, i32 0, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_PTR134:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR133]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR135:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP125]], i32 0, i32 1, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_UB136:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR135]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR137:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP125]], i32 0, i32 2, !annotation [[META3]] +// CHECK-NEXT: [[WIDE_PTR_LB138:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR137]], align 8, !annotation [[META3]] +// CHECK-NEXT: [[SUB_PTR_LHS_CAST139:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR120]] to i64, !annotation [[META3]] +// CHECK-NEXT: [[SUB_PTR_RHS_CAST140:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR134]] to i64, !annotation [[META3]] +// CHECK-NEXT: [[SUB_PTR_SUB141:%.*]] = sub i64 [[SUB_PTR_LHS_CAST139]], [[SUB_PTR_RHS_CAST140]], !annotation [[META3]] +// CHECK-NEXT: [[CMP142:%.*]] = icmp ule i64 10, [[SUB_PTR_SUB141]], !annotation [[META3]] +// CHECK-NEXT: br label %[[LAND_END143]], !annotation [[META3]] +// CHECK: [[LAND_END143]]: +// CHECK-NEXT: [[TMP25:%.*]] = phi i1 [ false, %[[LAND_LHS_TRUE90]] ], [ false, %[[CONT]] ], [ [[CMP142]], %[[LAND_RHS108]] ], !annotation [[META3]] +// CHECK-NEXT: br i1 [[TMP25]], label %[[CONT145:.*]], label %[[TRAP144:.*]], !annotation [[META3]] +// CHECK: [[TRAP144]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5]], !annotation [[META3]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT145]]: +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP146]], ptr align 8 [[TMP]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR147:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP146]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR148:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR147]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR149:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP146]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB150:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR149]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR151:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP146]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB152:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR151]], align 8 +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP153]], ptr align 8 [[TMP1]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR154:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP153]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR155:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR154]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR156:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP153]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB157:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR156]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR158:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP153]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB159:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR158]], align 8 +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[WIDE_PTR_PTR148]], ptr align 1 [[WIDE_PTR_PTR155]], i64 10, i1 false) // CHECK-NEXT: call void @llvm.assume(i1 true) -// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[WIDE_PTR_PTR149]], i64 10 +// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[WIDE_PTR_PTR148]], i64 10 // CHECK-NEXT: ret void // void foo(void) { char *dst, *src; __builtin_memcpy(dst, src, 10); } +//. +// CHECK: [[META2]] = !{!"bounds-safety-zero-init"} +// CHECK: [[META3]] = !{!"bounds-safety-generic"} +//. diff --git a/clang/test/BoundsSafety/CodeGen/call-with-count-ptr.c b/clang/test/BoundsSafety/CodeGen/call-with-count-ptr.c index a24517351b767..50f611ea0a312 100644 --- a/clang/test/BoundsSafety/CodeGen/call-with-count-ptr.c +++ b/clang/test/BoundsSafety/CodeGen/call-with-count-ptr.c @@ -1,11 +1,9 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 // REQUIRES: system-darwin -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --replace-value-regex "!annotation ![0-9]+" "!tbaa ![0-9]+" "!tbaa\.struct ![0-9]+" "!nosanitize ![0-9]+" "!srcloc ![0-9]+" --prefix-filecheck-ir-name TMP_ // RUN: %clang_cc1 -O0 -triple x86_64 -fbounds-safety -Wno-int-conversion -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK_X64_O0 // RUN: %clang_cc1 -O0 -triple arm64-apple-iphoneos -fbounds-safety -Wno-int-conversion -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK_ARM64_O0 -// RUN: %clang_cc1 -O0 -triple x86_64 -fbounds-safety -x objective-c -fbounds-attributes-objc-experimental -Wno-int-conversion -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK_X64_O0 -// RUN: %clang_cc1 -O0 -triple arm64-apple-iphoneos -fbounds-safety -Wno-int-conversion -x objective-c -fbounds-attributes-objc-experimental -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK_ARM64_O0 #include #define memmove_(b, ...) __builtin___memmove_chk(b, __VA_ARGS__, b) @@ -15,504 +13,506 @@ int arr[] = {0, 1, 2, 3, 4, 5}; -// CHECK_X64_O0-LABEL: @foo( -// CHECK_X64_O0-NEXT: entry: +// CHECK_X64_O0-LABEL: define dso_local i32 @foo( +// CHECK_X64_O0-SAME: ptr noundef [[BUF:%.*]], ptr noundef [[LEN:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK_X64_O0-NEXT: [[ENTRY:.*:]] // CHECK_X64_O0-NEXT: [[BUF_ADDR:%.*]] = alloca ptr, align 8 // CHECK_X64_O0-NEXT: [[LEN_ADDR:%.*]] = alloca ptr, align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP3:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP10:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP19:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP20:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP35:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP36:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP49:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP56:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP66:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP75:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP83:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP84:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP99:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP100:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP119:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_X64_O0-NEXT: [[AGG_TEMP126:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK_X64_O0-NEXT: store ptr [[BUF:%.*]], ptr [[BUF_ADDR]], align 8 -// CHECK_X64_O0-NEXT: store ptr [[LEN:%.*]], ptr [[LEN_ADDR]], align 8 +// CHECK_X64_O0-NEXT: [[TMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK_X64_O0-NEXT: [[TMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP9:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP18:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP19:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP34:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP35:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP48:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP55:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP65:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP74:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP82:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP83:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP98:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP99:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP118:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_X64_O0-NEXT: [[AGG_TEMP125:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK_X64_O0-NEXT: store ptr [[BUF]], ptr [[BUF_ADDR]], align 8 +// CHECK_X64_O0-NEXT: store ptr [[LEN]], ptr [[LEN_ADDR]], align 8 // CHECK_X64_O0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BUF_ADDR]], align 8 // CHECK_X64_O0-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LEN_ADDR]], align 8 // CHECK_X64_O0-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 // CHECK_X64_O0-NEXT: [[IDX_EXT:%.*]] = sext i32 [[TMP2]] to i64 // CHECK_X64_O0-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[IDX_EXT]] -// CHECK_X64_O0-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0 // CHECK_X64_O0-NEXT: store ptr [[TMP0]], ptr [[TMP3]], align 8 -// CHECK_X64_O0-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1 // CHECK_X64_O0-NEXT: store ptr [[ADD_PTR]], ptr [[TMP4]], align 8 -// CHECK_X64_O0-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2 // CHECK_X64_O0-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0 // CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1 // CHECK_X64_O0-NEXT: [[WIDE_PTR_UB:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2 // CHECK_X64_O0-NEXT: [[WIDE_PTR_LB:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR]], align 8 -// CHECK_X64_O0-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 0 // CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR]], ptr [[TMP6]], align 8 -// CHECK_X64_O0-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 1 // CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB]], ptr [[TMP7]], align 8 -// CHECK_X64_O0-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 2 // CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB]], ptr [[TMP8]], align 8 -// CHECK_X64_O0-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0 // CHECK_X64_O0-NEXT: store ptr @arr, ptr [[TMP9]], align 8 -// CHECK_X64_O0-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1 // CHECK_X64_O0-NEXT: store ptr getelementptr inbounds (i32, ptr @arr, i64 6), ptr [[TMP10]], align 8 -// CHECK_X64_O0-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2 // CHECK_X64_O0-NEXT: store ptr @arr, ptr [[TMP11]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR5:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR4]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB7:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR6]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB9:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR8]], align 8 -// CHECK_X64_O0-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP2]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR5]], ptr [[TMP12]], align 8 -// CHECK_X64_O0-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP2]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB7]], ptr [[TMP13]], align 8 -// CHECK_X64_O0-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP2]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB9]], ptr [[TMP14]], align 8 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR4:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR3]], align 8 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB6:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR5]], align 8 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB8:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR7]], align 8 +// CHECK_X64_O0-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR4]], ptr [[TMP12]], align 8 +// CHECK_X64_O0-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB6]], ptr [[TMP13]], align 8 +// CHECK_X64_O0-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB8]], ptr [[TMP14]], align 8 // CHECK_X64_O0-NEXT: [[TMP15:%.*]] = load ptr, ptr [[BUF_ADDR]], align 8 // CHECK_X64_O0-NEXT: [[TMP16:%.*]] = load ptr, ptr [[LEN_ADDR]], align 8 // CHECK_X64_O0-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 -// CHECK_X64_O0-NEXT: [[IDX_EXT11:%.*]] = sext i32 [[TMP17]] to i64 -// CHECK_X64_O0-NEXT: [[ADD_PTR12:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i64 [[IDX_EXT11]] -// CHECK_X64_O0-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: [[IDX_EXT10:%.*]] = sext i32 [[TMP17]] to i64 +// CHECK_X64_O0-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i64 [[IDX_EXT10]] +// CHECK_X64_O0-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 0 // CHECK_X64_O0-NEXT: store ptr [[TMP15]], ptr [[TMP18]], align 8 -// CHECK_X64_O0-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: store ptr [[ADD_PTR12]], ptr [[TMP19]], align 8 -// CHECK_X64_O0-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: store ptr [[ADD_PTR11]], ptr [[TMP19]], align 8 +// CHECK_X64_O0-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 2 // CHECK_X64_O0-NEXT: store ptr [[TMP15]], ptr [[TMP20]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR14:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR13]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR15:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB16:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR15]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR17:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB18:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR17]], align 8 -// CHECK_X64_O0-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR14]] to i64 -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP20]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR21:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB22:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR21]], align 8 -// CHECK_X64_O0-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB22]], ptr [[TMP22]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR24:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR23]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB26:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR25]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB28:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR27]], align 8 -// CHECK_X64_O0-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR24]], ptr [[TMP23]], align 8 -// CHECK_X64_O0-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB26]], ptr [[TMP24]], align 8 -// CHECK_X64_O0-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB28]], ptr [[TMP25]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR30:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR29]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB32:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR31]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB34:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR33]], align 8 -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP36]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP36]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR38:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR37]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR39:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP36]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB40:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR39]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR41:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP36]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB42:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR41]], align 8 -// CHECK_X64_O0-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR38]], ptr [[TMP26]], align 8 -// CHECK_X64_O0-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB40]], ptr [[TMP27]], align 8 -// CHECK_X64_O0-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB42]], ptr [[TMP28]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR43:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR44:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR43]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR45:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB46:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR45]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR47:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB48:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR47]], align 8 -// CHECK_X64_O0-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR30]] to i64 -// CHECK_X64_O0-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR44]] to i64 -// CHECK_X64_O0-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] -// CHECK_X64_O0-NEXT: [[CMP:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB]], {{!annotation ![0-9]+}} -// CHECK_X64_O0-NEXT: br i1 [[CMP]], label [[CONT:%.*]], label [[TRAP:%.*]], {{!annotation ![0-9]+}} -// CHECK_X64_O0: trap: -// CHECK_X64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5:[0-9]+]], {{!annotation ![0-9]+}} -// CHECK_X64_O0-NEXT: unreachable -// CHECK_X64_O0: cont: -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP49]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR50:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP49]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR51:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR50]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR52:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP49]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB53:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR52]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR54:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP49]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB55:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR54]], align 8 -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP56]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR57:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB58:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR57]], align 8 -// CHECK_X64_O0-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB58]], ptr [[TMP29]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR59:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR60:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR59]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR61:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB62:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR61]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR63:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB64:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR63]], align 8 -// CHECK_X64_O0-NEXT: [[CMP65:%.*]] = icmp ule ptr [[WIDE_PTR_PTR51]], [[WIDE_PTR_PTR60]] -// CHECK_X64_O0-NEXT: br i1 [[CMP65]], label [[LAND_LHS_TRUE:%.*]], label [[LAND_END:%.*]] -// CHECK_X64_O0: land.lhs.true: -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP66]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR67:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB68:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR67]], align 8 -// CHECK_X64_O0-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB68]], ptr [[TMP30]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR69:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR70:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR69]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR71:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB72:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR71]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR73:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB74:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR73]], align 8 -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP75]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR76:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP75]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR77:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR76]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR78:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP75]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB79:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR78]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR80:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP75]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB81:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR80]], align 8 -// CHECK_X64_O0-NEXT: [[CMP82:%.*]] = icmp ule ptr [[WIDE_PTR_PTR70]], [[WIDE_PTR_PTR77]] -// CHECK_X64_O0-NEXT: br i1 [[CMP82]], label [[LAND_RHS:%.*]], label [[LAND_END]] -// CHECK_X64_O0: land.rhs: -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP84]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR85:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB86:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR85]], align 8 -// CHECK_X64_O0-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB86]], ptr [[TMP31]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR87:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR88:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR87]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR89:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB90:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR89]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR91:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB92:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR91]], align 8 -// CHECK_X64_O0-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR88]], ptr [[TMP32]], align 8 -// CHECK_X64_O0-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB90]], ptr [[TMP33]], align 8 -// CHECK_X64_O0-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB92]], ptr [[TMP34]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR93:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR94:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR93]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR95:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB96:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR95]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR97:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB98:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR97]], align 8 -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP100]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR101:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP100]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR102:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR101]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR103:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP100]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB104:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR103]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR105:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP100]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB106:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR105]], align 8 -// CHECK_X64_O0-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR102]], ptr [[TMP35]], align 8 -// CHECK_X64_O0-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB104]], ptr [[TMP36]], align 8 -// CHECK_X64_O0-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB106]], ptr [[TMP37]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR107:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR108:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR107]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR109:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB110:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR109]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR111:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB112:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR111]], align 8 -// CHECK_X64_O0-NEXT: [[SUB_PTR_LHS_CAST113:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR94]] to i64 -// CHECK_X64_O0-NEXT: [[SUB_PTR_RHS_CAST114:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR108]] to i64 -// CHECK_X64_O0-NEXT: [[SUB_PTR_SUB115:%.*]] = sub i64 [[SUB_PTR_LHS_CAST113]], [[SUB_PTR_RHS_CAST114]] -// CHECK_X64_O0-NEXT: [[CMP116:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB115]] -// CHECK_X64_O0-NEXT: br label [[LAND_END]] -// CHECK_X64_O0: land.end: -// CHECK_X64_O0-NEXT: [[TMP38:%.*]] = phi i1 [ false, [[LAND_LHS_TRUE]] ], [ false, [[CONT]] ], [ [[CMP116]], [[LAND_RHS]] ], {{!annotation ![0-9]+}} -// CHECK_X64_O0-NEXT: br i1 [[TMP38]], label [[CONT118:%.*]], label [[TRAP117:%.*]], {{!annotation ![0-9]+}} -// CHECK_X64_O0: trap117: -// CHECK_X64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5]], {{!annotation ![0-9]+}} -// CHECK_X64_O0-NEXT: unreachable -// CHECK_X64_O0: cont118: -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP119]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR120:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP119]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR121:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR120]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR122:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP119]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB123:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR122]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR124:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP119]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB125:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR124]], align 8 -// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP126]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR127:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP126]], i32 0, i32 0 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR128:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR127]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR129:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP126]], i32 0, i32 1 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB130:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR129]], align 8 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR131:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP126]], i32 0, i32 2 -// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB132:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR131]], align 8 -// CHECK_X64_O0-NEXT: [[CALL:%.*]] = call ptr @__memmove_chk(ptr noundef [[WIDE_PTR_PTR121]], ptr noundef [[WIDE_PTR_PTR128]], i64 noundef 24, i64 noundef [[TMP21]]) #[[ATTR6:[0-9]+]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR13:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR12]], align 8 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB15:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR14]], align 8 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB17:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR16]], align 8 +// CHECK_X64_O0-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR13]] to i64 +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP19]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META2:![0-9]+]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB21:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR20]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB21]], ptr [[TMP22]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR23:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR22]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB25:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR24]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB27:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR26]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR23]], ptr [[TMP23]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB25]], ptr [[TMP24]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB27]], ptr [[TMP25]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR29:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR28]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB31:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR30]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB33:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR32]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP35]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR37:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR36]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR38:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB39:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR38]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR40:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB41:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR40]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR37]], ptr [[TMP26]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB39]], ptr [[TMP27]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB41]], ptr [[TMP28]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR42:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR43:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR42]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR44:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB45:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR44]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR46:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB47:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR46]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR29]] to i64, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR43]] to i64, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]], !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[CMP:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB]], !annotation [[META2]] +// CHECK_X64_O0-NEXT: br i1 [[CMP]], label %[[CONT:.*]], label %[[TRAP:.*]], !annotation [[META2]] +// CHECK_X64_O0: [[TRAP]]: +// CHECK_X64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5:[0-9]+]], !annotation [[META2]] +// CHECK_X64_O0-NEXT: unreachable, !annotation [[META2]] +// CHECK_X64_O0: [[CONT]]: +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP48]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR49:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR50:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR49]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR51:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB52:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR51]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR53:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB54:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR53]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP55]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR56:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB57:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR56]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB57]], ptr [[TMP29]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR58:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR59:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR58]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR60:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB61:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR60]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR62:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB63:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR62]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[CMP64:%.*]] = icmp ule ptr [[WIDE_PTR_PTR50]], [[WIDE_PTR_PTR59]], !annotation [[META2]] +// CHECK_X64_O0-NEXT: br i1 [[CMP64]], label %[[LAND_LHS_TRUE:.*]], label %[[LAND_END:.*]], !annotation [[META2]] +// CHECK_X64_O0: [[LAND_LHS_TRUE]]: +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP65]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR66:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB67:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR66]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB67]], ptr [[TMP30]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR68:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR69:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR68]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR70:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB71:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR70]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR72:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB73:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR72]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP74]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR75:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR76:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR75]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR77:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB78:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR77]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR79:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB80:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR79]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[CMP81:%.*]] = icmp ule ptr [[WIDE_PTR_PTR69]], [[WIDE_PTR_PTR76]], !annotation [[META2]] +// CHECK_X64_O0-NEXT: br i1 [[CMP81]], label %[[LAND_RHS:.*]], label %[[LAND_END]], !annotation [[META2]] +// CHECK_X64_O0: [[LAND_RHS]]: +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP83]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR84:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB85:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR84]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB85]], ptr [[TMP31]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR86:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR87:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR86]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR88:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB89:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR88]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR90:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB91:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR90]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR87]], ptr [[TMP32]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB89]], ptr [[TMP33]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB91]], ptr [[TMP34]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR92:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR93:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR92]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR94:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB95:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR94]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR96:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB97:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR96]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP99]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR100:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR101:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR100]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR102:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB103:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR102]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR104:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB105:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR104]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_PTR101]], ptr [[TMP35]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_UB103]], ptr [[TMP36]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: store ptr [[WIDE_PTR_LB105]], ptr [[TMP37]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR106:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 0, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR107:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR106]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR108:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 1, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB109:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR108]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR110:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 2, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB111:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR110]], align 8, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[SUB_PTR_LHS_CAST112:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR93]] to i64, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[SUB_PTR_RHS_CAST113:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR107]] to i64, !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[SUB_PTR_SUB114:%.*]] = sub i64 [[SUB_PTR_LHS_CAST112]], [[SUB_PTR_RHS_CAST113]], !annotation [[META2]] +// CHECK_X64_O0-NEXT: [[CMP115:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB114]], !annotation [[META2]] +// CHECK_X64_O0-NEXT: br label %[[LAND_END]], !annotation [[META2]] +// CHECK_X64_O0: [[LAND_END]]: +// CHECK_X64_O0-NEXT: [[TMP38:%.*]] = phi i1 [ false, %[[LAND_LHS_TRUE]] ], [ false, %[[CONT]] ], [ [[CMP115]], %[[LAND_RHS]] ], !annotation [[META2]] +// CHECK_X64_O0-NEXT: br i1 [[TMP38]], label %[[CONT117:.*]], label %[[TRAP116:.*]], !annotation [[META2]] +// CHECK_X64_O0: [[TRAP116]]: +// CHECK_X64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5]], !annotation [[META2]] +// CHECK_X64_O0-NEXT: unreachable, !annotation [[META2]] +// CHECK_X64_O0: [[CONT117]]: +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP118]], ptr align 8 [[TMP]], i64 24, i1 false) +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR119:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR120:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR119]], align 8 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR121:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB122:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR121]], align 8 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR123:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB124:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR123]], align 8 +// CHECK_X64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP125]], ptr align 8 [[TMP1]], i64 24, i1 false) +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR_ADDR126:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 0 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_PTR127:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR126]], align 8 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB_ADDR128:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 1 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_UB129:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR128]], align 8 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB_ADDR130:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 2 +// CHECK_X64_O0-NEXT: [[WIDE_PTR_LB131:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR130]], align 8 +// CHECK_X64_O0-NEXT: [[CALL:%.*]] = call ptr @__memmove_chk(ptr noundef [[WIDE_PTR_PTR120]], ptr noundef [[WIDE_PTR_PTR127]], i64 noundef 24, i64 noundef [[TMP21]]) #[[ATTR6:[0-9]+]] // CHECK_X64_O0-NEXT: call void @llvm.assume(i1 true) -// CHECK_X64_O0-NEXT: [[ADD_PTR133:%.*]] = getelementptr inbounds nuw i8, ptr [[CALL]], i64 24 +// CHECK_X64_O0-NEXT: [[ADD_PTR132:%.*]] = getelementptr inbounds nuw i8, ptr [[CALL]], i64 24 // CHECK_X64_O0-NEXT: ret i32 0 // -// CHECK_ARM64_O0-LABEL: @foo( -// CHECK_ARM64_O0-NEXT: entry: +// CHECK_ARM64_O0-LABEL: define dso_local i32 @foo( +// CHECK_ARM64_O0-SAME: ptr noundef [[BUF:%.*]], ptr noundef [[LEN:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK_ARM64_O0-NEXT: [[ENTRY:.*:]] // CHECK_ARM64_O0-NEXT: [[BUF_ADDR:%.*]] = alloca ptr, align 8 // CHECK_ARM64_O0-NEXT: [[LEN_ADDR:%.*]] = alloca ptr, align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP3:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP10:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP19:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP20:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP35:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP36:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP49:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP56:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP66:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP75:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP83:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP84:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP99:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP100:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP119:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 -// CHECK_ARM64_O0-NEXT: [[AGG_TEMP126:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 -// CHECK_ARM64_O0-NEXT: store ptr [[BUF:%.*]], ptr [[BUF_ADDR]], align 8 -// CHECK_ARM64_O0-NEXT: store ptr [[LEN:%.*]], ptr [[LEN_ADDR]], align 8 +// CHECK_ARM64_O0-NEXT: [[TMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK_ARM64_O0-NEXT: [[TMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP9:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP18:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP19:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP34:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP35:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP48:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP55:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP65:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP74:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP82:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP83:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP98:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.3", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP99:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP118:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK_ARM64_O0-NEXT: [[AGG_TEMP125:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK_ARM64_O0-NEXT: store ptr [[BUF]], ptr [[BUF_ADDR]], align 8 +// CHECK_ARM64_O0-NEXT: store ptr [[LEN]], ptr [[LEN_ADDR]], align 8 // CHECK_ARM64_O0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BUF_ADDR]], align 8 // CHECK_ARM64_O0-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LEN_ADDR]], align 8 // CHECK_ARM64_O0-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 // CHECK_ARM64_O0-NEXT: [[IDX_EXT:%.*]] = sext i32 [[TMP2]] to i64 // CHECK_ARM64_O0-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[TMP0]], i64 [[IDX_EXT]] -// CHECK_ARM64_O0-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0 // CHECK_ARM64_O0-NEXT: store ptr [[TMP0]], ptr [[TMP3]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1 // CHECK_ARM64_O0-NEXT: store ptr [[ADD_PTR]], ptr [[TMP4]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2 // CHECK_ARM64_O0-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0 // CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1 // CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP1]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2 // CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 0 // CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR]], ptr [[TMP6]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 1 // CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB]], ptr [[TMP7]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[TMP]], i32 0, i32 2 // CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB]], ptr [[TMP8]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0 // CHECK_ARM64_O0-NEXT: store ptr @arr, ptr [[TMP9]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1 // CHECK_ARM64_O0-NEXT: store ptr getelementptr inbounds (i32, ptr @arr, i64 6), ptr [[TMP10]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2 // CHECK_ARM64_O0-NEXT: store ptr @arr, ptr [[TMP11]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR5:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR4]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB7:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR6]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP3]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB9:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR8]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP2]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR5]], ptr [[TMP12]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP2]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB7]], ptr [[TMP13]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP2]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB9]], ptr [[TMP14]], align 8 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR4:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR3]], align 8 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB6:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR5]], align 8 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP2]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB8:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR7]], align 8 +// CHECK_ARM64_O0-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR4]], ptr [[TMP12]], align 8 +// CHECK_ARM64_O0-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB6]], ptr [[TMP13]], align 8 +// CHECK_ARM64_O0-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[TMP1]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB8]], ptr [[TMP14]], align 8 // CHECK_ARM64_O0-NEXT: [[TMP15:%.*]] = load ptr, ptr [[BUF_ADDR]], align 8 // CHECK_ARM64_O0-NEXT: [[TMP16:%.*]] = load ptr, ptr [[LEN_ADDR]], align 8 // CHECK_ARM64_O0-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 -// CHECK_ARM64_O0-NEXT: [[IDX_EXT11:%.*]] = sext i32 [[TMP17]] to i64 -// CHECK_ARM64_O0-NEXT: [[ADD_PTR12:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i64 [[IDX_EXT11]] -// CHECK_ARM64_O0-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: [[IDX_EXT10:%.*]] = sext i32 [[TMP17]] to i64 +// CHECK_ARM64_O0-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i64 [[IDX_EXT10]] +// CHECK_ARM64_O0-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 0 // CHECK_ARM64_O0-NEXT: store ptr [[TMP15]], ptr [[TMP18]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: store ptr [[ADD_PTR12]], ptr [[TMP19]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: store ptr [[ADD_PTR11]], ptr [[TMP19]], align 8 +// CHECK_ARM64_O0-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 2 // CHECK_ARM64_O0-NEXT: store ptr [[TMP15]], ptr [[TMP20]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR14:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR13]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR15:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB16:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR15]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR17:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP10]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB18:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR17]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR14]] to i64 -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP20]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR21:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB22:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR21]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB22]], ptr [[TMP22]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR24:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR23]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB26:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR25]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP20]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB28:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR27]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR24]], ptr [[TMP23]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB26]], ptr [[TMP24]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB28]], ptr [[TMP25]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR30:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR29]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB32:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR31]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP19]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB34:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR33]], align 8 -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP36]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP36]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR38:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR37]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR39:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP36]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB40:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR39]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR41:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP36]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB42:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR41]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR38]], ptr [[TMP26]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB40]], ptr [[TMP27]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB42]], ptr [[TMP28]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR43:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR44:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR43]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR45:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB46:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR45]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR47:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP35]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB48:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR47]], align 8 -// CHECK_ARM64_O0-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR30]] to i64 -// CHECK_ARM64_O0-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR44]] to i64 -// CHECK_ARM64_O0-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] -// CHECK_ARM64_O0-NEXT: [[CMP:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB]], {{!annotation ![0-9]+}} -// CHECK_ARM64_O0-NEXT: br i1 [[CMP]], label [[CONT:%.*]], label [[TRAP:%.*]], {{!annotation ![0-9]+}} -// CHECK_ARM64_O0: trap: -// CHECK_ARM64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5:[0-9]+]], {{!annotation ![0-9]+}} -// CHECK_ARM64_O0-NEXT: unreachable -// CHECK_ARM64_O0: cont: -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP49]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR50:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP49]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR51:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR50]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR52:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP49]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB53:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR52]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR54:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP49]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB55:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR54]], align 8 -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP56]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR57:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB58:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR57]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB58]], ptr [[TMP29]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR59:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR60:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR59]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR61:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB62:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR61]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR63:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP56]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB64:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR63]], align 8 -// CHECK_ARM64_O0-NEXT: [[CMP65:%.*]] = icmp ule ptr [[WIDE_PTR_PTR51]], [[WIDE_PTR_PTR60]] -// CHECK_ARM64_O0-NEXT: br i1 [[CMP65]], label [[LAND_LHS_TRUE:%.*]], label [[LAND_END:%.*]] -// CHECK_ARM64_O0: land.lhs.true: -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP66]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR67:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB68:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR67]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB68]], ptr [[TMP30]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR69:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR70:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR69]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR71:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB72:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR71]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR73:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB74:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR73]], align 8 -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP75]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR76:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP75]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR77:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR76]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR78:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP75]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB79:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR78]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR80:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP75]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB81:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR80]], align 8 -// CHECK_ARM64_O0-NEXT: [[CMP82:%.*]] = icmp ule ptr [[WIDE_PTR_PTR70]], [[WIDE_PTR_PTR77]] -// CHECK_ARM64_O0-NEXT: br i1 [[CMP82]], label [[LAND_RHS:%.*]], label [[LAND_END]] -// CHECK_ARM64_O0: land.rhs: -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP84]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR85:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB86:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR85]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB86]], ptr [[TMP31]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR87:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR88:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR87]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR89:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB90:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR89]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR91:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP84]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB92:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR91]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR88]], ptr [[TMP32]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB90]], ptr [[TMP33]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB92]], ptr [[TMP34]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR93:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR94:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR93]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR95:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB96:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR95]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR97:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP83]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB98:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR97]], align 8 -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP100]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR101:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP100]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR102:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR101]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR103:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP100]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB104:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR103]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR105:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP100]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB106:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR105]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR102]], ptr [[TMP35]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB104]], ptr [[TMP36]], align 8 -// CHECK_ARM64_O0-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB106]], ptr [[TMP37]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR107:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR108:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR107]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR109:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB110:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR109]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR111:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP99]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB112:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR111]], align 8 -// CHECK_ARM64_O0-NEXT: [[SUB_PTR_LHS_CAST113:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR94]] to i64 -// CHECK_ARM64_O0-NEXT: [[SUB_PTR_RHS_CAST114:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR108]] to i64 -// CHECK_ARM64_O0-NEXT: [[SUB_PTR_SUB115:%.*]] = sub i64 [[SUB_PTR_LHS_CAST113]], [[SUB_PTR_RHS_CAST114]] -// CHECK_ARM64_O0-NEXT: [[CMP116:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB115]] -// CHECK_ARM64_O0-NEXT: br label [[LAND_END]] -// CHECK_ARM64_O0: land.end: -// CHECK_ARM64_O0-NEXT: [[TMP38:%.*]] = phi i1 [ false, [[LAND_LHS_TRUE]] ], [ false, [[CONT]] ], [ [[CMP116]], [[LAND_RHS]] ], {{!annotation ![0-9]+}} -// CHECK_ARM64_O0-NEXT: br i1 [[TMP38]], label [[CONT118:%.*]], label [[TRAP117:%.*]], {{!annotation ![0-9]+}} -// CHECK_ARM64_O0: trap117: -// CHECK_ARM64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5]], {{!annotation ![0-9]+}} -// CHECK_ARM64_O0-NEXT: unreachable -// CHECK_ARM64_O0: cont118: -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP119]], ptr align 8 [[AGG_TEMP]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR120:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP119]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR121:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR120]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR122:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP119]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB123:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR122]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR124:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP119]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB125:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR124]], align 8 -// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP126]], ptr align 8 [[AGG_TEMP2]], i64 24, i1 false) -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR127:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP126]], i32 0, i32 0 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR128:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR127]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR129:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP126]], i32 0, i32 1 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB130:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR129]], align 8 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR131:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP126]], i32 0, i32 2 -// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB132:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR131]], align 8 -// CHECK_ARM64_O0-NEXT: [[CALL:%.*]] = call ptr @__memmove_chk(ptr noundef [[WIDE_PTR_PTR121]], ptr noundef [[WIDE_PTR_PTR128]], i64 noundef 24, i64 noundef [[TMP21]]) #[[ATTR6:[0-9]+]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR13:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR12]], align 8 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB15:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR14]], align 8 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP9]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB17:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR16]], align 8 +// CHECK_ARM64_O0-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR13]] to i64 +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP19]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META2:![0-9]+]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB21:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR20]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB21]], ptr [[TMP22]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR23:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR22]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB25:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR24]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP19]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB27:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR26]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR23]], ptr [[TMP23]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB25]], ptr [[TMP24]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB27]], ptr [[TMP25]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR29:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR28]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB31:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR30]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP18]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB33:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR32]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP35]], ptr align 8 [[TMP1]], i64 24, i1 false), !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR37:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR36]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR38:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB39:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR38]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR40:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP35]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB41:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR40]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR37]], ptr [[TMP26]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB39]], ptr [[TMP27]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB41]], ptr [[TMP28]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR42:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR43:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR42]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR44:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB45:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR44]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR46:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP34]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB47:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR46]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR29]] to i64, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR43]] to i64, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]], !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[CMP:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB]], !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: br i1 [[CMP]], label %[[CONT:.*]], label %[[TRAP:.*]], !annotation [[META2]] +// CHECK_ARM64_O0: [[TRAP]]: +// CHECK_ARM64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5:[0-9]+]], !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: unreachable, !annotation [[META2]] +// CHECK_ARM64_O0: [[CONT]]: +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP48]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR49:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR50:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR49]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR51:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB52:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR51]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR53:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP48]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB54:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR53]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP55]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR56:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB57:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR56]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB57]], ptr [[TMP29]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR58:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR59:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR58]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR60:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB61:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR60]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR62:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP55]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB63:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR62]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[CMP64:%.*]] = icmp ule ptr [[WIDE_PTR_PTR50]], [[WIDE_PTR_PTR59]], !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: br i1 [[CMP64]], label %[[LAND_LHS_TRUE:.*]], label %[[LAND_END:.*]], !annotation [[META2]] +// CHECK_ARM64_O0: [[LAND_LHS_TRUE]]: +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP65]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR66:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB67:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR66]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB67]], ptr [[TMP30]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR68:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR69:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR68]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR70:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB71:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR70]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR72:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP65]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB73:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR72]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP74]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR75:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR76:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR75]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR77:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB78:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR77]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR79:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP74]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB80:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR79]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[CMP81:%.*]] = icmp ule ptr [[WIDE_PTR_PTR69]], [[WIDE_PTR_PTR76]], !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: br i1 [[CMP81]], label %[[LAND_RHS:.*]], label %[[LAND_END]], !annotation [[META2]] +// CHECK_ARM64_O0: [[LAND_RHS]]: +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP83]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR84:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB85:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR84]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB85]], ptr [[TMP31]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR86:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR87:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR86]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR88:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB89:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR88]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR90:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP83]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB91:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR90]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR87]], ptr [[TMP32]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB89]], ptr [[TMP33]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB91]], ptr [[TMP34]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR92:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR93:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR92]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR94:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB95:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR94]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR96:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP82]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB97:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR96]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP99]], ptr align 8 [[TMP]], i64 24, i1 false), !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR100:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR101:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR100]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR102:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB103:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR102]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR104:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP99]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB105:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR104]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_PTR101]], ptr [[TMP35]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_UB103]], ptr [[TMP36]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: store ptr [[WIDE_PTR_LB105]], ptr [[TMP37]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR106:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 0, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR107:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR106]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR108:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 1, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB109:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR108]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR110:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.3", ptr [[AGG_TEMP98]], i32 0, i32 2, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB111:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR110]], align 8, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[SUB_PTR_LHS_CAST112:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR93]] to i64, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[SUB_PTR_RHS_CAST113:%.*]] = ptrtoint ptr [[WIDE_PTR_PTR107]] to i64, !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[SUB_PTR_SUB114:%.*]] = sub i64 [[SUB_PTR_LHS_CAST112]], [[SUB_PTR_RHS_CAST113]], !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: [[CMP115:%.*]] = icmp ule i64 24, [[SUB_PTR_SUB114]], !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: br label %[[LAND_END]], !annotation [[META2]] +// CHECK_ARM64_O0: [[LAND_END]]: +// CHECK_ARM64_O0-NEXT: [[TMP38:%.*]] = phi i1 [ false, %[[LAND_LHS_TRUE]] ], [ false, %[[CONT]] ], [ [[CMP115]], %[[LAND_RHS]] ], !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: br i1 [[TMP38]], label %[[CONT117:.*]], label %[[TRAP116:.*]], !annotation [[META2]] +// CHECK_ARM64_O0: [[TRAP116]]: +// CHECK_ARM64_O0-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5]], !annotation [[META2]] +// CHECK_ARM64_O0-NEXT: unreachable, !annotation [[META2]] +// CHECK_ARM64_O0: [[CONT117]]: +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP118]], ptr align 8 [[TMP]], i64 24, i1 false) +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR119:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR120:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR119]], align 8 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR121:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB122:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR121]], align 8 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR123:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP118]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB124:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR123]], align 8 +// CHECK_ARM64_O0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP125]], ptr align 8 [[TMP1]], i64 24, i1 false) +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR_ADDR126:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 0 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_PTR127:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR126]], align 8 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB_ADDR128:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 1 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_UB129:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR128]], align 8 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB_ADDR130:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP125]], i32 0, i32 2 +// CHECK_ARM64_O0-NEXT: [[WIDE_PTR_LB131:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR130]], align 8 +// CHECK_ARM64_O0-NEXT: [[CALL:%.*]] = call ptr @__memmove_chk(ptr noundef [[WIDE_PTR_PTR120]], ptr noundef [[WIDE_PTR_PTR127]], i64 noundef 24, i64 noundef [[TMP21]]) #[[ATTR6:[0-9]+]] // CHECK_ARM64_O0-NEXT: call void @llvm.assume(i1 true) -// CHECK_ARM64_O0-NEXT: [[ADD_PTR133:%.*]] = getelementptr inbounds nuw i8, ptr [[CALL]], i64 24 +// CHECK_ARM64_O0-NEXT: [[ADD_PTR132:%.*]] = getelementptr inbounds nuw i8, ptr [[CALL]], i64 24 // CHECK_ARM64_O0-NEXT: ret i32 0 // int foo(int *__counted_by(*len) buf, int *len) { @@ -520,3 +520,8 @@ int foo(int *__counted_by(*len) buf, int *len) { return 0; } +//. +// CHECK_X64_O0: [[META2]] = !{!"bounds-safety-generic"} +//. +// CHECK_ARM64_O0: [[META2]] = !{!"bounds-safety-generic"} +//. diff --git a/clang/test/BoundsSafety/CodeGen/count-dependent-assignment-checks/counted-to-counted-assignments-O2.c b/clang/test/BoundsSafety/CodeGen/count-dependent-assignment-checks/counted-to-counted-assignments-O2.c index e8554d34bd974..bc3f1304eac71 100644 --- a/clang/test/BoundsSafety/CodeGen/count-dependent-assignment-checks/counted-to-counted-assignments-O2.c +++ b/clang/test/BoundsSafety/CodeGen/count-dependent-assignment-checks/counted-to-counted-assignments-O2.c @@ -47,7 +47,7 @@ void TestPtrOK() { // CHECK: trap: // CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR5]], {{!annotation ![0-9]+}} // CHECK-NEXT: unreachable, {{!annotation ![0-9]+}} -// CHECK: cont57: +// CHECK: cont56: // CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 40, ptr nonnull [[ARR]]) #[[ATTR6]] // CHECK-NEXT: ret void // diff --git a/clang/test/BoundsSafety/CodeGen/flexible-array-member-promotion-call-builtin-O2.c b/clang/test/BoundsSafety/CodeGen/flexible-array-member-promotion-call-builtin-O2.c index e1c857061da1c..dcc9441e319bb 100644 --- a/clang/test/BoundsSafety/CodeGen/flexible-array-member-promotion-call-builtin-O2.c +++ b/clang/test/BoundsSafety/CodeGen/flexible-array-member-promotion-call-builtin-O2.c @@ -21,25 +21,25 @@ typedef struct { // CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[ELEMS]], i64 [[IDX_EXT]] // CHECK-NEXT: br label [[BOUNDSCHECK_CONT]] // CHECK: boundscheck.cont: -// CHECK-NEXT: [[AGG_TEMP2_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR]], [[BOUNDSCHECK_NOTNULL]] ], [ null, [[ENTRY:%.*]] ] +// CHECK-NEXT: [[AGG_TEMP1_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR]], [[BOUNDSCHECK_NOTNULL]] ], [ null, [[ENTRY:%.*]] ] // CHECK-NEXT: [[CONV:%.*]] = zext i32 [[SIZE:%.*]] to i64 -// CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ugt ptr [[FLEX]], [[AGG_TEMP2_SROA_3_0]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[AGG_TEMP2_SROA_3_0]] to i64, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ugt ptr [[FLEX]], [[AGG_TEMP1_SROA_3_0]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[AGG_TEMP1_SROA_3_0]] to i64, {{!annotation ![0-9]+}} // CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[FLEX]] to i64, {{!annotation ![0-9]+}} // CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[CMP68_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB]], [[CONV]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP_NOT]], [[CMP68_NOT]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP67_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB]], [[CONV]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP_NOT]], [[CMP67_NOT]], {{!annotation ![0-9]+}} // CHECK-NEXT: br i1 [[OR_COND]], label [[TRAP:%.*]], label [[CONT:%.*]], {{!annotation ![0-9]+}} // CHECK: trap: // CHECK-NEXT: tail call void @llvm.ubsantrap(i8 25) #[[ATTR4:[0-9]+]], {{!annotation ![0-9]+}} // CHECK-NEXT: unreachable, {{!annotation ![0-9]+}} // CHECK: cont: // CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr align 1 [[FLEX]], i8 0, i64 [[CONV]], i1 false) -// CHECK-NEXT: [[DOTNOT89:%.*]] = icmp ne ptr [[FLEX]], null, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[DOTNOT90:%.*]] = icmp eq i32 [[SIZE]], 0, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND91:%.*]] = and i1 [[DOTNOT89]], [[DOTNOT90]], {{!annotation ![0-9]+}} -// CHECK-NEXT: br i1 [[OR_COND91]], label [[TRAP]], label [[CONT88:%.*]], {{!annotation ![0-9]+}} -// CHECK: cont88: +// CHECK-NEXT: [[DOTNOT88:%.*]] = icmp ne ptr [[FLEX]], null, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[DOTNOT89:%.*]] = icmp eq i32 [[SIZE]], 0, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND90:%.*]] = and i1 [[DOTNOT88]], [[DOTNOT89]], {{!annotation ![0-9]+}} +// CHECK-NEXT: br i1 [[OR_COND90]], label [[TRAP]], label [[CONT87:%.*]], {{!annotation ![0-9]+}} +// CHECK: cont87: // CHECK-NEXT: ret ptr [[FLEX]] // void *set(flex_t *flex, unsigned size) { @@ -57,42 +57,42 @@ void *set(flex_t *flex, unsigned size) { // CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[ELEMS]], i64 [[IDX_EXT]] // CHECK-NEXT: br label [[BOUNDSCHECK_CONT]] // CHECK: boundscheck.cont: -// CHECK-NEXT: [[AGG_TEMP2_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR]], [[BOUNDSCHECK_NOTNULL]] ], [ null, [[ENTRY:%.*]] ] -// CHECK-NEXT: [[DOTNOT188:%.*]] = icmp eq ptr [[SRC:%.*]], null, {{!annotation ![0-9]+}} -// CHECK-NEXT: br i1 [[DOTNOT188]], label [[BOUNDSCHECK_CONT12:%.*]], label [[BOUNDSCHECK_NOTNULL5:%.*]], {{!annotation ![0-9]+}} -// CHECK: boundscheck.notnull5: -// CHECK-NEXT: [[ELEMS6:%.*]] = getelementptr inbounds nuw i8, ptr [[SRC]], i64 4 +// CHECK-NEXT: [[AGG_TEMP1_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR]], [[BOUNDSCHECK_NOTNULL]] ], [ null, [[ENTRY:%.*]] ] +// CHECK-NEXT: [[DOTNOT187:%.*]] = icmp eq ptr [[SRC:%.*]], null, {{!annotation ![0-9]+}} +// CHECK-NEXT: br i1 [[DOTNOT187]], label [[BOUNDSCHECK_CONT11:%.*]], label [[BOUNDSCHECK_NOTNULL4:%.*]], {{!annotation ![0-9]+}} +// CHECK: boundscheck.notnull4: +// CHECK-NEXT: [[ELEMS5:%.*]] = getelementptr inbounds nuw i8, ptr [[SRC]], i64 4 // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[SRC]], align 4, {{!tbaa ![0-9]+}} -// CHECK-NEXT: [[IDX_EXT9:%.*]] = sext i32 [[TMP1]] to i64 -// CHECK-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i32, ptr [[ELEMS6]], i64 [[IDX_EXT9]] -// CHECK-NEXT: br label [[BOUNDSCHECK_CONT12]] -// CHECK: boundscheck.cont12: -// CHECK-NEXT: [[AGG_TEMP4_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR10]], [[BOUNDSCHECK_NOTNULL5]] ], [ null, [[BOUNDSCHECK_CONT]] ] +// CHECK-NEXT: [[IDX_EXT8:%.*]] = sext i32 [[TMP1]] to i64 +// CHECK-NEXT: [[ADD_PTR9:%.*]] = getelementptr inbounds i32, ptr [[ELEMS5]], i64 [[IDX_EXT8]] +// CHECK-NEXT: br label [[BOUNDSCHECK_CONT11]] +// CHECK: boundscheck.cont11: +// CHECK-NEXT: [[AGG_TEMP3_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR9]], [[BOUNDSCHECK_NOTNULL4]] ], [ null, [[BOUNDSCHECK_CONT]] ] // CHECK-NEXT: [[CONV:%.*]] = zext i32 [[SIZE:%.*]] to i64 -// CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ugt ptr [[SRC]], [[AGG_TEMP4_SROA_3_0]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[AGG_TEMP4_SROA_3_0]] to i64, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ugt ptr [[SRC]], [[AGG_TEMP3_SROA_3_0]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[AGG_TEMP3_SROA_3_0]] to i64, {{!annotation ![0-9]+}} // CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[SRC]] to i64, {{!annotation ![0-9]+}} // CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[CMP84_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB]], [[CONV]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP_NOT]], [[CMP84_NOT]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[CMP102_NOT:%.*]] = icmp ugt ptr [[DEST]], [[AGG_TEMP2_SROA_3_0]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND191:%.*]] = select i1 [[OR_COND]], i1 true, i1 [[CMP102_NOT]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[SUB_PTR_LHS_CAST154:%.*]] = ptrtoint ptr [[AGG_TEMP2_SROA_3_0]] to i64, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[SUB_PTR_RHS_CAST155:%.*]] = ptrtoint ptr [[DEST]] to i64, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[SUB_PTR_SUB156:%.*]] = sub i64 [[SUB_PTR_LHS_CAST154]], [[SUB_PTR_RHS_CAST155]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[CMP157_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB156]], [[CONV]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND192:%.*]] = select i1 [[OR_COND191]], i1 true, i1 [[CMP157_NOT]], {{!annotation ![0-9]+}} -// CHECK-NEXT: br i1 [[OR_COND192]], label [[TRAP:%.*]], label [[CONT160:%.*]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP83_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB]], [[CONV]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP_NOT]], [[CMP83_NOT]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP101_NOT:%.*]] = icmp ugt ptr [[DEST]], [[AGG_TEMP1_SROA_3_0]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND190:%.*]] = select i1 [[OR_COND]], i1 true, i1 [[CMP101_NOT]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[SUB_PTR_LHS_CAST153:%.*]] = ptrtoint ptr [[AGG_TEMP1_SROA_3_0]] to i64, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[SUB_PTR_RHS_CAST154:%.*]] = ptrtoint ptr [[DEST]] to i64, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[SUB_PTR_SUB155:%.*]] = sub i64 [[SUB_PTR_LHS_CAST153]], [[SUB_PTR_RHS_CAST154]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP156_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB155]], [[CONV]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND191:%.*]] = select i1 [[OR_COND190]], i1 true, i1 [[CMP156_NOT]], {{!annotation ![0-9]+}} +// CHECK-NEXT: br i1 [[OR_COND191]], label [[TRAP:%.*]], label [[CONT159:%.*]], {{!annotation ![0-9]+}} // CHECK: trap: // CHECK-NEXT: tail call void @llvm.ubsantrap(i8 25) #[[ATTR4]], {{!annotation ![0-9]+}} // CHECK-NEXT: unreachable, {{!annotation ![0-9]+}} -// CHECK: cont160: +// CHECK: cont159: // CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[DEST]], ptr align 1 [[SRC]], i64 [[CONV]], i1 false) -// CHECK-NEXT: [[DOTNOT189:%.*]] = icmp ne ptr [[DEST]], null, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[DOTNOT190:%.*]] = icmp eq i32 [[SIZE]], 0, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND193:%.*]] = and i1 [[DOTNOT189]], [[DOTNOT190]], {{!annotation ![0-9]+}} -// CHECK-NEXT: br i1 [[OR_COND193]], label [[TRAP]], label [[CONT186:%.*]], {{!annotation ![0-9]+}} -// CHECK: cont186: +// CHECK-NEXT: [[DOTNOT188:%.*]] = icmp ne ptr [[DEST]], null, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[DOTNOT189:%.*]] = icmp eq i32 [[SIZE]], 0, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND192:%.*]] = and i1 [[DOTNOT188]], [[DOTNOT189]], {{!annotation ![0-9]+}} +// CHECK-NEXT: br i1 [[OR_COND192]], label [[TRAP]], label [[CONT185:%.*]], {{!annotation ![0-9]+}} +// CHECK: cont185: // CHECK-NEXT: ret ptr [[DEST]] // void *cpy(flex_t *dest, const flex_t *src, unsigned size) { @@ -159,42 +159,42 @@ void *__unsafe_indexable pcpy(flex_t *dest, const flex_t *src, unsigned size) { // CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[ELEMS]], i64 [[IDX_EXT]] // CHECK-NEXT: br label [[BOUNDSCHECK_CONT]] // CHECK: boundscheck.cont: -// CHECK-NEXT: [[AGG_TEMP2_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR]], [[BOUNDSCHECK_NOTNULL]] ], [ null, [[ENTRY:%.*]] ] -// CHECK-NEXT: [[DOTNOT188:%.*]] = icmp eq ptr [[SRC:%.*]], null, {{!annotation ![0-9]+}} -// CHECK-NEXT: br i1 [[DOTNOT188]], label [[BOUNDSCHECK_CONT12:%.*]], label [[BOUNDSCHECK_NOTNULL5:%.*]], {{!annotation ![0-9]+}} -// CHECK: boundscheck.notnull5: -// CHECK-NEXT: [[ELEMS6:%.*]] = getelementptr inbounds nuw i8, ptr [[SRC]], i64 4 +// CHECK-NEXT: [[AGG_TEMP1_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR]], [[BOUNDSCHECK_NOTNULL]] ], [ null, [[ENTRY:%.*]] ] +// CHECK-NEXT: [[DOTNOT187:%.*]] = icmp eq ptr [[SRC:%.*]], null, {{!annotation ![0-9]+}} +// CHECK-NEXT: br i1 [[DOTNOT187]], label [[BOUNDSCHECK_CONT11:%.*]], label [[BOUNDSCHECK_NOTNULL4:%.*]], {{!annotation ![0-9]+}} +// CHECK: boundscheck.notnull4: +// CHECK-NEXT: [[ELEMS5:%.*]] = getelementptr inbounds nuw i8, ptr [[SRC]], i64 4 // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[SRC]], align 4, {{!tbaa ![0-9]+}} -// CHECK-NEXT: [[IDX_EXT9:%.*]] = sext i32 [[TMP1]] to i64 -// CHECK-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i32, ptr [[ELEMS6]], i64 [[IDX_EXT9]] -// CHECK-NEXT: br label [[BOUNDSCHECK_CONT12]] -// CHECK: boundscheck.cont12: -// CHECK-NEXT: [[AGG_TEMP4_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR10]], [[BOUNDSCHECK_NOTNULL5]] ], [ null, [[BOUNDSCHECK_CONT]] ] +// CHECK-NEXT: [[IDX_EXT8:%.*]] = sext i32 [[TMP1]] to i64 +// CHECK-NEXT: [[ADD_PTR9:%.*]] = getelementptr inbounds i32, ptr [[ELEMS5]], i64 [[IDX_EXT8]] +// CHECK-NEXT: br label [[BOUNDSCHECK_CONT11]] +// CHECK: boundscheck.cont11: +// CHECK-NEXT: [[AGG_TEMP3_SROA_3_0:%.*]] = phi ptr [ [[ADD_PTR9]], [[BOUNDSCHECK_NOTNULL4]] ], [ null, [[BOUNDSCHECK_CONT]] ] // CHECK-NEXT: [[CONV:%.*]] = zext i32 [[SIZE:%.*]] to i64 -// CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ugt ptr [[SRC]], [[AGG_TEMP4_SROA_3_0]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[AGG_TEMP4_SROA_3_0]] to i64, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ugt ptr [[SRC]], [[AGG_TEMP3_SROA_3_0]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[AGG_TEMP3_SROA_3_0]] to i64, {{!annotation ![0-9]+}} // CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[SRC]] to i64, {{!annotation ![0-9]+}} // CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[CMP84_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB]], [[CONV]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP_NOT]], [[CMP84_NOT]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[CMP102_NOT:%.*]] = icmp ugt ptr [[DEST]], [[AGG_TEMP2_SROA_3_0]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND191:%.*]] = select i1 [[OR_COND]], i1 true, i1 [[CMP102_NOT]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[SUB_PTR_LHS_CAST154:%.*]] = ptrtoint ptr [[AGG_TEMP2_SROA_3_0]] to i64, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[SUB_PTR_RHS_CAST155:%.*]] = ptrtoint ptr [[DEST]] to i64, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[SUB_PTR_SUB156:%.*]] = sub i64 [[SUB_PTR_LHS_CAST154]], [[SUB_PTR_RHS_CAST155]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[CMP157_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB156]], [[CONV]], {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND192:%.*]] = select i1 [[OR_COND191]], i1 true, i1 [[CMP157_NOT]], {{!annotation ![0-9]+}} -// CHECK-NEXT: br i1 [[OR_COND192]], label [[TRAP:%.*]], label [[CONT160:%.*]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP83_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB]], [[CONV]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP_NOT]], [[CMP83_NOT]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP101_NOT:%.*]] = icmp ugt ptr [[DEST]], [[AGG_TEMP1_SROA_3_0]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND190:%.*]] = select i1 [[OR_COND]], i1 true, i1 [[CMP101_NOT]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[SUB_PTR_LHS_CAST153:%.*]] = ptrtoint ptr [[AGG_TEMP1_SROA_3_0]] to i64, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[SUB_PTR_RHS_CAST154:%.*]] = ptrtoint ptr [[DEST]] to i64, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[SUB_PTR_SUB155:%.*]] = sub i64 [[SUB_PTR_LHS_CAST153]], [[SUB_PTR_RHS_CAST154]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[CMP156_NOT:%.*]] = icmp ult i64 [[SUB_PTR_SUB155]], [[CONV]], {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND191:%.*]] = select i1 [[OR_COND190]], i1 true, i1 [[CMP156_NOT]], {{!annotation ![0-9]+}} +// CHECK-NEXT: br i1 [[OR_COND191]], label [[TRAP:%.*]], label [[CONT159:%.*]], {{!annotation ![0-9]+}} // CHECK: trap: // CHECK-NEXT: tail call void @llvm.ubsantrap(i8 25) #[[ATTR4]], {{!annotation ![0-9]+}} // CHECK-NEXT: unreachable, {{!annotation ![0-9]+}} -// CHECK: cont160: +// CHECK: cont159: // CHECK-NEXT: tail call void @llvm.memmove.p0.p0.i64(ptr align 1 [[DEST]], ptr align 1 [[SRC]], i64 [[CONV]], i1 false) -// CHECK-NEXT: [[DOTNOT189:%.*]] = icmp ne ptr [[DEST]], null, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[DOTNOT190:%.*]] = icmp eq i32 [[SIZE]], 0, {{!annotation ![0-9]+}} -// CHECK-NEXT: [[OR_COND193:%.*]] = and i1 [[DOTNOT189]], [[DOTNOT190]], {{!annotation ![0-9]+}} -// CHECK-NEXT: br i1 [[OR_COND193]], label [[TRAP]], label [[CONT186:%.*]], {{!annotation ![0-9]+}} -// CHECK: cont186: +// CHECK-NEXT: [[DOTNOT188:%.*]] = icmp ne ptr [[DEST]], null, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[DOTNOT189:%.*]] = icmp eq i32 [[SIZE]], 0, {{!annotation ![0-9]+}} +// CHECK-NEXT: [[OR_COND192:%.*]] = and i1 [[DOTNOT188]], [[DOTNOT189]], {{!annotation ![0-9]+}} +// CHECK-NEXT: br i1 [[OR_COND192]], label [[TRAP]], label [[CONT185:%.*]], {{!annotation ![0-9]+}} +// CHECK: cont185: // CHECK-NEXT: ret ptr [[DEST]] // void *move(flex_t *dest, const flex_t *src, unsigned size) { diff --git a/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member-O2.c b/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member-O2.c new file mode 100644 index 0000000000000..e0b539e28961c --- /dev/null +++ b/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member-O2.c @@ -0,0 +1,43 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 + +// RUN: %clang_cc1 -O2 -fbounds-safety -triple arm64e-apple-ios -emit-llvm %s -o - | FileCheck %s + +#include +typedef struct { + int count; + char arr[__counted_by(count)]; +} flex_t; + +typedef struct { + flex_t f; +} outer_flex_t; + +void use(void *__unsafe_indexable); + +// CHECK-LABEL: define void @process_frame( +// CHECK-SAME: ptr noundef [[FRAME:%.*]], i32 noundef [[FRAME_SIZE:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[IDX_EXT:%.*]] = zext i32 [[FRAME_SIZE]] to i64 +// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[FRAME]], i64 [[IDX_EXT]] +// CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[FRAME]], i64 4 +// CHECK-NEXT: [[DOTNOT:%.*]] = icmp ugt ptr [[TMP0]], [[ADD_PTR]], !annotation [[META2:![0-9]+]] +// CHECK-NEXT: br i1 [[DOTNOT]], label %[[TRAP:.*]], label %[[CONT10:.*]], !annotation [[META2]] +// CHECK: [[TRAP]]: +// CHECK-NEXT: tail call void @llvm.ubsantrap(i8 25) #[[ATTR3:[0-9]+]], !annotation [[META3:![0-9]+]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT10]]: +// CHECK-NEXT: tail call void @use(ptr noundef [[FRAME]]) #[[ATTR4:[0-9]+]] +// CHECK-NEXT: tail call void @use(ptr noundef [[TMP0]]) #[[ATTR4]] +// CHECK-NEXT: tail call void @use(ptr noundef [[TMP0]]) #[[ATTR4]] +// CHECK-NEXT: ret void +// +void process_frame(char *__counted_by(frame_size) frame, unsigned frame_size) { + outer_flex_t *of = (outer_flex_t *) frame; + use(&of->f); + use(of->f.arr); + use(&of->f.arr[0]); +} +//. +// CHECK: [[META2]] = !{!"bounds-safety-check-ptr-lt-upper-bound"} +// CHECK: [[META3]] = !{!"bounds-safety-check-ptr-lt-upper-bound", !"bounds-safety-check-ptr-ge-lower-bound"} +//. diff --git a/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member-nested-len-O2.c b/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member-nested-len-O2.c new file mode 100644 index 0000000000000..fa27ab6a99e51 --- /dev/null +++ b/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member-nested-len-O2.c @@ -0,0 +1,48 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 + +// RUN: %clang_cc1 -O2 -fbounds-safety -triple arm64e-apple-ios -emit-llvm %s -o - | FileCheck %s + +#include + +typedef struct { + int count; +} header_t; + +typedef struct { + header_t header; + char arr[__counted_by(header.count)]; +} flex_t; + +typedef struct { + flex_t f; +} outer_flex_t; + +void use(void *__unsafe_indexable); + +// CHECK-LABEL: define void @process_frame( +// CHECK-SAME: ptr noundef [[FRAME:%.*]], i32 noundef [[FRAME_SIZE:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[IDX_EXT:%.*]] = zext i32 [[FRAME_SIZE]] to i64 +// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[FRAME]], i64 [[IDX_EXT]] +// CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[FRAME]], i64 4 +// CHECK-NEXT: [[DOTNOT:%.*]] = icmp ugt ptr [[TMP0]], [[ADD_PTR]], !annotation [[META2:![0-9]+]] +// CHECK-NEXT: br i1 [[DOTNOT]], label %[[TRAP:.*]], label %[[CONT10:.*]], !annotation [[META2]] +// CHECK: [[TRAP]]: +// CHECK-NEXT: tail call void @llvm.ubsantrap(i8 25) #[[ATTR3:[0-9]+]], !annotation [[META3:![0-9]+]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT10]]: +// CHECK-NEXT: tail call void @use(ptr noundef [[FRAME]]) #[[ATTR4:[0-9]+]] +// CHECK-NEXT: tail call void @use(ptr noundef [[TMP0]]) #[[ATTR4]] +// CHECK-NEXT: tail call void @use(ptr noundef [[TMP0]]) #[[ATTR4]] +// CHECK-NEXT: ret void +// +void process_frame(char *__counted_by(frame_size) frame, unsigned frame_size) { + outer_flex_t *of = (outer_flex_t *) frame; + use(&of->f); + use(of->f.arr); + use(&of->f.arr[0]); +} +//. +// CHECK: [[META2]] = !{!"bounds-safety-check-ptr-lt-upper-bound"} +// CHECK: [[META3]] = !{!"bounds-safety-check-ptr-lt-upper-bound", !"bounds-safety-check-ptr-ge-lower-bound"} +//. diff --git a/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member-nested-len.c b/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member-nested-len.c new file mode 100644 index 0000000000000..920e3c0f30043 --- /dev/null +++ b/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member-nested-len.c @@ -0,0 +1,276 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 + +// RUN: %clang_cc1 -O0 -fbounds-safety -triple arm64e-apple-ios -emit-llvm %s -o - | FileCheck %s + +#include + +typedef struct { + int count; +} header_t; + +typedef struct { + header_t header; + char arr[__counted_by(header.count)]; +} flex_t; + +typedef struct { + flex_t f; +} outer_flex_t; + +void use(void *__unsafe_indexable); + +// CHECK-LABEL: define void @process_frame( +// CHECK-SAME: ptr noundef [[FRAME:%.*]], i32 noundef [[FRAME_SIZE:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[FRAME_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[FRAME_SIZE_ADDR:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[OF:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK-NEXT: [[AGG_TEMP3:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP26:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP27:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP28:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP42:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK-NEXT: [[AGG_TEMP65:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP66:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[TMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP67:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP81:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK-NEXT: store ptr [[FRAME]], ptr [[FRAME_ADDR]], align 8 +// CHECK-NEXT: store i32 [[FRAME_SIZE]], ptr [[FRAME_SIZE_ADDR]], align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[FRAME_ADDR]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[FRAME_SIZE_ADDR]], align 4 +// CHECK-NEXT: [[IDX_EXT:%.*]] = zext i32 [[TMP1]] to i64 +// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 [[IDX_EXT]] +// CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[TMP2]], align 8 +// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[ADD_PTR]], ptr [[TMP3]], align 8 +// CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR]], align 8 +// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[OF]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR]], ptr [[TMP5]], align 8 +// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[OF]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB]], ptr [[TMP6]], align 8 +// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[OF]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[WIDE_PTR_LB]], ptr [[TMP7]], align 8 +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP3]], ptr align 8 [[OF]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP3]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR5:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR4]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP3]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB7:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR6]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP3]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB9:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR8]], align 8 +// CHECK-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_OUTER_FLEX_T:%.*]], ptr [[WIDE_PTR_PTR5]], i64 1 +// CHECK-NEXT: [[TMP9:%.*]] = icmp ule ptr [[TMP8]], [[WIDE_PTR_UB7]], !annotation [[META2:![0-9]+]] +// CHECK-NEXT: br i1 [[TMP9]], label %[[CONT:.*]], label %[[TRAP:.*]], !annotation [[META2]] +// CHECK: [[TRAP]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4:[0-9]+]], !annotation [[META2]] +// CHECK-NEXT: unreachable, !annotation [[META2]] +// CHECK: [[CONT]]: +// CHECK-NEXT: [[TMP10:%.*]] = icmp ule ptr [[WIDE_PTR_LB9]], [[WIDE_PTR_PTR5]], !annotation [[META3:![0-9]+]] +// CHECK-NEXT: br i1 [[TMP10]], label %[[CONT11:.*]], label %[[TRAP10:.*]], !annotation [[META3]] +// CHECK: [[TRAP10]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META3]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT11]]: +// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR5]], i32 0, i32 0 +// CHECK-NEXT: [[ARR:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T:%.*]], ptr [[F]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR]], i64 0, i64 0 +// CHECK-NEXT: [[HEADER:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F]], i32 0, i32 0 +// CHECK-NEXT: [[COUNT:%.*]] = getelementptr inbounds nuw [[STRUCT_HEADER_T:%.*]], ptr [[HEADER]], i32 0, i32 0 +// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[COUNT]], align 4 +// CHECK-NEXT: [[IDX_EXT12:%.*]] = sext i32 [[TMP11]] to i64 +// CHECK-NEXT: [[ADD_PTR13:%.*]] = getelementptr inbounds i8, ptr [[ARRAYDECAY]], i64 [[IDX_EXT12]] +// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[F]], ptr [[TMP12]], align 8 +// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[ADD_PTR13]], ptr [[TMP13]], align 8 +// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[F]], ptr [[TMP14]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR15:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR14]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB17:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR16]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB19:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR18]], align 8 +// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR15]], ptr [[TMP15]], align 8 +// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB17]], ptr [[TMP16]], align 8 +// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[WIDE_PTR_LB19]], ptr [[TMP17]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR21:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR20]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB23:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR22]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB25:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR24]], align 8 +// CHECK-NEXT: call void @use(ptr noundef [[WIDE_PTR_PTR21]]) +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP28]], ptr align 8 [[OF]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP28]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR30:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR29]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP28]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB32:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR31]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP28]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB34:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR33]], align 8 +// CHECK-NEXT: [[TMP18:%.*]] = getelementptr [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR30]], i64 1 +// CHECK-NEXT: [[TMP19:%.*]] = icmp ule ptr [[TMP18]], [[WIDE_PTR_UB32]], !annotation [[META2]] +// CHECK-NEXT: br i1 [[TMP19]], label %[[CONT36:.*]], label %[[TRAP35:.*]], !annotation [[META2]] +// CHECK: [[TRAP35]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META2]] +// CHECK-NEXT: unreachable, !annotation [[META2]] +// CHECK: [[CONT36]]: +// CHECK-NEXT: [[TMP20:%.*]] = icmp ule ptr [[WIDE_PTR_LB34]], [[WIDE_PTR_PTR30]], !annotation [[META3]] +// CHECK-NEXT: br i1 [[TMP20]], label %[[CONT38:.*]], label %[[TRAP37:.*]], !annotation [[META3]] +// CHECK: [[TRAP37]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META3]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT38]]: +// CHECK-NEXT: [[F39:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR30]], i32 0, i32 0 +// CHECK-NEXT: [[ARR40:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F39]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY41:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR40]], i64 0, i64 0 +// CHECK-NEXT: [[ARR43:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F39]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY44:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR43]], i64 0, i64 0 +// CHECK-NEXT: [[HEADER45:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F39]], i32 0, i32 0 +// CHECK-NEXT: [[COUNT46:%.*]] = getelementptr inbounds nuw [[STRUCT_HEADER_T]], ptr [[HEADER45]], i32 0, i32 0 +// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[COUNT46]], align 4 +// CHECK-NEXT: [[IDX_EXT47:%.*]] = sext i32 [[TMP21]] to i64 +// CHECK-NEXT: [[ADD_PTR48:%.*]] = getelementptr inbounds i8, ptr [[ARRAYDECAY44]], i64 [[IDX_EXT47]] +// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[F39]], ptr [[TMP22]], align 8 +// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[ADD_PTR48]], ptr [[TMP23]], align 8 +// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[F39]], ptr [[TMP24]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR49:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB50:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR49]], align 8 +// CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB50]], ptr [[TMP25]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR51:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR52:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR51]], align 8 +// CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[ARRAYDECAY41]], ptr [[TMP26]], align 8 +// CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR52]], ptr [[TMP27]], align 8 +// CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[ARRAYDECAY41]], ptr [[TMP28]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR53:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR54:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR53]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR55:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB56:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR55]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR57:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB58:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR57]], align 8 +// CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR54]], ptr [[TMP29]], align 8 +// CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB56]], ptr [[TMP30]], align 8 +// CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[WIDE_PTR_LB58]], ptr [[TMP31]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR59:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR60:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR59]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR61:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB62:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR61]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR63:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB64:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR63]], align 8 +// CHECK-NEXT: call void @use(ptr noundef [[WIDE_PTR_PTR60]]) +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP67]], ptr align 8 [[OF]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR68:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP67]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR69:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR68]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR70:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP67]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB71:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR70]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR72:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP67]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB73:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR72]], align 8 +// CHECK-NEXT: [[TMP32:%.*]] = getelementptr [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR69]], i64 1 +// CHECK-NEXT: [[TMP33:%.*]] = icmp ule ptr [[TMP32]], [[WIDE_PTR_UB71]], !annotation [[META2]] +// CHECK-NEXT: br i1 [[TMP33]], label %[[CONT75:.*]], label %[[TRAP74:.*]], !annotation [[META2]] +// CHECK: [[TRAP74]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META2]] +// CHECK-NEXT: unreachable, !annotation [[META2]] +// CHECK: [[CONT75]]: +// CHECK-NEXT: [[TMP34:%.*]] = icmp ule ptr [[WIDE_PTR_LB73]], [[WIDE_PTR_PTR69]], !annotation [[META3]] +// CHECK-NEXT: br i1 [[TMP34]], label %[[CONT77:.*]], label %[[TRAP76:.*]], !annotation [[META3]] +// CHECK: [[TRAP76]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META3]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT77]]: +// CHECK-NEXT: [[F78:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR69]], i32 0, i32 0 +// CHECK-NEXT: [[ARR79:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F78]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY80:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR79]], i64 0, i64 0 +// CHECK-NEXT: [[ARR82:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F78]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY83:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR82]], i64 0, i64 0 +// CHECK-NEXT: [[HEADER84:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F78]], i32 0, i32 0 +// CHECK-NEXT: [[COUNT85:%.*]] = getelementptr inbounds nuw [[STRUCT_HEADER_T]], ptr [[HEADER84]], i32 0, i32 0 +// CHECK-NEXT: [[TMP35:%.*]] = load i32, ptr [[COUNT85]], align 4 +// CHECK-NEXT: [[IDX_EXT86:%.*]] = sext i32 [[TMP35]] to i64 +// CHECK-NEXT: [[ADD_PTR87:%.*]] = getelementptr inbounds i8, ptr [[ARRAYDECAY83]], i64 [[IDX_EXT86]] +// CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP81]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[F78]], ptr [[TMP36]], align 8 +// CHECK-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP81]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[ADD_PTR87]], ptr [[TMP37]], align 8 +// CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP81]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[F78]], ptr [[TMP38]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR88:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP81]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB89:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR88]], align 8 +// CHECK-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP81]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB89]], ptr [[TMP39]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR90:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP81]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR91:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR90]], align 8 +// CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[ARRAYDECAY80]], ptr [[TMP40]], align 8 +// CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR91]], ptr [[TMP41]], align 8 +// CHECK-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[ARRAYDECAY80]], ptr [[TMP42]], align 8 +// CHECK-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 0 +// CHECK-NEXT: [[TMP44:%.*]] = load ptr, ptr [[TMP43]], align 8 +// CHECK-NEXT: [[BOUND_PTR_ARITH:%.*]] = getelementptr i8, ptr [[TMP44]], i64 0 +// CHECK-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP66]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[BOUND_PTR_ARITH]], ptr [[TMP45]], align 8 +// CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 1 +// CHECK-NEXT: [[TMP47:%.*]] = load ptr, ptr [[TMP46]], align 8 +// CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP66]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[TMP47]], ptr [[TMP48]], align 8 +// CHECK-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 2 +// CHECK-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP49]], align 8 +// CHECK-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP66]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[TMP50]], ptr [[TMP51]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR92:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP66]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR93:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR92]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR94:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP66]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB95:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR94]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR96:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP66]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB97:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR96]], align 8 +// CHECK-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP65]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR93]], ptr [[TMP52]], align 8 +// CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP65]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB95]], ptr [[TMP53]], align 8 +// CHECK-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP65]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[WIDE_PTR_LB97]], ptr [[TMP54]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR98:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP65]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR99:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR98]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR100:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP65]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB101:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR100]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR102:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP65]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB103:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR102]], align 8 +// CHECK-NEXT: call void @use(ptr noundef [[WIDE_PTR_PTR99]]) +// CHECK-NEXT: ret void +// +void process_frame(char *__counted_by(frame_size) frame, unsigned frame_size) { + outer_flex_t *of = (outer_flex_t *) frame; + use(&of->f); + use(of->f.arr); + use(&of->f.arr[0]); +} +//. +// CHECK: [[META2]] = !{!"bounds-safety-check-ptr-lt-upper-bound"} +// CHECK: [[META3]] = !{!"bounds-safety-check-ptr-ge-lower-bound"} +//. diff --git a/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member.c b/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member.c new file mode 100644 index 0000000000000..80eeb6b0b440a --- /dev/null +++ b/clang/test/BoundsSafety/CodeGen/nested-flexible-array-member.c @@ -0,0 +1,268 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 + +// RUN: %clang_cc1 -O0 -fbounds-safety -triple arm64e-apple-ios -emit-llvm %s -o - | FileCheck %s + +#include +typedef struct { + int count; + char arr[__counted_by(count)]; +} flex_t; + +typedef struct { + flex_t f; +} outer_flex_t; + +void use(void *__unsafe_indexable); + +// CHECK-LABEL: define void @process_frame( +// CHECK-SAME: ptr noundef [[FRAME:%.*]], i32 noundef [[FRAME_SIZE:%.*]]) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[FRAME_ADDR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: [[FRAME_SIZE_ADDR:%.*]] = alloca i32, align 4 +// CHECK-NEXT: [[OF:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP1:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP2:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK-NEXT: [[AGG_TEMP3:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP26:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP27:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP28:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP42:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK-NEXT: [[AGG_TEMP64:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.1", align 8 +// CHECK-NEXT: [[AGG_TEMP65:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[TMP:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.0", align 8 +// CHECK-NEXT: [[AGG_TEMP66:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable", align 8 +// CHECK-NEXT: [[AGG_TEMP80:%.*]] = alloca %"__bounds_safety::wide_ptr.bidi_indexable.2", align 8 +// CHECK-NEXT: store ptr [[FRAME]], ptr [[FRAME_ADDR]], align 8 +// CHECK-NEXT: store i32 [[FRAME_SIZE]], ptr [[FRAME_SIZE_ADDR]], align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[FRAME_ADDR]], align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[FRAME_SIZE_ADDR]], align 4 +// CHECK-NEXT: [[IDX_EXT:%.*]] = zext i32 [[TMP1]] to i64 +// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 [[IDX_EXT]] +// CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[TMP2]], align 8 +// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[ADD_PTR]], ptr [[TMP3]], align 8 +// CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR]], align 8 +// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[OF]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR]], ptr [[TMP5]], align 8 +// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[OF]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB]], ptr [[TMP6]], align 8 +// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[OF]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[WIDE_PTR_LB]], ptr [[TMP7]], align 8 +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP3]], ptr align 8 [[OF]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR4:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP3]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR5:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR4]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR6:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP3]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB7:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR6]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR8:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP3]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB9:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR8]], align 8 +// CHECK-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_OUTER_FLEX_T:%.*]], ptr [[WIDE_PTR_PTR5]], i64 1 +// CHECK-NEXT: [[TMP9:%.*]] = icmp ule ptr [[TMP8]], [[WIDE_PTR_UB7]], !annotation [[META2:![0-9]+]] +// CHECK-NEXT: br i1 [[TMP9]], label %[[CONT:.*]], label %[[TRAP:.*]], !annotation [[META2]] +// CHECK: [[TRAP]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4:[0-9]+]], !annotation [[META2]] +// CHECK-NEXT: unreachable, !annotation [[META2]] +// CHECK: [[CONT]]: +// CHECK-NEXT: [[TMP10:%.*]] = icmp ule ptr [[WIDE_PTR_LB9]], [[WIDE_PTR_PTR5]], !annotation [[META3:![0-9]+]] +// CHECK-NEXT: br i1 [[TMP10]], label %[[CONT11:.*]], label %[[TRAP10:.*]], !annotation [[META3]] +// CHECK: [[TRAP10]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META3]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT11]]: +// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR5]], i32 0, i32 0 +// CHECK-NEXT: [[ARR:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T:%.*]], ptr [[F]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR]], i64 0, i64 0 +// CHECK-NEXT: [[COUNT:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F]], i32 0, i32 0 +// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[COUNT]], align 4 +// CHECK-NEXT: [[IDX_EXT12:%.*]] = sext i32 [[TMP11]] to i64 +// CHECK-NEXT: [[ADD_PTR13:%.*]] = getelementptr inbounds i8, ptr [[ARRAYDECAY]], i64 [[IDX_EXT12]] +// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[F]], ptr [[TMP12]], align 8 +// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[ADD_PTR13]], ptr [[TMP13]], align 8 +// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[F]], ptr [[TMP14]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR14:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR15:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR14]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB17:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR16]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR18:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP2]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB19:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR18]], align 8 +// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR15]], ptr [[TMP15]], align 8 +// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB17]], ptr [[TMP16]], align 8 +// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[WIDE_PTR_LB19]], ptr [[TMP17]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR20:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR21:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR20]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB23:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR22]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP1]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB25:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR24]], align 8 +// CHECK-NEXT: call void @use(ptr noundef [[WIDE_PTR_PTR21]]) +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP28]], ptr align 8 [[OF]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP28]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR30:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR29]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP28]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB32:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR31]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR33:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP28]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB34:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR33]], align 8 +// CHECK-NEXT: [[TMP18:%.*]] = getelementptr [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR30]], i64 1 +// CHECK-NEXT: [[TMP19:%.*]] = icmp ule ptr [[TMP18]], [[WIDE_PTR_UB32]], !annotation [[META2]] +// CHECK-NEXT: br i1 [[TMP19]], label %[[CONT36:.*]], label %[[TRAP35:.*]], !annotation [[META2]] +// CHECK: [[TRAP35]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META2]] +// CHECK-NEXT: unreachable, !annotation [[META2]] +// CHECK: [[CONT36]]: +// CHECK-NEXT: [[TMP20:%.*]] = icmp ule ptr [[WIDE_PTR_LB34]], [[WIDE_PTR_PTR30]], !annotation [[META3]] +// CHECK-NEXT: br i1 [[TMP20]], label %[[CONT38:.*]], label %[[TRAP37:.*]], !annotation [[META3]] +// CHECK: [[TRAP37]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META3]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT38]]: +// CHECK-NEXT: [[F39:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR30]], i32 0, i32 0 +// CHECK-NEXT: [[ARR40:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F39]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY41:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR40]], i64 0, i64 0 +// CHECK-NEXT: [[ARR43:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F39]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY44:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR43]], i64 0, i64 0 +// CHECK-NEXT: [[COUNT45:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F39]], i32 0, i32 0 +// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[COUNT45]], align 4 +// CHECK-NEXT: [[IDX_EXT46:%.*]] = sext i32 [[TMP21]] to i64 +// CHECK-NEXT: [[ADD_PTR47:%.*]] = getelementptr inbounds i8, ptr [[ARRAYDECAY44]], i64 [[IDX_EXT46]] +// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[F39]], ptr [[TMP22]], align 8 +// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[ADD_PTR47]], ptr [[TMP23]], align 8 +// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[F39]], ptr [[TMP24]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR48:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB49:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR48]], align 8 +// CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB49]], ptr [[TMP25]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR50:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP42]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR51:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR50]], align 8 +// CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[ARRAYDECAY41]], ptr [[TMP26]], align 8 +// CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR51]], ptr [[TMP27]], align 8 +// CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[ARRAYDECAY41]], ptr [[TMP28]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR52:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR53:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR52]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR54:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB55:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR54]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR56:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP27]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB57:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR56]], align 8 +// CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR53]], ptr [[TMP29]], align 8 +// CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB55]], ptr [[TMP30]], align 8 +// CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[WIDE_PTR_LB57]], ptr [[TMP31]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR58:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR59:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR58]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR60:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB61:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR60]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR62:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP26]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB63:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR62]], align 8 +// CHECK-NEXT: call void @use(ptr noundef [[WIDE_PTR_PTR59]]) +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TEMP66]], ptr align 8 [[OF]], i64 24, i1 false) +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR67:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR68:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR67]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR69:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB70:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR69]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR71:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable", ptr [[AGG_TEMP66]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB72:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR71]], align 8 +// CHECK-NEXT: [[TMP32:%.*]] = getelementptr [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR68]], i64 1 +// CHECK-NEXT: [[TMP33:%.*]] = icmp ule ptr [[TMP32]], [[WIDE_PTR_UB70]], !annotation [[META2]] +// CHECK-NEXT: br i1 [[TMP33]], label %[[CONT74:.*]], label %[[TRAP73:.*]], !annotation [[META2]] +// CHECK: [[TRAP73]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META2]] +// CHECK-NEXT: unreachable, !annotation [[META2]] +// CHECK: [[CONT74]]: +// CHECK-NEXT: [[TMP34:%.*]] = icmp ule ptr [[WIDE_PTR_LB72]], [[WIDE_PTR_PTR68]], !annotation [[META3]] +// CHECK-NEXT: br i1 [[TMP34]], label %[[CONT76:.*]], label %[[TRAP75:.*]], !annotation [[META3]] +// CHECK: [[TRAP75]]: +// CHECK-NEXT: call void @llvm.ubsantrap(i8 25) #[[ATTR4]], !annotation [[META3]] +// CHECK-NEXT: unreachable, !annotation [[META3]] +// CHECK: [[CONT76]]: +// CHECK-NEXT: [[F77:%.*]] = getelementptr inbounds nuw [[STRUCT_OUTER_FLEX_T]], ptr [[WIDE_PTR_PTR68]], i32 0, i32 0 +// CHECK-NEXT: [[ARR78:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F77]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY79:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR78]], i64 0, i64 0 +// CHECK-NEXT: [[ARR81:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F77]], i32 0, i32 1 +// CHECK-NEXT: [[ARRAYDECAY82:%.*]] = getelementptr inbounds [0 x i8], ptr [[ARR81]], i64 0, i64 0 +// CHECK-NEXT: [[COUNT83:%.*]] = getelementptr inbounds nuw [[STRUCT_FLEX_T]], ptr [[F77]], i32 0, i32 0 +// CHECK-NEXT: [[TMP35:%.*]] = load i32, ptr [[COUNT83]], align 4 +// CHECK-NEXT: [[IDX_EXT84:%.*]] = sext i32 [[TMP35]] to i64 +// CHECK-NEXT: [[ADD_PTR85:%.*]] = getelementptr inbounds i8, ptr [[ARRAYDECAY82]], i64 [[IDX_EXT84]] +// CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP80]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[F77]], ptr [[TMP36]], align 8 +// CHECK-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP80]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[ADD_PTR85]], ptr [[TMP37]], align 8 +// CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP80]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[F77]], ptr [[TMP38]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR86:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP80]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB87:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR86]], align 8 +// CHECK-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP80]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB87]], ptr [[TMP39]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR88:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.2", ptr [[AGG_TEMP80]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR89:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR88]], align 8 +// CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[ARRAYDECAY79]], ptr [[TMP40]], align 8 +// CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR89]], ptr [[TMP41]], align 8 +// CHECK-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[ARRAYDECAY79]], ptr [[TMP42]], align 8 +// CHECK-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 0 +// CHECK-NEXT: [[TMP44:%.*]] = load ptr, ptr [[TMP43]], align 8 +// CHECK-NEXT: [[BOUND_PTR_ARITH:%.*]] = getelementptr i8, ptr [[TMP44]], i64 0 +// CHECK-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP65]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[BOUND_PTR_ARITH]], ptr [[TMP45]], align 8 +// CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 1 +// CHECK-NEXT: [[TMP47:%.*]] = load ptr, ptr [[TMP46]], align 8 +// CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP65]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[TMP47]], ptr [[TMP48]], align 8 +// CHECK-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[TMP]], i32 0, i32 2 +// CHECK-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP49]], align 8 +// CHECK-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP65]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[TMP50]], ptr [[TMP51]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR90:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP65]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR91:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR90]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR92:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP65]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB93:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR92]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR94:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.0", ptr [[AGG_TEMP65]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB95:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR94]], align 8 +// CHECK-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP64]], i32 0, i32 0 +// CHECK-NEXT: store ptr [[WIDE_PTR_PTR91]], ptr [[TMP52]], align 8 +// CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP64]], i32 0, i32 1 +// CHECK-NEXT: store ptr [[WIDE_PTR_UB93]], ptr [[TMP53]], align 8 +// CHECK-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP64]], i32 0, i32 2 +// CHECK-NEXT: store ptr [[WIDE_PTR_LB95]], ptr [[TMP54]], align 8 +// CHECK-NEXT: [[WIDE_PTR_PTR_ADDR96:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP64]], i32 0, i32 0 +// CHECK-NEXT: [[WIDE_PTR_PTR97:%.*]] = load ptr, ptr [[WIDE_PTR_PTR_ADDR96]], align 8 +// CHECK-NEXT: [[WIDE_PTR_UB_ADDR98:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP64]], i32 0, i32 1 +// CHECK-NEXT: [[WIDE_PTR_UB99:%.*]] = load ptr, ptr [[WIDE_PTR_UB_ADDR98]], align 8 +// CHECK-NEXT: [[WIDE_PTR_LB_ADDR100:%.*]] = getelementptr inbounds nuw %"__bounds_safety::wide_ptr.bidi_indexable.1", ptr [[AGG_TEMP64]], i32 0, i32 2 +// CHECK-NEXT: [[WIDE_PTR_LB101:%.*]] = load ptr, ptr [[WIDE_PTR_LB_ADDR100]], align 8 +// CHECK-NEXT: call void @use(ptr noundef [[WIDE_PTR_PTR97]]) +// CHECK-NEXT: ret void +// +void process_frame(char *__counted_by(frame_size) frame, unsigned frame_size) { + outer_flex_t *of = (outer_flex_t *) frame; + use(&of->f); + use(of->f.arr); + use(&of->f.arr[0]); +} +//. +// CHECK: [[META2]] = !{!"bounds-safety-check-ptr-lt-upper-bound"} +// CHECK: [[META3]] = !{!"bounds-safety-check-ptr-ge-lower-bound"} +//. diff --git a/clang/test/BoundsSafety/Profile/flexible-array-member-checks-code-coverage.c b/clang/test/BoundsSafety/Profile/flexible-array-member-checks-code-coverage.c index fa415597de76f..0db782008411c 100644 --- a/clang/test/BoundsSafety/Profile/flexible-array-member-checks-code-coverage.c +++ b/clang/test/BoundsSafety/Profile/flexible-array-member-checks-code-coverage.c @@ -31,11 +31,11 @@ void bar(struct s *p); // CHECK: trap: // CHECK-NEXT: tail call void @llvm.ubsantrap(i8 25) #[[ATTR3:[0-9]+]], {{!annotation ![0-9]+}} // CHECK-NEXT: unreachable, {{!annotation ![0-9]+}} -// CHECK: cont27: +// CHECK: cont26: // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[BUF]], align 4, {{!tbaa ![0-9]+}} // CHECK-NEXT: [[FLEX_COUNT_MINUS:%.*]] = icmp sgt i32 [[TMP2]], -1, {{!annotation ![0-9]+}} // CHECK-NEXT: br i1 [[FLEX_COUNT_MINUS]], label [[CONT30:%.*]], label [[TRAP]], {{!annotation ![0-9]+}} -// CHECK: cont30: +// CHECK: cont29: // CHECK-NEXT: [[GEPDIFF:%.*]] = add nsw i64 [[IDX_EXT]], -4, {{!annotation ![0-9]+}} // CHECK-NEXT: [[FLEX_AVAIL_COUNT_DIV:%.*]] = ashr exact i64 [[GEPDIFF]], 2, {{!annotation ![0-9]+}} // CHECK-NEXT: [[FLEX_COUNT_INTPTR:%.*]] = zext nneg i32 [[TMP2]] to i64, {{!annotation ![0-9]+}} @@ -43,7 +43,7 @@ void bar(struct s *p); // CHECK-NEXT: [[DOTNOT50:%.*]] = icmp eq i32 [[SIZE]], 0, {{!annotation ![0-9]+}} // CHECK-NEXT: [[OR_COND52:%.*]] = or i1 [[DOTNOT50]], [[FLEX_COUNT_CHECK_NOT]], {{!annotation ![0-9]+}} // CHECK-NEXT: br i1 [[OR_COND52]], label [[TRAP]], label [[CONT40]], {{!annotation ![0-9]+}} -// CHECK: cont40: +// CHECK: cont39: // CHECK-NEXT: tail call void @bar(ptr noundef [[BUF]]) #[[ATTR4:[0-9]+]] // CHECK-NEXT: ret void //