Instruction decoding should not fail if an ECALL instruction hasn't completed

[leekillough]

After an ECALL instruction is issued and sets the SCAUSE exception flag, Rev continues to decode instructions after the ECALL. If an instruction decoding fails, the program does not complete correctly even if the ECALL were to exit the program or change the PC.

Decoding errors during the execution of an ECALL need to be deferred.

.global _start

.section .text
_start:
        li a0, 2
        li a7, 93   # exit
        ecall

RevCPU[cpu:RevCPU:0]: Initialization of RevCPUs complete.
RevCPU[cpu:clockTick:1000]: Cycle: 1
RevCPU[cpu:clockTick:2000]: Cycle: 2
RevCPU[cpu:FetchAndDecodeInst:2000]: Core 0; Hart 0; Thread 1; PC:InstPayload = 0x100b0:0x00200513
RevCPU[cpu:Render:2000]: Core 0; Hart 0; Thread 1; *I 0x100b0:00200513  + addi %rd, %rs1, $imm   0x0<-x0 x10<-0x2
RevCPU[cpu:clockTick:3000]: Cycle: 3
RevCPU[cpu:FetchAndDecodeInst:3000]: Core 0; Hart 0; Thread 1; PC:InstPayload = 0x100b4:0x05d00893
RevCPU[cpu:Render:3000]: Core 0; Hart 0; Thread 1; *I 0x100b4:05d00893    addi %rd, %rs1, $imm   0x0<-x0 x17<-0x5d
RevCPU[cpu:clockTick:4000]: Cycle: 4
RevCPU[cpu:FetchAndDecodeInst:4000]: Core 0; Hart 0; Thread 1; PC:InstPayload = 0x100b8:0x00000073
RevCPU[cpu:Render:4000]: Core 0; Hart 0; Thread 1; *I 0x100b8:00000073    ecall
RevCPU[cpu:clockTick:5000]: Cycle: 5
FATAL: RevCPU[cpu:FetchAndDecodeInst:5000]: Error: Core 0 failed to decode instruction at PC=0x100bc; Inst=0

$RVOBJDUMP -d simple_syscall.exe

simple_syscall.exe:     file format elf64-littleriscv


Disassembly of section .text:

00000000000100b0 <_start>:
   100b0:       00200513                li      a0,2
   100b4:       05d00893                li      a7,93
   100b8:       00000073                ecall

Adding a nop makes the ECALL work:

.global _start

.section .text
_start:
        li a0, 2
        li a7, 93
        ecall
        nop

@ct-clmsn

[ct-clmsn]

@leekillough good find! Was having issues describing it for an issue ticket. This description is perfect.