Skip to content

Commit e440f0a

Browse files
authored
Update CMSIS third party download (#2716)
CMSIS is updated from CMSIS_5 to CMSIS_6. BUG=It is recommended to upgrade from CMSIS_5 to CMSIS_6
1 parent 1b975d9 commit e440f0a

File tree

6 files changed

+34
-28
lines changed

6 files changed

+34
-28
lines changed

tensorflow/lite/micro/cortex_m_corstone_300/README.md

+4-5
Original file line numberDiff line numberDiff line change
@@ -11,11 +11,10 @@ https://developer.arm.com/ip-products/subsystem/corstone/corstone-300)
1111
Building the Corstone-300 based target has the following dependencies:
1212

1313
- [Arm Ethos-U Core Platform](https://review.mlplatform.org/admin/repos/ml/ethos-u/ethos-u-core-platform)
14-
- Arm Ethos-U Core Platform provides the linker file as well as UART and
15-
retarget functions.
16-
- [CMSIS](https://github.com/ARM-software/CMSIS_5)
17-
- CMSIS provides startup functionality, e.g. for setting up interrupt
18-
handlers and clock speed.
14+
- Arm Ethos-U Core Platform provides the linker file as well as UART and retarget functions.
15+
- [CMSIS](https://github.com/ARM-software/CMSIS_6) + [CMSIS-Cortex_DFP](https://github.com/ARM-software/Cortex_DFP)
16+
- CMSIS provides startup functionality, e.g. for setting up interrupt handlers and clock speed.
17+
- See cmsis_download.sh for how these are downloaded relative to each other for the given examples and make targets.
1918

2019
Both these repositories are downloaded automatically by the build process in
2120
TFLM.

tensorflow/lite/micro/docs/optimized_kernel_implementations.md

+2-2
Original file line numberDiff line numberDiff line change
@@ -100,8 +100,8 @@ The optimized kernel architecture is composed of the following three modules:
100100

101101
This library uses knowledge of the hardware and compiler to implement the
102102
underlying operations. Examples of this are
103-
[CMSIS-NN](https://github.com/ARM-software/CMSIS_5/tree/develop/CMSIS/NN) from
104-
ARM and [NNLib](https://github.com/foss-xtensa/nnlib-hifi4) from Cadence.
103+
[CMSIS-NN](https://github.com/ARM-software/CMSIS-NN) from Arm and
104+
[NNLib](https://github.com/foss-xtensa/nnlib-hifi4) from Cadence.
105105

106106
The benefits of having this API separation are:
107107

tensorflow/lite/micro/tools/make/ext_libs/cmsis_download.sh

+18-5
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
#!/bin/bash
2-
# Copyright 2023 The TensorFlow Authors. All Rights Reserved.
2+
# Copyright 2024 The TensorFlow Authors. All Rights Reserved.
33
#
44
# Licensed under the Apache License, Version 2.0 (the "License");
55
# you may not use this file except in compliance with the License.
@@ -42,22 +42,35 @@ if [ ! -d ${DOWNLOADS_DIR} ]; then
4242
fi
4343

4444
DOWNLOADED_CMSIS_PATH=${DOWNLOADS_DIR}/cmsis
45+
DOWNLOADED_CORTEX_DFP_PATH=${DOWNLOADS_DIR}/cmsis/Cortex_DFP
4546

4647
if [ -d ${DOWNLOADED_CMSIS_PATH} ]; then
4748
echo >&2 "${DOWNLOADED_CMSIS_PATH} already exists, skipping the download."
4849
else
4950

50-
ZIP_PREFIX="e94a96201a97be3e84d3d6ef081d2f0f7db9b5fd"
51-
CMSIS_URL="http://github.com/ARM-software/CMSIS_5/archive/${ZIP_PREFIX}.zip"
52-
CMSIS_MD5="e72a40716ca8adca690b91819c69d83e"
51+
ZIP_PREFIX="5782d6f8057906d360f4b95ec08a2354afe5c9b9"
52+
CMSIS_URL="http://github.com/ARM-software/CMSIS_6/archive/${ZIP_PREFIX}.zip"
53+
CMSIS_MD5="563e7c6465f63bdc034359e9b536b366"
5354

5455
# wget is much faster than git clone of the entire repo. So we wget a specific
5556
# version and can then apply a patch, as needed.
5657
wget ${CMSIS_URL} -O /tmp/${ZIP_PREFIX}.zip >&2
5758
check_md5 /tmp/${ZIP_PREFIX}.zip ${CMSIS_MD5}
5859

5960
unzip -qo /tmp/${ZIP_PREFIX}.zip -d /tmp >&2
60-
mv /tmp/CMSIS_5-${ZIP_PREFIX} ${DOWNLOADED_CMSIS_PATH}
61+
mv /tmp/CMSIS_6-${ZIP_PREFIX} ${DOWNLOADED_CMSIS_PATH}
62+
63+
# Also pull the related CMSIS Cortex_DFP component for generic Arm Cortex-M device support
64+
ZIP_PREFIX="c2c70a97a20fb355815e2ead3d4a40e35a4a3cdf"
65+
CMSIS_DFP_URL="http://github.com/ARM-software/Cortex_DFP/archive/${ZIP_PREFIX}.zip"
66+
CMSIS_DFP_MD5="3cbb6955b6d093a2fe078ef2341f6b89"
67+
68+
wget ${CMSIS_DFP_URL} -O /tmp/${ZIP_PREFIX}.zip >&2
69+
check_md5 /tmp/${ZIP_PREFIX}.zip ${CMSIS_DFP_MD5}
70+
71+
unzip -qo /tmp/${ZIP_PREFIX}.zip -d /tmp >&2
72+
mv /tmp/Cortex_DFP-${ZIP_PREFIX} ${DOWNLOADED_CORTEX_DFP_PATH}
73+
6174
fi
6275

6376
echo "SUCCESS"

tensorflow/lite/micro/tools/make/ext_libs/cmsis_nn.inc

+1-1
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ THIRD_PARTY_CC_HDRS += $(shell find $(CMSIS_NN_PATH)/Include -name "*.h")
4242
# project generation scripts copy over the compiler specific implementations of
4343
# the various intrinisics.
4444
THIRD_PARTY_CC_HDRS += \
45-
$(CMSIS_PATH)/LICENSE.txt \
45+
$(CMSIS_PATH)/LICENSE \
4646
$(CMSIS_NN_PATH)/LICENSE \
4747
$(wildcard $(CMSIS_PATH)/CMSIS/Core/Include/*.h)
4848

tensorflow/lite/micro/tools/make/targets/cortex_m_corstone_300_makefile.inc

+7-9
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,6 @@ else ifeq ($(TARGET_ARCH), cortex-m4+fp)
6363
ARMC6_LDFLAGS += -Wl,--cpu=Cortex-M4
6464
FLOAT=hard
6565
MCPU_OPTION := cortex-m4
66-
CMSIS_ARM_FEATURES := _FP
6766

6867
else ifeq ($(TARGET_ARCH), cortex-m55)
6968
ARMC6_LDFLAGS += -Wl,--cpu=8.1-M.Main.mve.fp
@@ -77,7 +76,6 @@ else ifeq ($(TARGET_ARCH), cortex-m7+fp)
7776
ARMC6_LDFLAGS += -Wl,--cpu=Cortex-M7
7877
FLOAT=hard
7978
MCPU_OPTION := cortex-m7
80-
CMSIS_ARM_FEATURES := _DP
8179

8280
else
8381
$(error "TARGET_ARCH=$(TARGET_ARCH) is not supported")
@@ -110,7 +108,7 @@ ifeq ($(TOOLCHAIN), armclang)
110108
ARMC6_LDFLAGS += -Wl,--load_addr_map_info,--xref,--callgraph,--symbols
111109
ARMC6_LDFLAGS += -Wl,--info,sizes,--info,totals,--info,unused,--info,veneers
112110
ARMC6_LDFLAGS += -Wl,--list=gen/$(TARGET).map
113-
ARMC6_LDFLAGS += -Wl,--entry=Reset_Handler --verbose
111+
ARMC6_LDFLAGS += -Wl,--entry=Reset_Handler --verbose
114112
ARMC6_LDFLAGS += -Wl,--scatter=$(ETHOS_U_CORE_PLATFORM)/platform.scatter
115113

116114
# Pass a hint to the linker where to find the entry point. This needs to be
@@ -182,11 +180,11 @@ PLATFORM_FLAGS = \
182180
CXXFLAGS += $(PLATFORM_FLAGS)
183181
CCFLAGS += $(PLATFORM_FLAGS)
184182

185-
CXXFLAGS += -D$(ARM_CPU)$(CMSIS_ARM_FEATURES)
186-
CCFLAGS += -D$(ARM_CPU)$(CMSIS_ARM_FEATURES)
183+
CXXFLAGS += -D$(ARM_CPU)
184+
CCFLAGS += -D$(ARM_CPU)
187185

188186
# For Ethos-U Core Driver. Header file name is depending on target architecture.
189-
CXXFLAGS += -DCMSIS_DEVICE_ARM_CORTEX_M_XX_HEADER_FILE=\"$(ARM_CPU)$(CMSIS_ARM_FEATURES).h\"
187+
CXXFLAGS += -DCMSIS_DEVICE_ARM_CORTEX_M_XX_HEADER_FILE=\"$(ARM_CPU).h\"
190188

191189
THIRD_PARTY_CC_SRCS += \
192190
$(ETHOS_U_CORE_PLATFORM)/retarget.c \
@@ -199,10 +197,10 @@ endif
199197
CMSIS_DEFAULT_DOWNLOAD_PATH := $(DOWNLOADS_DIR)/cmsis
200198
CMSIS_PATH := $(CMSIS_DEFAULT_DOWNLOAD_PATH)
201199
THIRD_PARTY_CC_SRCS += \
202-
$(CMSIS_PATH)/Device/ARM/$(ARM_CPU)/Source/system_$(ARM_CPU).c \
203-
$(CMSIS_PATH)/Device/ARM/$(ARM_CPU)/Source/startup_$(ARM_CPU).c
200+
$(CMSIS_PATH)/Cortex_DFP/Device/$(ARM_CPU)/Source/system_$(ARM_CPU).c \
201+
$(CMSIS_PATH)/Cortex_DFP/Device/$(ARM_CPU)/Source/startup_$(ARM_CPU).c
204202
INCLUDES += \
205-
-I$(CMSIS_PATH)/Device/ARM/$(ARM_CPU)/Include \
203+
-I$(CMSIS_PATH)/Cortex_DFP/Device/$(ARM_CPU)/Include \
206204
-I$(CMSIS_PATH)/CMSIS/Core/Include
207205

208206
# TODO(#274): Examine why some tests fail here.

tensorflow/lite/micro/tools/make/targets/cortex_m_generic_makefile.inc

+2-6
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,6 @@ else ifeq ($(TARGET_ARCH), cortex-m3)
4747
else ifeq ($(TARGET_ARCH), cortex-m33)
4848
CORE=M33
4949
ARM_LDFLAGS := -Wl,--cpu=Cortex-M33
50-
CMSIS_ARM_FEATURES := _DSP_FP
5150
FLOAT=hard
5251

5352
else ifeq ($(TARGET_ARCH), cortex-m33+nodsp)
@@ -62,14 +61,12 @@ else ifeq ($(TARGET_ARCH), cortex-m4)
6261
else ifeq ($(TARGET_ARCH), cortex-m4+fp)
6362
CORE=M4
6463
ARM_LDFLAGS := -Wl,--cpu=Cortex-M4
65-
CMSIS_ARM_FEATURES := _FP
6664
FLOAT=hard
6765
GCC_TARGET_ARCH := cortex-m4
6866

6967
else ifeq ($(TARGET_ARCH), cortex-m4+sfp)
7068
CORE=M4
7169
ARM_LDFLAGS := -Wl,--cpu=Cortex-M4
72-
CMSIS_ARM_FEATURES := _FP
7370
FLOAT=softfp
7471
GCC_TARGET_ARCH := cortex-m4
7572

@@ -96,7 +93,6 @@ else ifeq ($(TARGET_ARCH), cortex-m7+fp)
9693
ARM_LDFLAGS := -Wl,--cpu=Cortex-M7
9794
FLOAT=hard
9895
GCC_TARGET_ARCH := cortex-m7
99-
CMSIS_ARM_FEATURES := _DP
10096

10197
else ifeq ($(TARGET_ARCH), cortex-m85)
10298
CORE=M85
@@ -114,7 +110,7 @@ ARM_CPU := "ARMC$(CORE)"
114110
CMSIS_DEFAULT_DOWNLOAD_PATH := $(MAKEFILE_DIR)/downloads/cmsis
115111
CMSIS_PATH := $(CMSIS_DEFAULT_DOWNLOAD_PATH)
116112
INCLUDES += \
117-
-I$(CMSIS_PATH)/Device/ARM/$(ARM_CPU)/Include \
113+
-I$(CMSIS_PATH)/Cortex_DFP/Device/$(ARM_CPU)/Include \
118114
-I$(CMSIS_PATH)/CMSIS/Core/Include
119115

120116
ifneq ($(filter cortex-m55%,$(TARGET_ARCH)),)
@@ -187,7 +183,7 @@ PLATFORM_FLAGS = \
187183
-DCPU_$(CORE)=1
188184

189185
# For DWT/PMU counters. Header file name is depending on target architecture.
190-
PLATFORM_FLAGS += -DCMSIS_DEVICE_ARM_CORTEX_M_XX_HEADER_FILE=\"$(ARM_CPU)$(CMSIS_ARM_FEATURES).h\"
186+
PLATFORM_FLAGS += -DCMSIS_DEVICE_ARM_CORTEX_M_XX_HEADER_FILE=\"$(ARM_CPU).h\"
191187
PLATFORM_FLAGS += -D$(ARM_CPU)
192188

193189
# Arm Cortex-M55 and Cortex-M85 use PMU counters.

0 commit comments

Comments
 (0)