@@ -95,7 +95,6 @@ func (b *Bus) Map(m types.Model) {
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// setup CGB only registers
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if b .isGBC && b .c .IsCGBCartridge () {
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- b .vRAMBankMask = 1
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b .ReserveAddress (types .KEY0 , func (v byte ) byte {
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// KEY0 is only writable when boot ROM is running TODO verify
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if ! b .bootROMDone {
@@ -196,6 +195,7 @@ func (b *Bus) Map(m types.Model) {
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// setup cgb model registers
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if b .model == types .CGBABC || b .model == types .CGB0 {
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+ b .vRAMBankMask = 1
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b .ReserveAddress (types .VBK , func (v byte ) byte {
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if b .IsGBCCart () || b .IsBooting () { // CGB boot ROM makes use of both banks
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copy (b .vRAM [b .data [types .VBK ]& 0x1 ][:], b .data [0x8000 :0xA000 ])
@@ -289,6 +289,10 @@ func (b *Bus) Boot() {
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if b .model == types .CGBABC || b .model == types .CGB0 {
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b .Set (types .VBK , 0xFE )
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+
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+ if ! b .IsGBCCart () {
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+ b .vRAMBankMask = 0
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+ }
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}
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b .bootROMDone = true
@@ -327,6 +331,9 @@ func (b *Bus) Write(addr uint16, value byte) {
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}
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b .bootROMDone = true
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value = 0xff
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+ if b .isGBC && ! b .IsGBCCart () {
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+ b .vRAMBankMask = 0
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+ }
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for _ , f := range b .bootHandlers {
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f ()
@@ -374,9 +381,6 @@ func (b *Bus) Write(addr uint16, value byte) {
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default :
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if handler := b .writeHandlers [addr & 0xFF ]; handler != nil {
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// check to see if a component has reserved this address
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- if addr == 0xff15 {
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- panic ("how" )
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- }
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value = handler (value )
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} else if addr <= 0xff7f {
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return
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