diff --git a/src/helpers/passive-fn.ts b/src/helpers/passive-fn.ts
index c46e8931..26ef1201 100644
--- a/src/helpers/passive-fn.ts
+++ b/src/helpers/passive-fn.ts
@@ -1,4 +1,8 @@
-import type { AnyCircuitElement, PcbSilkscreenPath } from "circuit-json"
+import type {
+  AnyCircuitElement,
+  PcbCourtyardRect,
+  PcbSilkscreenPath,
+} from "circuit-json"
 import { rectpad } from "../helpers/rectpad"
 import mm from "@tscircuit/mm"
 import { platedhole } from "./platedhole"
@@ -187,12 +191,31 @@ export const passive = (params: PassiveDef): AnyCircuitElement[] => {
   const textY = textbottom ? -ph / 2 - 0.9 : ph / 2 + 0.9
   const silkscreenRefText: SilkscreenRef = silkscreenRef(0, textY, 0.2)
 
+  // IPC-7351B: courtyard must enclose body, pads, AND silkscreen outline
+  const excess = 0.25
+  const silkXs = silkscreenLine.route.map((pt) => pt.x)
+  const silkYs = silkscreenLine.route.map((pt) => pt.y)
+  const crtMinX = Math.min(-(w ?? 0) / 2, -(p / 2 + pw / 2), ...silkXs) - excess
+  const crtMaxX = Math.max((w ?? 0) / 2, p / 2 + pw / 2, ...silkXs) + excess
+  const crtMinY = Math.min(-(h ?? 0) / 2, -ph / 2, ...silkYs) - excess
+  const crtMaxY = Math.max((h ?? 0) / 2, ph / 2, ...silkYs) + excess
+  const courtyard: PcbCourtyardRect = {
+    type: "pcb_courtyard_rect",
+    pcb_courtyard_rect_id: "",
+    pcb_component_id: "",
+    center: { x: (crtMinX + crtMaxX) / 2, y: (crtMinY + crtMaxY) / 2 },
+    width: crtMaxX - crtMinX,
+    height: crtMaxY - crtMinY,
+    layer: "top",
+  }
+
   if (tht) {
     return [
       platedhole(1, -p / 2, 0, pw, (pw * 1) / 0.8),
       platedhole(2, p / 2, 0, pw, (pw * 1) / 0.8),
       silkscreenLine,
       silkscreenRefText,
+      courtyard,
     ]
   }
   return [
@@ -200,5 +223,6 @@ export const passive = (params: PassiveDef): AnyCircuitElement[] => {
     rectpad(["2", "right"], p / 2, 0, pw, ph),
     silkscreenLine,
     silkscreenRefText,
+    courtyard,
   ]
 }
diff --git a/tests/kicad-parity/__snapshots__/0402_metric_parity.snap.svg b/tests/kicad-parity/__snapshots__/0402_metric_parity.snap.svg
index 3dfa9d60..540d6b6e 100644
--- a/tests/kicad-parity/__snapshots__/0402_metric_parity.snap.svg
+++ b/tests/kicad-parity/__snapshots__/0402_metric_parity.snap.svg
@@ -1 +1 @@
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\ No newline at end of file
+<svg xmlns="http://www.w3.org/2000/svg" width="800" height="600"><style></style><rect class="boundary" x="0" y="0" fill="#000" width="800" height="600" data-type="pcb_background" data-pcb-layer="global"/><rect class="pcb-boundary" fill="none" stroke="#fff" stroke-width="0.3" x="207.6556912123178" y="142.8571428571429" width="384.68861757536445" height="314.2857142857143" data-type="pcb_boundary" data-pcb-layer="global"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="236.22711978374636" y="271.42857142857144" width="57.142857142857146" height="42.857142857142854" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="307.65569121231783" y="271.42857142857144" width="57.142857142857146" height="42.857142857142854" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="463.7728802162537" y="271.42857142857144" width="57.142857142857146" height="42.857142857142854" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="535.2014516448252" y="271.42857142857144" width="57.142857142857146" height="42.857142857142854" data-type="pcb_smtpad" data-pcb-layer="top"/><path class="pcb-silkscreen pcb-silkscreen-top" d="M 336.2271197837464 214.2857142857143 L 207.6556912123178 214.2857142857143 L 207.6556912123178 371.42857142857144 L 336.2271197837464 371.42857142857144" fill="none" stroke="#f2eda1" stroke-width="14.285714285714286" stroke-linecap="round" stroke-linejoin="round" data-pcb-component-id="" data-pcb-silkscreen-path-id="" data-type="pcb_silkscreen_path" data-pcb-layer="top"/><text x="0" y="0" dx="0" dy="0" fill="#f2eda1" font-family="Arial, sans-serif" font-size="28.571428571428573" text-anchor="middle" dominant-baseline="central" transform="matrix(1,0,0,1,300.51283406946067,142.8571428571429)" class="pcb-silkscreen-text pcb-silkscreen-top" data-pcb-silkscreen-text-id="pcb_component_1" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="top">{REF}</text><text x="0" y="0" dx="0" dy="0" fill="#f2eda1" font-family="Arial, sans-serif" font-size="42.857142857142854" text-anchor="middle" dominant-baseline="central" transform="matrix(1,0,0,1,414.28571428571433,457.14285714285717)" class="pcb-silkscreen-text pcb-silkscreen-top" data-pcb-silkscreen-text-id="" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="top">Diff: 0.00%</text><rect x="171.9414054980321" y="178.5714285714286" width="228.57142857142858" height="228.57142857142858" class="pcb-courtyard-rect pcb-courtyard-top" data-pcb-courtyard-rect-id="" data-type="pcb_courtyard_rect" data-pcb-layer="top" fill="none" stroke="#FF00FF" stroke-width="7.142857142857143"/><rect x="442.3443087876822" y="250.00000000000003" width="171.42857142857142" height="85.71428571428571" class="pcb-courtyard-rect pcb-courtyard-top" data-pcb-courtyard-rect-id="pcb_courtyard_rect_0" data-type="pcb_courtyard_rect" data-pcb-layer="top" fill="none" stroke="#FF00FF" stroke-width="7.142857142857143"/></svg>
\ No newline at end of file
diff --git a/tests/kicad-parity/__snapshots__/0402_parity.snap.svg b/tests/kicad-parity/__snapshots__/0402_parity.snap.svg
index 5a674199..3df6d490 100644
--- a/tests/kicad-parity/__snapshots__/0402_parity.snap.svg
+++ b/tests/kicad-parity/__snapshots__/0402_parity.snap.svg
@@ -1 +1 @@
-<svg xmlns="http://www.w3.org/2000/svg" width="800" height="600"><style></style><rect class="boundary" x="0" y="0" fill="#000" width="800" height="600" data-type="pcb_background" data-pcb-layer="global"/><rect class="pcb-boundary" fill="none" stroke="#fff" stroke-width="0.3" x="123.15735285182986" y="143.59016187817613" width="553.6852942963402" height="312.8196762436479" data-type="pcb_boundary" data-pcb-layer="global"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="147.78882342219583" y="254.431779444823" width="66.50497053998812" height="78.8207058251711" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="273.4093233310623" y="254.431779444823" width="66.50497053998812" height="78.8207058251711" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="484.7171766993156" y="254.431779444823" width="66.50497053998812" height="78.8207058251711" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="610.337676608182" y="254.431779444823" width="66.50497053998812" height="78.8207058251711" data-type="pcb_smtpad" data-pcb-layer="top"/><path class="pcb-silkscreen pcb-silkscreen-top" d="M 306.66180860105635 205.16883830409108 L 123.15735285182986 205.16883830409108 L 123.15735285182986 382.51542641072604 L 306.66180860105635 382.51542641072604" fill="none" stroke="#f2eda1" stroke-width="12.315735285182987" stroke-linecap="round" stroke-linejoin="round" data-pcb-component-id="" data-pcb-silkscreen-path-id="" data-type="pcb_silkscreen_path" data-pcb-layer="top"/><text x="0" y="0" dx="0" dy="0" fill="#f2eda1" font-family="Arial, sans-serif" font-size="24.631470570365973" text-anchor="middle" dominant-baseline="central" transform="matrix(1,0,0,1,243.85155864662312,143.59016187817613)" class="pcb-silkscreen-text pcb-silkscreen-top" data-pcb-silkscreen-text-id="pcb_component_1" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="top">{REF}</text><text x="0" y="0" dx="0" dy="0" fill="#f2eda1" font-family="Arial, sans-serif" font-size="36.94720585554896" text-anchor="middle" dominant-baseline="central" transform="matrix(1,0,0,1,412.315735285183,456.409838121824)" class="pcb-silkscreen-text pcb-silkscreen-top" data-pcb-silkscreen-text-id="" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="top">Diff: 0.00%</text><rect x="466.24357377154115" y="235.9581765170485" width="229.07267630440356" height="115.76791168072006" class="pcb-courtyard-rect pcb-courtyard-top" data-pcb-courtyard-rect-id="pcb_courtyard_rect_0" data-type="pcb_courtyard_rect" data-pcb-layer="top" fill="none" stroke="#FF00FF" stroke-width="6.157867642591493"/></svg>
\ No newline at end of file
+<svg xmlns="http://www.w3.org/2000/svg" width="800" height="600"><style></style><rect class="boundary" x="0" y="0" fill="#000" width="800" height="600" data-type="pcb_background" data-pcb-layer="global"/><rect class="pcb-boundary" fill="none" stroke="#fff" stroke-width="0.3" x="123.15735285182986" y="143.59016187817613" width="553.6852942963402" height="312.8196762436479" data-type="pcb_boundary" data-pcb-layer="global"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="147.78882342219583" y="254.431779444823" width="66.50497053998812" height="78.8207058251711" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="273.4093233310623" y="254.431779444823" width="66.50497053998812" height="78.8207058251711" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="484.7171766993156" y="254.431779444823" width="66.50497053998812" height="78.8207058251711" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="610.337676608182" y="254.431779444823" width="66.50497053998812" height="78.8207058251711" data-type="pcb_smtpad" data-pcb-layer="top"/><path class="pcb-silkscreen pcb-silkscreen-top" d="M 306.66180860105635 205.16883830409108 L 123.15735285182986 205.16883830409108 L 123.15735285182986 382.51542641072604 L 306.66180860105635 382.51542641072604" fill="none" stroke="#f2eda1" stroke-width="12.315735285182987" stroke-linecap="round" stroke-linejoin="round" data-pcb-component-id="" data-pcb-silkscreen-path-id="" data-type="pcb_silkscreen_path" data-pcb-layer="top"/><text x="0" y="0" dx="0" dy="0" fill="#f2eda1" font-family="Arial, sans-serif" font-size="24.631470570365973" text-anchor="middle" dominant-baseline="central" transform="matrix(1,0,0,1,243.85155864662312,143.59016187817613)" class="pcb-silkscreen-text pcb-silkscreen-top" data-pcb-silkscreen-text-id="pcb_component_1" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="top">{REF}</text><text x="0" y="0" dx="0" dy="0" fill="#f2eda1" font-family="Arial, sans-serif" font-size="36.94720585554896" text-anchor="middle" dominant-baseline="central" transform="matrix(1,0,0,1,412.315735285183,456.409838121824)" class="pcb-silkscreen-text pcb-silkscreen-top" data-pcb-silkscreen-text-id="" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="top">Diff: 0.00%</text><rect x="92.36801463887241" y="174.3795000911336" width="278.3356174451354" height="238.9252645325499" class="pcb-courtyard-rect pcb-courtyard-top" data-pcb-courtyard-rect-id="" data-type="pcb_courtyard_rect" data-pcb-layer="top" fill="none" stroke="#FF00FF" stroke-width="6.157867642591493"/><rect x="466.24357377154115" y="235.9581765170485" width="229.07267630440356" height="115.76791168072006" class="pcb-courtyard-rect pcb-courtyard-top" data-pcb-courtyard-rect-id="pcb_courtyard_rect_0" data-type="pcb_courtyard_rect" data-pcb-layer="top" fill="none" stroke="#FF00FF" stroke-width="6.157867642591493"/></svg>
\ No newline at end of file
diff --git a/tests/kicad-parity/__snapshots__/0603_metric_parity.snap.svg b/tests/kicad-parity/__snapshots__/0603_metric_parity.snap.svg
index fbd414f3..554efef4 100644
--- a/tests/kicad-parity/__snapshots__/0603_metric_parity.snap.svg
+++ b/tests/kicad-parity/__snapshots__/0603_metric_parity.snap.svg
@@ -1 +1 @@
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diff --git a/tests/kicad-parity/__snapshots__/0805_parity.snap.svg b/tests/kicad-parity/__snapshots__/0805_parity.snap.svg
index 803db54d..8ec19183 100644
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diff --git a/tests/kicad-parity/__snapshots__/1206_parity.snap.svg b/tests/kicad-parity/__snapshots__/1206_parity.snap.svg
index a4910432..7fa1fdf5 100644
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diff --git a/tests/kicad-parity/__snapshots__/1210_parity.snap.svg b/tests/kicad-parity/__snapshots__/1210_parity.snap.svg
index 8840e97e..058f9d27 100644
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diff --git a/tests/kicad-parity/__snapshots__/1812_parity.snap.svg b/tests/kicad-parity/__snapshots__/1812_parity.snap.svg
index a8ac3582..7cbf5799 100644
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index 646f7b18..b3559627 100644
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diff --git a/tests/kicad-parity/__snapshots__/2512_parity.snap.svg b/tests/kicad-parity/__snapshots__/2512_parity.snap.svg
index d1105680..10fd0b08 100644
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