Merge pull request #3093 from verilog-to-routing/yosys-upgrade

Upgrade to Yosys 0.53

Author: AmirhosseinPoolad

parmys/parmys-plugin/parmys.cc

@@ -1099,8 +1099,11 @@ struct ParMYSPass : public Pass {
 
         log("Updating the Design\n");
         Pass::call(design, "delete");
-
+	    std::vector<RTLIL::Module*> modules_to_remove;
         for (auto module : design->modules()) {
+            modules_to_remove.push_back(module);
+        }
+        for (auto module : modules_to_remove) {
             design->remove(module);
         }
 

parmys/parmys-plugin/parmys_update.cc

@@ -506,9 +506,9 @@ void define_logical_function_yosys(nnode_t *node, Module *module)
         lutptr = &cell->parameters.at(ID::LUT);
         for (int i = 0; i < (1 << node->num_input_pins); i++) {
             if (i == 3 || i == 5 || i == 6 || i == 7) //"011 1\n101 1\n110 1\n111 1\n"
-                lutptr->bits.at(i) = RTLIL::State::S1;
+                lutptr->bits().at(i) = RTLIL::State::S1;
             else
-                lutptr->bits.at(i) = RTLIL::State::S0;
+                lutptr->bits().at(i) = RTLIL::State::S0;
         }
     } else {
         cell->parameters[ID::A_WIDTH] = RTLIL::Const(int(node->num_input_pins));

parmys/regression_test/benchmark/task/freecores/synthesis_result.json

@@ -479,20 +479,20 @@
         "Multiplier": 1,
         "Memory": 8,
         "generic logic size": 4,
-        "Longest Path": 274,
+        "Longest Path": 275,
         "Average Path": 3,
         "Estimated LUTs": 4777,
         "Total Node": 1957,
-        "Wires": 5591,
-        "Wire Bits": 10025,
+        "Wires": 5594,
+        "Wire Bits": 10106,
         "Public Wires": 240,
         "Public Wire Bits": 240,
-        "Total Cells": 8185,
+        "Total Cells": 8190,
         "MUX": 2164,
         "XOR": 40,
-        "OR": 2836,
-        "AND": 1451,
-        "NOT": 637,
+        "OR": 2837,
+        "AND": 1453,
+        "NOT": 639,
         "DFFs": [
             "$_DFF_P_ 645"
         ],
@@ -534,7 +534,7 @@
         "Estimated LUTs": 41888,
         "Total Node": 5344,
         "Wires": 9777,
-        "Wire Bits": 102242,
+        "Wire Bits": 102228,
         "Public Wires": 391,
         "Public Wire Bits": 391,
         "Total Cells": 31999,
@@ -585,8 +585,8 @@
         "Average Path": 3,
         "Estimated LUTs": 42386,
         "Total Node": 5593,
-        "Wires": 10796,
-        "Wire Bits": 103210,
+        "Wires": 10808,
+        "Wire Bits": 103300,
         "Public Wires": 648,
         "Public Wire Bits": 648,
         "Total Cells": 32995,
@@ -832,28 +832,28 @@
         "synthesis_time(ms)": 13,
         "Pi": 96,
         "Po": 115,
-        "logic element": 2439,
-        "Adder": 426,
+        "logic element": 2425,
+        "Adder": 412,
         "Memory": 96,
         "generic logic size": 4,
-        "Longest Path": 473,
+        "Longest Path": 476,
         "Average Path": 4,
-        "Estimated LUTs": 4564,
-        "Total Node": 2961,
-        "Wires": 6934,
-        "Wire Bits": 11506,
-        "Public Wires": 501,
-        "Public Wire Bits": 501,
+        "Estimated LUTs": 4550,
+        "Total Node": 2933,
+        "Wires": 6977,
+        "Wire Bits": 11482,
+        "Public Wires": 487,
+        "Public Wire Bits": 487,
         "Total Cells": 8955,
-        "MUX": 2605,
-        "XOR": 311,
-        "OR": 1861,
-        "AND": 1683,
-        "NOT": 672,
+        "MUX": 2601,
+        "XOR": 295,
+        "OR": 1926,
+        "AND": 1684,
+        "NOT": 678,
         "DFFs": [
-            "$_DFF_P_ 1312"
+            "$_DFF_P_ 1310"
         ],
-        "adder": 415,
+        "adder": 365,
         "dual_port_ram": 64,
         "single_port_ram": 32
     },

parmys/regression_test/benchmark/task/keywords/and/synthesis_result.json

@@ -95,21 +95,21 @@
         "test_name": "and/replicate_and_int_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "and/replicate_and_ultra_wide/no_arch": {
         "test_name": "and/replicate_and_ultra_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "and/replicate_and_wide/no_arch": {
         "test_name": "and/replicate_and_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "DEFAULT": {

parmys/regression_test/benchmark/task/keywords/else/synthesis_result.json

@@ -19,16 +19,16 @@
         "Average Path": 4,
         "Estimated LUTs": 4,
         "Total Node": 4,
-        "Wires": 9,
-        "Wire Bits": 9,
+        "Wires": 11,
+        "Wire Bits": 11,
         "Public Wires": 4,
         "Public Wire Bits": 4,
-        "Total Cells": 7,
+        "Total Cells": 9,
         "MUX": 1,
         "XOR": 2,
-        "OR": 1,
+        "OR": 2,
         "AND": 1,
-        "NOT": 2
+        "NOT": 3
     },
     "else/if_else/no_arch": {
         "test_name": "else/if_else/no_arch",

parmys/regression_test/benchmark/task/keywords/nand/synthesis_result.json

@@ -94,21 +94,21 @@
         "test_name": "nand/replicate_nand_int_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "nand/replicate_nand_ultra_wide/no_arch": {
         "test_name": "nand/replicate_nand_ultra_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "nand/replicate_nand_wide/no_arch": {
         "test_name": "nand/replicate_nand_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "DEFAULT": {

parmys/regression_test/benchmark/task/keywords/nor/synthesis_result.json

@@ -100,21 +100,21 @@
         "test_name": "nor/replicate_nor_int_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "nor/replicate_nor_ultra_wide/no_arch": {
         "test_name": "nor/replicate_nor_ultra_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "nor/replicate_nor_wide/no_arch": {
         "test_name": "nor/replicate_nor_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "DEFAULT": {

parmys/regression_test/benchmark/task/keywords/or/synthesis_result.json

@@ -95,21 +95,21 @@
         "test_name": "or/replicate_or_int_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "or/replicate_or_ultra_wide/no_arch": {
         "test_name": "or/replicate_or_ultra_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "or/replicate_or_wide/no_arch": {
         "test_name": "or/replicate_or_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "DEFAULT": {

parmys/regression_test/benchmark/task/keywords/xnor/synthesis_result.json

@@ -54,21 +54,21 @@
         "test_name": "xnor/replicate_xnor_int_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "xnor/replicate_xnor_ultra_wide/no_arch": {
         "test_name": "xnor/replicate_xnor_ultra_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "xnor/replicate_xnor_wide/no_arch": {
         "test_name": "xnor/replicate_xnor_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "xnor/xnor_indexed_port/no_arch": {

parmys/regression_test/benchmark/task/keywords/xor/synthesis_result.json

@@ -51,21 +51,21 @@
         "test_name": "xor/replicate_xor_int_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "xor/replicate_xor_ultra_wide/no_arch": {
         "test_name": "xor/replicate_xor_ultra_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "xor/replicate_xor_wide/no_arch": {
         "test_name": "xor/replicate_xor_wide/no_arch",
         "exit": 1,
         "errors": [
-            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686."
+            "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2754."
         ]
     },
     "xor/xor_indexed_port/no_arch": {