Add interposer tag parsing

This commit adds parsing logic for defining
interposer-based architectures.

Author: AmirhosseinPoolad

doc/src/arch/reference.rst

@@ -581,6 +581,32 @@ Grid Layout Example
 
     Example FPGA grid
 
+
+.. arch:tag:: <interposer_cut dim=x|y loc="int"/>
+
+    :req_param dim: Dimension or axis of the cut. 'X' or 'x' means a horizontal cut while 'Y' or 'y' means a vertical cut.
+    :req_param loc: Location of the cut. Currently only absolute positions are supported.
+
+    .. note:: Interposers are experimental and are currently not supported by VPR and using the related tags will not actually result in any changes to the flow.
+    Defines an interposer cut for modelling 2.5D interposer-based architectures. An interposer cut will cut all connections at location 'loc' along the axis 'dim' Leaving the two sides completely unconnected.
+    To reconnect the two sides, this tag can have multiple <interdie_wire> tags as children to specify the connection between the two sides.
+
+.. arch:tag:: <interdie_wire sg_name="string" sg_link="string" offset_start="int" offset_end="int" offset_increment="int" num="int"/>
+
+    :req_param sg_name: Name of the scatter-gather pattern to be used for the interdie connection.
+    :req_param sg_link: Name of the scatter-gather link to be used for the interdie connection.
+    :req_param offset_start: Starting point of scatter-gather instantiations.
+    :req_param offset_end: Ending point of scatter-gather instantiations
+    :req_param offset_increment: Increment/distance between scatter-gather instantiations.
+    :req_param num: Number of scatter-gather instantiations per switchblock location.
+
+    Defines the interdie wiring between the two sides of the cut. Connectivity is defined using scatter-gather patterns. Starting at 'offset_start' from location of the cut and moving by 'offset_increment' until we reach the location of 'offset_end' away from the cut, 'num' scatter-gather patterns defined by 'sg_name' and 'sg_link' will be instantiated.
+    Note that these offset points always define the starting point of the scatter-gather pattern's sg_link.
+
+    .. figure:: scatter_gather_images/interposer_diagram.png
+        
+        An example of how specifying interposers in VTR works. Connections between the two sides of a cut are first severed. The two sides are then reconnected using scatter_gather patterns. Note that there are 'num' of each pattern at each switchblock locations.
+
 .. _arch_device_info:
 
 FPGA Device Information

doc/src/arch/scatter_gather_images/interposer_diagram.png

@@ -0,0 +1,51 @@
+#pragma once
+
+/**
+ * @file interposer_types.h
+ * @brief This file contains types used for parsing interposer-related tags such as <interposer_cut> and <interdie_wire>
+ * and converting that information into the device architecture-related data structures.
+ * 
+ */
+
+#include <unordered_map>
+#include <vector>
+#include <string>
+
+/**
+ * @brief Enum for direction of an interposer cut. X means horizontal cut and Y means vertical cut.
+ * 
+ */
+enum class e_interposer_cut_dim {
+    X,
+    Y
+};
+
+// Lookup table for converting between a character and an e_interposer_cut_dim
+inline const std::unordered_map<char, e_interposer_cut_dim> CHAR_INTERPOSER_DIM_MAP = {
+    {'X', e_interposer_cut_dim::X},
+    {'x', e_interposer_cut_dim::X},
+    {'Y', e_interposer_cut_dim::Y},
+    {'y', e_interposer_cut_dim::Y}};
+
+/**
+ * @brief Struct containing information of interdire wires i.e. connections between the dies on an interposer
+ * 
+ */
+struct t_interdie_wire_inf {
+    std::string sg_name;  ///< Name of the scatter-gather pattern to be used for the interdie connection
+    std::string sg_link;  ///< Name of the scatter-gather link to be used for the interdie connection
+    int offset_start;     ///< Starting point of scatter-gather instantiations
+    int offset_end;       ///< Ending point of scatter-gather instantiations
+    int offset_increment; ///< Increment/distance between scatter-gather instantiations
+    int num;              ///< Number of scatter-gather instantiations per switchblock location
+};
+
+/**
+ * @brief Struct containing information of an interposer cut
+ * 
+ */
+struct t_interposer_cut_inf {
+    e_interposer_cut_dim dim;                        ///< Dimension or axis of interposer cut
+    int loc;                                         ///< Location of the cut on the grid
+    std::vector<t_interdie_wire_inf> interdie_wires; ///< Connectivity specification between the two sides of the cut
+};

libs/libarchfpga/src/interposer_types.h

@@ -36,6 +36,7 @@
 #include <limits>
 #include <unordered_set>
 
+#include "interposer_types.h"
 #include "vtr_ndmatrix.h"
 #include "vtr_bimap.h"
 #include "vtr_string_interning.h"
@@ -361,13 +362,14 @@ struct t_grid_loc_def {
                                      // that come from a common definition.
 };
 
-enum GridDefType {
+enum class GridDefType {
     AUTO,
     FIXED
 };
 
 struct t_layer_def {
-    std::vector<t_grid_loc_def> loc_defs; //The list of block location definitions for this layer specification
+    std::vector<t_grid_loc_def> loc_defs;              ///< List of block location definitions for this layer specification
+    std::vector<t_interposer_cut_inf> interposer_cuts; ///< List of interposer cuts in this layer
 };
 
 struct t_grid_def {

libs/libarchfpga/src/physical_types.h

@@ -35,19 +35,19 @@
  *			the two files are swapped on command line.
  *
  */
-
 #include <cstring>
 #include <map>
-#include <set>
 #include <string>
 #include <sstream>
 #include <algorithm>
+#include <unordered_set>
 
 #include "logic_types.h"
 #include "physical_types.h"
 #include "pugixml.hpp"
 #include "pugixml_util.hpp"
 
+#include "read_xml_arch_file_interposer.h"
 #include "read_xml_arch_file_vib.h"
 #include "vtr_assert.h"
 #include "vtr_log.h"
@@ -71,6 +71,8 @@
 #include "read_xml_arch_file_noc_tag.h"
 #include "read_xml_arch_file_sg.h"
 
+#include "interposer_types.h"
+
 using namespace std::string_literals;
 using pugiutil::ReqOpt;
 
@@ -2579,7 +2581,7 @@ static t_grid_def process_grid_layout(vtr::string_internment& strings,
     num_of_avail_layer = get_number_of_layers(layout_type_tag, loc_data);
     bool has_layer = layout_type_tag.child("layer");
 
-    //Determine the grid specification type
+    // Determine the grid specification type
     if (layout_type_tag.name() == std::string("auto_layout")) {
         expect_only_attributes(layout_type_tag, {"aspect_ratio"}, loc_data);
 
@@ -2597,7 +2599,7 @@ static t_grid_def process_grid_layout(vtr::string_internment& strings,
         std::string name = get_attribute(layout_type_tag, "name", loc_data).value();
 
         if (name == "auto") {
-            //We name <auto_layout> as 'auto', so don't allow a user to specify it
+            // We name <auto_layout> as 'auto', so don't allow a user to specify it
             archfpga_throw(loc_data.filename_c_str(), loc_data.line(layout_type_tag),
                            vtr::string_fmt("The name '%s' is reserved for auto-sized layouts; please choose another name", name.c_str()).c_str());
         }
@@ -2612,27 +2614,26 @@ static t_grid_def process_grid_layout(vtr::string_internment& strings,
 
     grid_def.layers.resize(num_of_avail_layer);
     arch->layer_global_routing.resize(num_of_avail_layer);
-    //No layer tag is specified (only one die is specified in the arch file)
-    //Need to process layout_type_tag children to get block types locations in the grid
+    // No layer tag is specified (only one die is specified in the arch file)
+    // Need to process layout_type_tag children to get block types locations in the grid
     if (has_layer) {
-        std::set<int> seen_die_numbers; //Check that die numbers in the specific layout tag are unique
-        //One or more than one layer tag is specified
-        auto layer_tag_specified = layout_type_tag.children("layer");
-        for (auto layer_child : layer_tag_specified) {
-            int die_number;
-            bool has_global_routing;
-            //More than one layer tag is specified, meaning that multi-die FPGA is specified in the arch file
-            //Need to process each <layer> tag children to get block types locations for each grid
-            die_number = get_attribute(layer_child, "die", loc_data).as_int(0);
-            has_global_routing = get_attribute(layer_child, "has_prog_routing", loc_data, ReqOpt::OPTIONAL).as_bool(true);
+        std::unordered_set<int> seen_die_numbers; //Check that die numbers in the specific layout tag are unique
+        for (pugi::xml_node layer_child : layout_type_tag.children("layer")) {
+
+            // More than one layer tag is specified, meaning that multi-die FPGA is specified in the arch file
+            // Need to process each <layer> tag children to get block types locations for each grid
+            int die_number = get_attribute(layer_child, "die", loc_data).as_int(0);
+            bool has_global_routing = get_attribute(layer_child, "has_prog_routing", loc_data, ReqOpt::OPTIONAL).as_bool(true);
             arch->layer_global_routing.at(die_number) = has_global_routing;
             VTR_ASSERT(die_number >= 0 && die_number < num_of_avail_layer);
-            auto insert_res = seen_die_numbers.insert(die_number);
-            VTR_ASSERT_MSG(insert_res.second, "Two different layers with a same die number may have been specified in the Architecture file");
+
+            // If the die number is not actually inserted in the seen_die_numbers set, it means that it's a duplicate
+            auto [_, did_insert_in_set] = seen_die_numbers.insert(die_number);
+            VTR_ASSERT_MSG(did_insert_in_set, "Two different layers with a same die number may have been specified in the Architecture file");
             process_block_type_locs(grid_def, die_number, strings, layer_child, loc_data);
         }
     } else {
-        //if only one die is available, then global routing resources must exist in that die
+        // If only one die is available, then global routing resources must exist in that die
         int die_number = 0;
         arch->layer_global_routing.at(die_number) = true;
         process_block_type_locs(grid_def, die_number, strings, layout_type_tag, loc_data);
@@ -2646,9 +2647,29 @@ static void process_block_type_locs(t_grid_def& grid_def,
                                     pugi::xml_node layout_block_type_tag,
                                     const pugiutil::loc_data& loc_data) {
     //Process all the block location specifications
-    for (auto loc_spec_tag : layout_block_type_tag.children()) {
-        auto loc_type = loc_spec_tag.name();
-        auto type_name = get_attribute(loc_spec_tag, "type", loc_data).value();
+    for (pugi::xml_node loc_spec_tag : layout_block_type_tag.children()) {
+        const char* loc_type = loc_spec_tag.name();
+
+        // There are multiple attributes that are shared by every other tag that interposer
+        // tags do not have. For this reason we check if loc_spec_tag is an interposer tag
+        // and switch code paths if it is.
+        if (loc_type == std::string("interposer_cut")) {
+            if (grid_def.grid_type == GridDefType::AUTO) {
+                archfpga_throw(loc_data.filename_c_str(), loc_data.line(loc_spec_tag), "Interposers are not currently supported for auto sized devices.");
+            }
+
+            t_interposer_cut_inf interposer_cut = parse_interposer_cut_tag(loc_spec_tag, loc_data);
+            
+            if ((interposer_cut.dim == e_interposer_cut_dim::X && interposer_cut.loc >= grid_def.height) || (interposer_cut.dim == e_interposer_cut_dim::Y && interposer_cut.loc >= grid_def.width)) {
+                archfpga_throw(loc_data.filename_c_str(), loc_data.line(loc_spec_tag), "Interposer cut dimensions are outside of device bounds");
+            }
+
+            grid_def.layers.at(die_number).interposer_cuts.push_back(interposer_cut);
+            continue;
+        }
+
+        // Continue parsing for non-interposer tags
+        const char* type_name = get_attribute(loc_spec_tag, "type", loc_data).value();
         int priority = get_attribute(loc_spec_tag, "priority", loc_data).as_int();
         t_metadata_dict meta = process_meta_data(strings, loc_spec_tag, loc_data);
 

libs/libarchfpga/src/read_xml_arch_file.cpp

@@ -0,0 +1,44 @@
+#include "read_xml_arch_file_interposer.h"
+#include <vector>
+#include "interposer_types.h"
+#include "read_xml_util.h"
+#include "pugixml_util.hpp"
+#include "arch_error.h"
+
+t_interposer_cut_inf parse_interposer_cut_tag(pugi::xml_node interposer_cut_tag, const pugiutil::loc_data& loc_data) {
+    t_interposer_cut_inf interposer;
+
+    pugiutil::expect_only_attributes(interposer_cut_tag, {"dim", "loc"}, loc_data);
+
+    std::string interposer_dim = pugiutil::get_attribute(interposer_cut_tag, "dim", loc_data).as_string();
+    if (interposer_dim.size() != 1 || !CHAR_INTERPOSER_DIM_MAP.contains(interposer_dim[0])) {
+        archfpga_throw(loc_data.filename_c_str(), loc_data.line(interposer_cut_tag), "Interposer tag dimension must be a single character of either X, x, Y or y.");
+    }
+
+    interposer.dim = CHAR_INTERPOSER_DIM_MAP.at(interposer_dim[0]);
+
+    interposer.loc = pugiutil::get_attribute(interposer_cut_tag, "loc", loc_data).as_int();
+    if (interposer.loc < 0) {
+        archfpga_throw(loc_data.filename_c_str(), loc_data.line(interposer_cut_tag), "Interposer location must be positive.");
+    }
+
+    pugiutil::expect_only_children(interposer_cut_tag, {"interdie_wire"}, loc_data);
+
+    for (pugi::xml_node interdie_wire_tag : interposer_cut_tag.children()) {
+        const std::vector<std::string> interdie_wire_attributes = {{"sg", "sg_link", "offset_start", "offset_end", "offset_increment", "num"}};
+        pugiutil::expect_only_attributes(interdie_wire_tag, interdie_wire_attributes, loc_data);
+
+        t_interdie_wire_inf interdie_wire;
+
+        interdie_wire.sg_name = pugiutil::get_attribute(interdie_wire_tag, "sg_name", loc_data).as_string();
+        interdie_wire.sg_link = pugiutil::get_attribute(interdie_wire_tag, "sg_link", loc_data).as_string();
+        interdie_wire.offset_start = pugiutil::get_attribute(interdie_wire_tag, "offset_start", loc_data).as_int();
+        interdie_wire.offset_end = pugiutil::get_attribute(interdie_wire_tag, "offset_end", loc_data).as_int();
+        interdie_wire.offset_increment = pugiutil::get_attribute(interdie_wire_tag, "offset_increment", loc_data).as_int();
+        interdie_wire.num = pugiutil::get_attribute(interdie_wire_tag, "num", loc_data).as_int();
+
+        interposer.interdie_wires.push_back(interdie_wire);
+    }
+
+    return interposer;
+}

libs/libarchfpga/src/read_xml_arch_file_interposer.cpp

@@ -0,0 +1,19 @@
+#pragma once
+
+/**
+ * @file read_xml_arch_file_interposer.h
+ * @brief This file contains functions related to parsing and processing interposer tags in the architecture file
+ * 
+ */
+
+#include "interposer_types.h"
+#include "read_xml_util.h"
+
+/**
+ * @brief Parse an <interposer_cut> tag and its children
+ * 
+ * @param interposer_cut_tag xml_node pointing to the <interposer_cut> tag
+ * @param loc_data Points to the location in the architecture file where the parser is reading. Used for priting error messages.
+ * @return t_interposer_cut_inf with parsed information of the <interposer_cut> tag
+ */
+t_interposer_cut_inf parse_interposer_cut_tag(pugi::xml_node interposer_cut_tag, const pugiutil::loc_data& loc_data);