Rename t_rr_node_storage to t_rr_graph_storage.

Signed-off-by: Keith Rothman <[email protected]>

Author: litghost

vpr/src/base/vpr_context.h

@@ -9,7 +9,7 @@
 #include "vtr_vector.h"
 #include "atom_netlist.h"
 #include "clustered_netlist.h"
-#include "rr_node_storage.h"
+#include "rr_graph_storage.h"
 #include "rr_node.h"
 #include "tatum/TimingGraph.hpp"
 #include "tatum/TimingConstraints.hpp"
@@ -146,7 +146,7 @@ struct DeviceContext : public Context {
     t_chan_width chan_width;
 
     /* Structures to define the routing architecture of the FPGA.           */
-    t_rr_node_storage rr_nodes; /* autogenerated in build_rr_graph */
+    t_rr_graph_storage rr_nodes; /* autogenerated in build_rr_graph */
 
     std::vector<t_rr_indexed_data> rr_indexed_data; /* [0 .. num_rr_indexed_data-1] */
 

vpr/src/route/clock_network_builders.cpp

@@ -61,7 +61,7 @@ void ClockNetwork::set_num_instance(int num_inst) {
  */
 
 void ClockNetwork::create_rr_nodes_for_clock_network_wires(ClockRRGraphBuilder& clock_graph,
-                                                           t_rr_node_storage* rr_nodes,
+                                                           t_rr_graph_storage* rr_nodes,
                                                            t_rr_edge_info_set* rr_edges_to_create,
                                                            int num_segments) {
     for (int inst_num = 0; inst_num < get_num_inst(); inst_num++) {
@@ -215,7 +215,7 @@ size_t ClockRib::estimate_additional_nodes(const DeviceGrid& grid) {
 }
 
 void ClockRib::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph,
-                                                                   t_rr_node_storage* rr_nodes,
+                                                                   t_rr_graph_storage* rr_nodes,
                                                                    t_rr_edge_info_set* rr_edges_to_create,
                                                                    int num_segments) {
     // Only chany wires need to know the number of segments inorder
@@ -307,7 +307,7 @@ int ClockRib::create_chanx_wire(int x_start,
                                 int y,
                                 int ptc_num,
                                 e_direction direction,
-                                t_rr_node_storage* rr_nodes) {
+                                t_rr_graph_storage* rr_nodes) {
     rr_nodes->emplace_back();
     auto node_index = rr_nodes->size() - 1;
     auto node = rr_nodes->back();
@@ -502,7 +502,7 @@ size_t ClockSpine::estimate_additional_nodes(const DeviceGrid& grid) {
 }
 
 void ClockSpine::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph,
-                                                                     t_rr_node_storage* rr_nodes,
+                                                                     t_rr_graph_storage* rr_nodes,
                                                                      t_rr_edge_info_set* rr_edges_to_create,
                                                                      int num_segments) {
     auto& grid = clock_graph.grid();
@@ -596,7 +596,7 @@ int ClockSpine::create_chany_wire(int y_start,
                                   int x,
                                   int ptc_num,
                                   e_direction direction,
-                                  t_rr_node_storage* rr_nodes,
+                                  t_rr_graph_storage* rr_nodes,
                                   int num_segments) {
     rr_nodes->emplace_back();
     auto node_index = rr_nodes->size() - 1;
@@ -662,7 +662,7 @@ size_t ClockHTree::estimate_additional_nodes(const DeviceGrid& /*grid*/) {
 }
 
 void ClockHTree::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph,
-                                                                     t_rr_node_storage* rr_nodes,
+                                                                     t_rr_graph_storage* rr_nodes,
                                                                      t_rr_edge_info_set* rr_edges_to_create,
                                                                      int num_segments) {
     //Remove unused parameter warning

vpr/src/route/clock_network_builders.h

@@ -11,7 +11,7 @@
 #include "rr_graph2.h"
 #include "rr_graph_clock.h"
 
-class t_rr_node_storage;
+class t_rr_graph_storage;
 class ClockRRGraphBuilder;
 
 enum class ClockType {
@@ -103,13 +103,13 @@ class ClockNetwork {
     /* Creates the RR nodes for the clock network wires and adds them to the reverse lookup
      * in ClockRRGraphBuilder. The reverse lookup maps the nodes to their switch point locations */
     void create_rr_nodes_for_clock_network_wires(ClockRRGraphBuilder& clock_graph,
-                                                 t_rr_node_storage* rr_nodes,
+                                                 t_rr_graph_storage* rr_nodes,
                                                  t_rr_edge_info_set* rr_edges_to_create,
                                                  int num_segments);
     virtual void create_segments(std::vector<t_segment_inf>& segment_inf) = 0;
     virtual void create_rr_nodes_and_internal_edges_for_one_instance(
         ClockRRGraphBuilder& clock_graph,
-        t_rr_node_storage* rr_nodes,
+        t_rr_graph_storage* rr_nodes,
         t_rr_edge_info_set* rr_edges_to_create,
         int num_segments)
         = 0;
@@ -164,7 +164,7 @@ class ClockRib : public ClockNetwork {
      */
     void create_segments(std::vector<t_segment_inf>& segment_inf) override;
     void create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph,
-                                                             t_rr_node_storage* rr_nodes,
+                                                             t_rr_graph_storage* rr_nodes,
                                                              t_rr_edge_info_set* rr_edges_to_create,
                                                              int num_segments) override;
     size_t estimate_additional_nodes(const DeviceGrid& grid) override;
@@ -173,7 +173,7 @@ class ClockRib : public ClockNetwork {
                           int y,
                           int ptc_num,
                           e_direction direction,
-                          t_rr_node_storage* rr_nodes);
+                          t_rr_graph_storage* rr_nodes);
     void record_tap_locations(unsigned x_start,
                               unsigned x_end,
                               unsigned y,
@@ -223,7 +223,7 @@ class ClockSpine : public ClockNetwork {
      */
     void create_segments(std::vector<t_segment_inf>& segment_inf) override;
     void create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph,
-                                                             t_rr_node_storage* rr_nodes,
+                                                             t_rr_graph_storage* rr_nodes,
                                                              t_rr_edge_info_set* rr_edges_to_create,
                                                              int num_segments) override;
     size_t estimate_additional_nodes(const DeviceGrid& grid) override;
@@ -232,7 +232,7 @@ class ClockSpine : public ClockNetwork {
                           int x,
                           int ptc_num,
                           e_direction direction,
-                          t_rr_node_storage* rr_nodes,
+                          t_rr_graph_storage* rr_nodes,
                           int num_segments);
     void record_tap_locations(unsigned y_start,
                               unsigned y_end,
@@ -258,7 +258,7 @@ class ClockHTree : private ClockNetwork {
     // TODO: Unimplemented member function
     void create_segments(std::vector<t_segment_inf>& segment_inf) override;
     void create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph,
-                                                             t_rr_node_storage* rr_nodes,
+                                                             t_rr_graph_storage* rr_nodes,
                                                              t_rr_edge_info_set* rr_edges_to_create,
                                                              int num_segments) override;
     size_t estimate_additional_nodes(const DeviceGrid& grid) override;

vpr/src/route/rr_graph.cpp

@@ -103,7 +103,7 @@ static void build_bidir_rr_opins(const int i,
                                  const int j,
                                  const e_side side,
                                  const t_rr_node_indices& L_rr_node_indices,
-                                 const t_rr_node_storage& rr_nodes,
+                                 const t_rr_graph_storage& rr_nodes,
                                  const t_pin_to_track_lookup& opin_to_track_map,
                                  const std::vector<vtr::Matrix<int>>& Fc_out,
                                  t_rr_edge_info_set& created_rr_edges,
@@ -128,7 +128,7 @@ static void build_unidir_rr_opins(const int i,
                                   t_rr_edge_info_set& created_rr_edges,
                                   bool* Fc_clipped,
                                   const t_rr_node_indices& L_rr_node_indices,
-                                  const t_rr_node_storage& rr_nodes,
+                                  const t_rr_graph_storage& rr_nodes,
                                   const t_direct_inf* directs,
                                   const int num_directs,
                                   const t_clb_to_clb_directs* clb_to_clb_directs,
@@ -141,12 +141,12 @@ static int get_opin_direct_connecions(int x,
                                       int from_rr_node,
                                       t_rr_edge_info_set& rr_edges_to_create,
                                       const t_rr_node_indices& L_rr_node_indices,
-                                      const t_rr_node_storage& rr_nodes,
+                                      const t_rr_graph_storage& rr_nodes,
                                       const t_direct_inf* directs,
                                       const int num_directs,
                                       const t_clb_to_clb_directs* clb_to_clb_directs);
 
-static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(t_rr_node_storage& L_rr_node,
+static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(t_rr_graph_storage& L_rr_node,
                                                                   const int num_seg_types,
                                                                   const t_chan_details& chan_details_x,
                                                                   const t_chan_details& chan_details_y,
@@ -207,7 +207,7 @@ static std::vector<std::vector<bool>> alloc_and_load_perturb_ipins(const int L_n
 
 static void build_rr_sinks_sources(const int i,
                                    const int j,
-                                   t_rr_node_storage& L_rr_node,
+                                   t_rr_graph_storage& L_rr_node,
                                    t_rr_edge_info_set& rr_edges_to_create,
                                    const t_rr_node_indices& L_rr_node_indices,
                                    const int delayless_switch,
@@ -229,13 +229,13 @@ static void build_rr_chan(const int i,
                           const t_chan_details& chan_details_y,
                           const t_rr_node_indices& L_rr_node_indices,
                           t_rr_edge_info_set& created_rr_edges,
-                          t_rr_node_storage& L_rr_node,
+                          t_rr_graph_storage& L_rr_node,
                           const int wire_to_ipin_switch,
                           const enum e_directionality directionality);
 
 void uniquify_edges(t_rr_edge_info_set& rr_edges_to_create);
 
-void alloc_and_load_edges(t_rr_node_storage& L_rr_node,
+void alloc_and_load_edges(t_rr_graph_storage& L_rr_node,
                           const t_rr_edge_info_set& rr_edges_to_create);
 
 static void alloc_and_load_rr_switch_inf(const int num_arch_switches,
@@ -273,7 +273,7 @@ static std::vector<vtr::Matrix<int>> alloc_and_load_actual_fc(const std::vector<
                                                               const enum e_directionality directionality,
                                                               bool* Fc_clipped);
 
-static int pick_best_direct_connect_target_rr_node(const t_rr_node_storage& rr_nodes,
+static int pick_best_direct_connect_target_rr_node(const t_rr_graph_storage& rr_nodes,
                                                    int from_rr,
                                                    const std::vector<int>& candidate_rr_nodes);
 
@@ -1132,7 +1132,7 @@ static void free_type_track_to_pin_map(t_track_to_pin_lookup& track_to_pin_map,
 
 /* Does the actual work of allocating the rr_graph and filling all the *
  * appropriate values.  Everything up to this was just a prelude!      */
-static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(t_rr_node_storage& L_rr_node,
+static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(t_rr_graph_storage& L_rr_node,
                                                                   const int num_seg_types,
                                                                   const t_chan_details& chan_details_x,
                                                                   const t_chan_details& chan_details_y,
@@ -1280,7 +1280,7 @@ static void build_bidir_rr_opins(const int i,
                                  const int j,
                                  const e_side side,
                                  const t_rr_node_indices& L_rr_node_indices,
-                                 const t_rr_node_storage& rr_nodes,
+                                 const t_rr_graph_storage& rr_nodes,
                                  const t_pin_to_track_lookup& opin_to_track_map,
                                  const std::vector<vtr::Matrix<int>>& Fc_out,
                                  t_rr_edge_info_set& rr_edges_to_create,
@@ -1373,7 +1373,7 @@ void free_rr_graph() {
 
 static void build_rr_sinks_sources(const int i,
                                    const int j,
-                                   t_rr_node_storage& L_rr_node,
+                                   t_rr_graph_storage& L_rr_node,
                                    t_rr_edge_info_set& rr_edges_to_create,
                                    const t_rr_node_indices& L_rr_node_indices,
                                    const int delayless_switch,
@@ -1517,7 +1517,7 @@ static void build_rr_chan(const int x_coord,
                           const t_chan_details& chan_details_y,
                           const t_rr_node_indices& L_rr_node_indices,
                           t_rr_edge_info_set& rr_edges_to_create,
-                          t_rr_node_storage& L_rr_node,
+                          t_rr_graph_storage& L_rr_node,
                           const int wire_to_ipin_switch,
                           const enum e_directionality directionality) {
     /* this function builds both x and y-directed channel segments, so set up our
@@ -1680,7 +1680,7 @@ void uniquify_edges(t_rr_edge_info_set& rr_edges_to_create) {
     rr_edges_to_create.erase(std::unique(rr_edges_to_create.begin(), rr_edges_to_create.end()), rr_edges_to_create.end());
 }
 
-void alloc_and_load_edges(t_rr_node_storage& L_rr_node,
+void alloc_and_load_edges(t_rr_graph_storage& L_rr_node,
                           const t_rr_edge_info_set& rr_edges_to_create) {
     L_rr_node.alloc_and_load_edges(&rr_edges_to_create);
 }
@@ -2469,7 +2469,7 @@ std::string describe_rr_node(int inode) {
 
     return msg;
 }
-static void build_unidir_rr_opins(const int i, const int j, const e_side side, const DeviceGrid& grid, const std::vector<vtr::Matrix<int>>& Fc_out, const int max_chan_width, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, vtr::NdMatrix<int, 3>& Fc_xofs, vtr::NdMatrix<int, 3>& Fc_yofs, t_rr_edge_info_set& rr_edges_to_create, bool* Fc_clipped, const t_rr_node_indices& L_rr_node_indices, const t_rr_node_storage& rr_nodes, const t_direct_inf* directs, const int num_directs, const t_clb_to_clb_directs* clb_to_clb_directs, const int num_seg_types) {
+static void build_unidir_rr_opins(const int i, const int j, const e_side side, const DeviceGrid& grid, const std::vector<vtr::Matrix<int>>& Fc_out, const int max_chan_width, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, vtr::NdMatrix<int, 3>& Fc_xofs, vtr::NdMatrix<int, 3>& Fc_yofs, t_rr_edge_info_set& rr_edges_to_create, bool* Fc_clipped, const t_rr_node_indices& L_rr_node_indices, const t_rr_graph_storage& rr_nodes, const t_direct_inf* directs, const int num_directs, const t_clb_to_clb_directs* clb_to_clb_directs, const int num_seg_types) {
     /*
      * This routine adds the edges from opins to channels at the specified
      * grid location (i,j) and grid tile side
@@ -2704,7 +2704,7 @@ static int get_opin_direct_connecions(int x,
                                       int from_rr_node,
                                       t_rr_edge_info_set& rr_edges_to_create,
                                       const t_rr_node_indices& L_rr_node_indices,
-                                      const t_rr_node_storage& rr_nodes,
+                                      const t_rr_graph_storage& rr_nodes,
                                       const t_direct_inf* directs,
                                       const int num_directs,
                                       const t_clb_to_clb_directs* clb_to_clb_directs) {
@@ -2916,7 +2916,7 @@ static std::vector<bool> alloc_and_load_perturb_opins(const t_physical_tile_type
     return perturb_opins;
 }
 
-static int pick_best_direct_connect_target_rr_node(const t_rr_node_storage& rr_nodes,
+static int pick_best_direct_connect_target_rr_node(const t_rr_graph_storage& rr_nodes,
                                                    int from_rr,
                                                    const std::vector<int>& candidate_rr_nodes) {
     //With physically equivalent pins there may be multiple candidate rr nodes (which are equivalent)

vpr/src/route/rr_graph.h

@@ -45,8 +45,6 @@ void free_rr_graph();
 //Returns a brief one-line summary of an RR node
 std::string describe_rr_node(int inode);
 
-class t_rr_node_storage;
-
 // Sets the spec for the rr_switch based on the arch switch
 void load_rr_switch_from_arch_switch(int arch_switch_idx,
                                      int rr_switch_idx,

vpr/src/route/rr_graph_clock.h

@@ -15,7 +15,7 @@
 
 class ClockNetwork;
 class ClockConnection;
-class t_rr_node_storage;
+class t_rr_graph_storage;
 
 class SwitchPoint {
     /* A switch point object: keeps information on the location and and rr_node indices
@@ -77,7 +77,7 @@ class ClockRRGraphBuilder {
     ClockRRGraphBuilder(
         const t_chan_width& chan_width,
         const DeviceGrid& grid,
-        t_rr_node_storage* rr_nodes)
+        t_rr_graph_storage* rr_nodes)
         : chan_width_(chan_width)
         , grid_(grid)
         , rr_nodes_(rr_nodes)
@@ -133,7 +133,7 @@ class ClockRRGraphBuilder {
 
     const t_chan_width& chan_width_;
     const DeviceGrid& grid_;
-    t_rr_node_storage* rr_nodes_;
+    t_rr_graph_storage* rr_nodes_;
 
     int chanx_ptc_idx_;
     int chany_ptc_idx_;