2020/* ******************* Subroutines local to this module **********************/
2121static void check_node_and_range (int inode, enum e_route_type route_type);
2222static void check_source (int inode, ClusterNetId net_id);
23- static void check_sink (int inode, ClusterNetId net_id, std::set<vtr::StrongId<cluster_pin_id_tag>>& pin_done);
23+ static void check_sink (int inode, int net_pin_index, ClusterNetId net_id, bool * pin_done);
2424static void check_switch (t_trace* tptr, int num_switch);
2525static bool check_adjacent (int from_node, int to_node);
2626static int chanx_chany_adjacent (int chanx_node, int chany_node);
@@ -46,7 +46,8 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
4646 return ;
4747 }
4848
49- int max_pins, inode, prev_node;
49+ int max_pins, inode, net_pin_index, prev_node;
50+ unsigned int ipin;
5051 bool valid, connects;
5152 t_trace* tptr;
5253
@@ -79,13 +80,15 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
7980 for (auto net_id : cluster_ctx.clb_nlist .nets ())
8081 max_pins = std::max (max_pins, (int )cluster_ctx.clb_nlist .net_pins (net_id).size ());
8182
82- std::set<vtr::StrongId<cluster_pin_id_tag>> pin_done ;
83+ auto pin_done = std::make_unique< bool []>(max_pins) ;
8384
8485 /* Now check that all nets are indeed connected. */
8586 for (auto net_id : cluster_ctx.clb_nlist .nets ()) {
8687 if (cluster_ctx.clb_nlist .net_is_ignored (net_id) || cluster_ctx.clb_nlist .net_sinks (net_id).size () == 0 ) /* Skip ignored nets. */
8788 continue ;
8889
90+ std::fill_n (pin_done.get (), cluster_ctx.clb_nlist .net_pins (net_id).size (), false );
91+
8992 /* Check the SOURCE of the net. */
9093 tptr = route_ctx.trace [net_id].head ;
9194 if (tptr == nullptr ) {
@@ -99,8 +102,7 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
99102 connected_to_route[inode] = true ; /* Mark as in path. */
100103
101104 check_source (inode, net_id);
102- auto first_net_id = cluster_ctx.clb_nlist .net_pins (net_id).begin ();
103- pin_done.insert (*first_net_id); /* Insert the source */
105+ pin_done[0 ] = true ;
104106
105107 prev_node = inode;
106108 int prev_switch = tptr->iswitch ;
@@ -110,6 +112,7 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
110112 size_t num_sinks = 0 ;
111113 while (tptr != nullptr ) {
112114 inode = tptr->index ;
115+ net_pin_index = tptr->net_pin_index ;
113116 check_node_and_range (inode, route_type);
114117 check_switch (tptr, num_switches);
115118
@@ -133,7 +136,7 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
133136 connected_to_route[inode] = true ; /* Mark as in path. */
134137
135138 if (device_ctx.rr_nodes [inode].type () == SINK) {
136- check_sink (inode, net_id, pin_done);
139+ check_sink (inode, net_pin_index, net_id, pin_done. get () );
137140 num_sinks += 1 ;
138141 }
139142
@@ -150,11 +153,10 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
150153 num_sinks, cluster_ctx.clb_nlist .net_sinks (net_id).size ());
151154 }
152155
153- for (auto pin_id : cluster_ctx.clb_nlist .net_pins (net_id)) {
154- if (pin_done.find (pin_id) == pin_done.end ()) {
155- int net_pin_index = tile_pin_index (pin_id);
156+ for (ipin = 0 ; ipin < cluster_ctx.clb_nlist .net_pins (net_id).size (); ipin++) {
157+ if (pin_done[ipin] == false ) {
156158 VPR_FATAL_ERROR (VPR_ERROR_ROUTE,
157- " in check_route: net %zu does not connect to pin %d.\n " , size_t (net_id), net_pin_index );
159+ " in check_route: net %zu does not connect to pin %d.\n " , size_t (net_id), ipin );
158160 }
159161 }
160162
@@ -176,46 +178,22 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
176178
177179/* Checks that this SINK node is one of the terminals of inet, and marks *
178180 * the appropriate pin as being reached. */
179- static void check_sink (int inode, ClusterNetId net_id, std::set<vtr::StrongId<cluster_pin_id_tag>>& pin_done) {
181+ static void check_sink (int inode, int net_pin_index, ClusterNetId net_id, bool * pin_done) {
180182 auto & device_ctx = g_vpr_ctx.device ();
181183 auto & cluster_ctx = g_vpr_ctx.clustering ();
182- auto & place_ctx = g_vpr_ctx.placement ();
183184
184185 VTR_ASSERT (device_ctx.rr_nodes [inode].type () == SINK);
185- int i = device_ctx.rr_nodes [inode].xlow ();
186- int j = device_ctx.rr_nodes [inode].ylow ();
187- auto type = device_ctx.grid [i][j].type ;
188- /* For sinks, ptc_num is the class */
189- int ptc_num = device_ctx.rr_nodes [inode].ptc_num ();
190- int ifound = 0 ;
191-
192- for (auto bnum : place_ctx.grid_blocks [i][j].blocks ) {
193- for (auto pin_id : cluster_ctx.clb_nlist .net_sinks (net_id)) {
194- if (cluster_ctx.clb_nlist .pin_block (pin_id) == bnum) {
195- int pin_index = tile_pin_index (pin_id);
196- int iclass = type->pin_class [pin_index];
197- if (iclass == ptc_num) {
198- /* Could connect to same pin class on the same clb more than once. Only *
199- * update pin_done for a pin that hasn't been reached yet. */
200- if (pin_done.find (pin_id) == pin_done.end ()) {
201- ifound++;
202- pin_done.insert (pin_id);
203- break ;
204- }
205- }
206- }
207- }
208- }
209-
210- VTR_ASSERT (ifound <= 1 );
211186
212- if (ifound < 1 ) {
187+ if (net_pin_index == OPEN ) { /* If there is no legal net pin index associated with this sink node */
213188 VPR_FATAL_ERROR (VPR_ERROR_ROUTE,
214189 " in check_sink: node %d does not connect to any terminal of net %s #%lu.\n "
215190 " This error is usually caused by incorrectly specified logical equivalence in your architecture file.\n "
216191 " You should try to respecify what pins are equivalent or turn logical equivalence off.\n " ,
217192 inode, cluster_ctx.clb_nlist .net_name (net_id).c_str (), size_t (net_id));
218193 }
194+
195+ VTR_ASSERT (!pin_done[net_pin_index]); /* Should not have found a routed cnnection to it before */
196+ pin_done[net_pin_index] = true ;
219197}
220198
221199/* Checks that the node passed in is a valid source for this net. */
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