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11 | 11 | * @{
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12 | 12 | */
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13 | 13 |
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14 |
| -#define SAM_PINMUX_PORT_a 0U |
15 |
| -#define SAM_PINMUX_PORT_b 1U |
16 |
| -#define SAM_PINMUX_PORT_c 2U |
17 |
| -#define SAM_PINMUX_PORT_d 3U |
18 |
| -#define SAM_PINMUX_PORT_e 4U |
19 |
| -#define SAM_PINMUX_PORT_f 5U |
20 |
| -#define SAM_PINMUX_PORT_g 6U |
21 |
| -#define SAM_PINMUX_PORT_h 7U |
22 |
| -#define SAM_PINMUX_PORT_i 8U |
23 |
| -#define SAM_PINMUX_PORT_j 9U |
24 |
| -#define SAM_PINMUX_PORT_k 10U |
25 |
| -#define SAM_PINMUX_PORT_l 11U |
26 |
| -#define SAM_PINMUX_PORT_m 12U |
27 |
| -#define SAM_PINMUX_PORT_n 13U |
28 |
| -#define SAM_PINMUX_PORT_o 14U |
29 |
| -#define SAM_PINMUX_PORT_p 15U |
| 14 | +#define SAM_PINMUX_PORT_a 0U |
| 15 | +#define SAM_PINMUX_PORT_b 1U |
| 16 | +#define SAM_PINMUX_PORT_c 2U |
| 17 | +#define SAM_PINMUX_PORT_d 3U |
| 18 | +#define SAM_PINMUX_PORT_e 4U |
| 19 | +#define SAM_PINMUX_PORT_f 5U |
| 20 | +#define SAM_PINMUX_PORT_g 6U |
| 21 | +#define SAM_PINMUX_PORT_h 7U |
| 22 | +#define SAM_PINMUX_PORT_i 8U |
| 23 | +#define SAM_PINMUX_PORT_j 9U |
| 24 | +#define SAM_PINMUX_PORT_k 10U |
| 25 | +#define SAM_PINMUX_PORT_l 11U |
| 26 | +#define SAM_PINMUX_PORT_m 12U |
| 27 | +#define SAM_PINMUX_PORT_n 13U |
| 28 | +#define SAM_PINMUX_PORT_o 14U |
| 29 | +#define SAM_PINMUX_PORT_p 15U |
30 | 30 |
|
31 | 31 | /** @} */
|
32 | 32 |
|
|
36 | 36 | */
|
37 | 37 |
|
38 | 38 | /** GPIO */
|
39 |
| -#define SAM_PINMUX_PERIPH_gpio 0U |
| 39 | +#define SAM_PINMUX_PERIPH_gpio 0U |
40 | 40 | /** Peripherals */
|
41 |
| -#define SAM_PINMUX_PERIPH_a 0U |
42 |
| -#define SAM_PINMUX_PERIPH_b 1U |
43 |
| -#define SAM_PINMUX_PERIPH_c 2U |
44 |
| -#define SAM_PINMUX_PERIPH_d 3U |
45 |
| -#define SAM_PINMUX_PERIPH_e 4U |
46 |
| -#define SAM_PINMUX_PERIPH_f 5U |
47 |
| -#define SAM_PINMUX_PERIPH_g 6U |
48 |
| -#define SAM_PINMUX_PERIPH_h 7U |
49 |
| -#define SAM_PINMUX_PERIPH_i 8U |
50 |
| -#define SAM_PINMUX_PERIPH_j 9U |
51 |
| -#define SAM_PINMUX_PERIPH_k 10U |
52 |
| -#define SAM_PINMUX_PERIPH_l 11U |
53 |
| -#define SAM_PINMUX_PERIPH_m 12U |
54 |
| -#define SAM_PINMUX_PERIPH_n 13U |
| 41 | +#define SAM_PINMUX_PERIPH_a 0U |
| 42 | +#define SAM_PINMUX_PERIPH_b 1U |
| 43 | +#define SAM_PINMUX_PERIPH_c 2U |
| 44 | +#define SAM_PINMUX_PERIPH_d 3U |
| 45 | +#define SAM_PINMUX_PERIPH_e 4U |
| 46 | +#define SAM_PINMUX_PERIPH_f 5U |
| 47 | +#define SAM_PINMUX_PERIPH_g 6U |
| 48 | +#define SAM_PINMUX_PERIPH_h 7U |
| 49 | +#define SAM_PINMUX_PERIPH_i 8U |
| 50 | +#define SAM_PINMUX_PERIPH_j 9U |
| 51 | +#define SAM_PINMUX_PERIPH_k 10U |
| 52 | +#define SAM_PINMUX_PERIPH_l 11U |
| 53 | +#define SAM_PINMUX_PERIPH_m 12U |
| 54 | +#define SAM_PINMUX_PERIPH_n 13U |
55 | 55 | /** Extra */
|
56 |
| -#define SAM_PINMUX_PERIPH_x 0U |
| 56 | +#define SAM_PINMUX_PERIPH_x 0U |
57 | 57 | /** System */
|
58 |
| -#define SAM_PINMUX_PERIPH_s 0U |
| 58 | +#define SAM_PINMUX_PERIPH_s 0U |
59 | 59 | /** LPM */
|
60 |
| -#define SAM_PINMUX_PERIPH_lpm 0U |
61 |
| - |
| 60 | +#define SAM_PINMUX_PERIPH_lpm 0U |
| 61 | +/** Wake-up pin sources */ |
| 62 | +#define SAM_PINMUX_PERIPH_wkup0 0U |
| 63 | +#define SAM_PINMUX_PERIPH_wkup1 1U |
| 64 | +#define SAM_PINMUX_PERIPH_wkup2 2U |
| 65 | +#define SAM_PINMUX_PERIPH_wkup3 3U |
| 66 | +#define SAM_PINMUX_PERIPH_wkup4 4U |
| 67 | +#define SAM_PINMUX_PERIPH_wkup5 5U |
| 68 | +#define SAM_PINMUX_PERIPH_wkup6 6U |
| 69 | +#define SAM_PINMUX_PERIPH_wkup7 7U |
| 70 | +#define SAM_PINMUX_PERIPH_wkup8 8U |
| 71 | +#define SAM_PINMUX_PERIPH_wkup9 9U |
| 72 | +#define SAM_PINMUX_PERIPH_wkup10 10U |
| 73 | +#define SAM_PINMUX_PERIPH_wkup11 11U |
| 74 | +#define SAM_PINMUX_PERIPH_wkup12 12U |
| 75 | +#define SAM_PINMUX_PERIPH_wkup13 13U |
| 76 | +#define SAM_PINMUX_PERIPH_wkup14 14U |
| 77 | +#define SAM_PINMUX_PERIPH_wkup15 15U |
62 | 78 | /** @} */
|
63 | 79 |
|
64 | 80 | /**
|
|
67 | 83 | */
|
68 | 84 |
|
69 | 85 | /** Selects pin to be used as GPIO */
|
70 |
| -#define SAM_PINMUX_FUNC_gpio 0U |
| 86 | +#define SAM_PINMUX_FUNC_gpio 0U |
71 | 87 | /** Selects pin to be used as by some peripheral */
|
72 |
| -#define SAM_PINMUX_FUNC_periph 1U |
| 88 | +#define SAM_PINMUX_FUNC_periph 1U |
73 | 89 | /** Selects pin to be used as extra function */
|
74 |
| -#define SAM_PINMUX_FUNC_extra 2U |
| 90 | +#define SAM_PINMUX_FUNC_extra 2U |
75 | 91 | /** Selects pin to be used as system function */
|
76 |
| -#define SAM_PINMUX_FUNC_system 3U |
| 92 | +#define SAM_PINMUX_FUNC_system 3U |
77 | 93 | /** Selects and configure pin to be used in Low Power Mode */
|
78 |
| -#define SAM_PINMUX_FUNC_lpm 4U |
| 94 | +#define SAM_PINMUX_FUNC_lpm 4U |
| 95 | +/** Selects and configure wake-up pin sources Low Power Mode */ |
| 96 | +#define SAM_PINMUX_FUNC_wakeup 5U |
79 | 97 |
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80 | 98 | /** @} */
|
81 | 99 |
|
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85 | 103 | */
|
86 | 104 |
|
87 | 105 | /** Pinmux bit field position. */
|
88 |
| -#define SAM_PINCTRL_PINMUX_POS (16U) |
| 106 | +#define SAM_PINCTRL_PINMUX_POS (16U) |
89 | 107 | /** Pinmux bit field mask. */
|
90 |
| -#define SAM_PINCTRL_PINMUX_MASK (0xFFFF) |
| 108 | +#define SAM_PINCTRL_PINMUX_MASK (0xFFFF) |
91 | 109 |
|
92 | 110 | /** Port field mask. */
|
93 |
| -#define SAM_PINMUX_PORT_MSK (0xFU) |
| 111 | +#define SAM_PINMUX_PORT_MSK (0xFU) |
94 | 112 | /** Port field position. */
|
95 |
| -#define SAM_PINMUX_PORT_POS (0U) |
| 113 | +#define SAM_PINMUX_PORT_POS (0U) |
96 | 114 | /** Pin field mask. */
|
97 |
| -#define SAM_PINMUX_PIN_MSK (0x1FU) |
| 115 | +#define SAM_PINMUX_PIN_MSK (0x1FU) |
98 | 116 | /** Pin field position. */
|
99 |
| -#define SAM_PINMUX_PIN_POS (SAM_PINMUX_PORT_POS + 4U) |
| 117 | +#define SAM_PINMUX_PIN_POS (SAM_PINMUX_PORT_POS + 4U) |
100 | 118 | /** Function field mask. */
|
101 |
| -#define SAM_PINMUX_FUNC_MSK (0x7U) |
| 119 | +#define SAM_PINMUX_FUNC_MSK (0x7U) |
102 | 120 | /** Function field position. */
|
103 |
| -#define SAM_PINMUX_FUNC_POS (SAM_PINMUX_PIN_POS + 5U) |
| 121 | +#define SAM_PINMUX_FUNC_POS (SAM_PINMUX_PIN_POS + 5U) |
104 | 122 | /** Peripheral field mask. */
|
105 |
| -#define SAM_PINMUX_PERIPH_MSK (0xFU) |
| 123 | +#define SAM_PINMUX_PERIPH_MSK (0xFU) |
106 | 124 | /** Peripheral field position. */
|
107 |
| -#define SAM_PINMUX_PERIPH_POS (SAM_PINMUX_FUNC_POS + 3U) |
| 125 | +#define SAM_PINMUX_PERIPH_POS (SAM_PINMUX_FUNC_POS + 3U) |
108 | 126 |
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109 | 127 | /** @} */
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110 | 128 |
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