Skip to content

Commit 8e4eb42

Browse files
author
Raffael Rostagno
committed
intc: Shared allocator for Xtensa and RISCV
Shared allocator for Xtensa and RISCV Signed-off-by: Raffael Rostagno <[email protected]>
1 parent 202c595 commit 8e4eb42

File tree

15 files changed

+52
-88
lines changed

15 files changed

+52
-88
lines changed

components/esp_hw_support/include/esp_private/esp_riscv_intr.h

+3-4
Original file line numberDiff line numberDiff line change
@@ -28,12 +28,12 @@ static inline uint32_t esp_riscv_intr_num_flags(int intr_num, uint32_t rsvd_mask
2828
}
2929

3030
extern intptr_t _mtvt_table[48];
31-
extern intptr_t _interrupt_handler;
31+
extern intptr_t _isr_wrapper;
3232

3333
/* The first 16 entries of the array are internal interrupt, ignore them */
3434
const intptr_t destination = _mtvt_table[16 + intr_num];
3535

36-
return (destination != (intptr_t)&_interrupt_handler) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;
36+
return (destination != (intptr_t)&_isr_wrapper) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;
3737
}
3838

3939

@@ -60,13 +60,12 @@ static inline uint32_t esp_riscv_intr_num_flags(int intr_num, uint32_t rsvd_mask
6060
}
6161

6262
extern intptr_t _vector_table[32];
63-
extern int _interrupt_handler;
6463
const intptr_t pc = (intptr_t) &_vector_table[intr_num];
6564

6665
/* JAL instructions are relative to the PC they are executed from. */
6766
const intptr_t destination = pc + riscv_decode_offset_from_jal_instruction(pc);
6867

69-
return (destination != (intptr_t)&_interrupt_handler) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;
68+
return (destination != (intptr_t)&_isr_wrapper) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;
7069
}
7170

7271
#endif // SOC_INT_CLIC_SUPPORTED

components/esp_hw_support/port/esp32c2/esp_cpu_intr.c

+2-1
Original file line numberDiff line numberDiff line change
@@ -10,11 +10,12 @@
1010
void esp_cpu_intr_get_desc(int core_id, int intr_num, esp_cpu_intr_desc_t *intr_desc_ret)
1111
{
1212
/* On the ESP32-C2, interrupt:
13+
* - 0 is unavailable according to TRM
1314
* - 1 is for Wi-Fi
1415
* - 6 for "permanently disabled interrupt", named INT_MUX_DISABLED_INTNO in the interrupt allocator
1516
*/
1617
// [TODO: IDF-2465]
17-
const uint32_t rsvd_mask = BIT(1) | BIT(6);
18+
const uint32_t rsvd_mask = BIT(0) | BIT(1) | BIT(6);
1819

1920
intr_desc_ret->priority = 1;
2021
intr_desc_ret->type = ESP_CPU_INTR_TYPE_NA;

components/esp_hw_support/port/esp32c3/esp_cpu_intr.c

+2-1
Original file line numberDiff line numberDiff line change
@@ -10,11 +10,12 @@
1010
void esp_cpu_intr_get_desc(int core_id, int intr_num, esp_cpu_intr_desc_t *intr_desc_ret)
1111
{
1212
/* On the ESP32-C3, interrupt:
13+
* - 0 is unavailable according to TRM
1314
* - 1 is for Wi-Fi
1415
* - 6 for "permanently disabled interrupt", named INT_MUX_DISABLED_INTNO in the interrupt allocator
1516
*/
1617
// [TODO: IDF-2465]
17-
const uint32_t rsvd_mask = BIT(1) | BIT(6);
18+
const uint32_t rsvd_mask = BIT(0) | BIT(1) | BIT(6);
1819

1920
intr_desc_ret->priority = 1;
2021
intr_desc_ret->type = ESP_CPU_INTR_TYPE_NA;

components/esp_hw_support/port/esp32c6/esp_cpu_intr.c

+2-3
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,12 @@
1010
void esp_cpu_intr_get_desc(int core_id, int intr_num, esp_cpu_intr_desc_t *intr_desc_ret)
1111
{
1212
/* On the ESP32-C6, interrupt:
13+
* - 0, 3, 4, and 7 are used by the CPU for core-local interrupts (CLINT)
1314
* - 1 is for Wi-Fi
1415
* - 6 for "permanently disabled interrupt"
15-
*
16-
* Interrupts 3, 4 and 7 are unavailable for PULP CPU as they are bound to Core-Local Interrupts (CLINT)
1716
*/
1817
// [TODO: IDF-2465]
19-
const uint32_t rsvd_mask = BIT(1) | BIT(3) | BIT(4) | BIT(6) | BIT(7);
18+
const uint32_t rsvd_mask = BIT(0) | BIT(1) | BIT(3) | BIT(4) | BIT(6) | BIT(7);
2019

2120
intr_desc_ret->priority = 1;
2221
intr_desc_ret->type = ESP_CPU_INTR_TYPE_NA;

components/esp_timer/private_include/esp_timer_impl.h

+1-9
Original file line numberDiff line numberDiff line change
@@ -19,15 +19,7 @@
1919
#include <stdint.h>
2020
#include "esp_err.h"
2121

22-
#if defined(CONFIG_SOC_SERIES_ESP32C2) || \
23-
defined(CONFIG_SOC_SERIES_ESP32C3) || \
24-
defined(CONFIG_SOC_SERIES_ESP32C6)
25-
#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
26-
#define ISR_HANDLER isr_handler_t
27-
#else
2822
#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
29-
#define ISR_HANDLER intr_handler_t
30-
#endif
3123

3224
/**
3325
* @brief Minimal initialization of platform specific layer of esp_timer
@@ -45,7 +37,7 @@ esp_err_t esp_timer_impl_early_init(void);
4537
* Before calling this function, esp_timer_impl_early_init must be called.
4638
* @return ESP_OK, ESP_ERR_NO_MEM, or one of the errors from interrupt allocator
4739
*/
48-
esp_err_t esp_timer_impl_init(ISR_HANDLER alarm_handler);
40+
esp_err_t esp_timer_impl_init(intr_handler_t alarm_handler);
4941

5042
/**
5143
* @brief Deinitialize platform specific layer of esp_timer

components/esp_timer/src/esp_timer.c

+1-9
Original file line numberDiff line numberDiff line change
@@ -38,15 +38,7 @@
3838

3939
#include "sdkconfig.h"
4040

41-
#if defined(CONFIG_SOC_SERIES_ESP32C2) || \
42-
defined(CONFIG_SOC_SERIES_ESP32C3) || \
43-
defined(CONFIG_SOC_SERIES_ESP32C6)
44-
#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
45-
#define ISR_HANDLER isr_handler_t
46-
#else
4741
#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
48-
#define ISR_HANDLER intr_handler_t
49-
#endif
5042

5143
#define LOG_MODULE_NAME esp_timer
5244
#include <zephyr/logging/log.h>
@@ -576,7 +568,7 @@ esp_err_t esp_timer_init(void)
576568
esp_err_t err = ESP_OK;
577569
err = init_timer_task();
578570
if (err == ESP_OK) {
579-
err = esp_timer_impl_init((ISR_HANDLER)&timer_alarm_handler);
571+
err = esp_timer_impl_init((intr_handler_t)&timer_alarm_handler);
580572
if (err != ESP_OK) {
581573
ESP_EARLY_LOGE(TAG, "ISR init failed");
582574
deinit_timer_task();

components/esp_timer/src/esp_timer_impl_lac.c

-4
Original file line numberDiff line numberDiff line change
@@ -23,11 +23,7 @@
2323
#include "soc/timer_group_reg.h"
2424
#include "soc/rtc.h"
2525

26-
#ifdef CONFIG_SOC_SERIES_ESP32C3
27-
#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
28-
#else
2926
#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
30-
#endif
3127

3228
/**
3329
* @file esp_timer_lac.c

components/esp_timer/src/esp_timer_impl_systimer.c

+3-11
Original file line numberDiff line numberDiff line change
@@ -22,15 +22,7 @@
2222
#include "hal/systimer_types.h"
2323
#include "hal/systimer_hal.h"
2424

25-
#if defined(CONFIG_SOC_SERIES_ESP32C2) || \
26-
defined(CONFIG_SOC_SERIES_ESP32C3) || \
27-
defined(CONFIG_SOC_SERIES_ESP32C6)
28-
#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
29-
#define ISR_HANDLER isr_handler_t
30-
#else
3125
#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
32-
#define ISR_HANDLER intr_handler_t
33-
#endif
3426

3527
/**
3628
* @file esp_timer_systimer.c
@@ -50,7 +42,7 @@ static const char *TAG = "esp_timer_systimer";
5042
/* Function from the upper layer to be called when the interrupt happens.
5143
* Registered in esp_timer_impl_init.
5244
*/
53-
static ISR_HANDLER s_alarm_handler = NULL;
45+
static intr_handler_t s_alarm_handler = NULL;
5446

5547
/* Systimer HAL layer object */
5648
static systimer_hal_context_t systimer_hal;
@@ -145,7 +137,7 @@ esp_err_t esp_timer_impl_early_init(void)
145137
return ESP_OK;
146138
}
147139

148-
esp_err_t esp_timer_impl_init(ISR_HANDLER alarm_handler)
140+
esp_err_t esp_timer_impl_init(intr_handler_t alarm_handler)
149141
{
150142
int isr_flags = 0 /* ZEP-795 (GH #74368): esp_timer ISR priority relaxed to avoid
151143
* IRQ not being allocated when several peripherals are enabled
@@ -156,7 +148,7 @@ esp_err_t esp_timer_impl_init(ISR_HANDLER alarm_handler)
156148
| ESP_INTR_FLAG_IRAM;
157149

158150
esp_err_t err = esp_intr_alloc(ETS_SYSTIMER_TARGET2_EDGE_INTR_SOURCE, isr_flags,
159-
(ISR_HANDLER)timer_alarm_isr, NULL, NULL);
151+
(intr_handler_t)timer_alarm_isr, NULL, NULL);
160152
if (err != ESP_OK) {
161153
ESP_EARLY_LOGE(TAG, "esp_intr_alloc failed (0x%x)", err);
162154
return err;

zephyr/esp32c2/CMakeLists.txt

+2-1
Original file line numberDiff line numberDiff line change
@@ -260,10 +260,11 @@ if(CONFIG_SOC_SERIES_ESP32C2)
260260
../../components/log/log_noos.c
261261
../../components/log/log.c
262262

263+
../../components/riscv/interrupt.c
264+
../../components/riscv/instruction_decode.c
263265

264266
../port/heap/heap_caps_zephyr.c
265267
../port/host_flash/cache_utils.c
266-
../../components/riscv/interrupt.c
267268
../port/bootloader/bootloader_flash.c
268269

269270
../common/flash_init.c

zephyr/esp32c2/src/wifi/esp_wifi_adapter.c

+5-6
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@
4141
#include <zephyr/kernel.h>
4242
#include <zephyr/sys/printk.h>
4343
#include <zephyr/random/random.h>
44-
#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
44+
#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
4545
#include "zephyr_compat.h"
4646

4747
#include <zephyr/logging/log.h>
@@ -445,19 +445,18 @@ static void set_isr_wrapper(int32_t n, void *f, void *arg)
445445
{
446446
ARG_UNUSED(n);
447447

448-
/* workaround to force allocating same handler for wifi interrupts */
449-
esp_intr_alloc(0, 0, (isr_handler_t)f, arg, NULL);
450-
esp_intr_alloc(2, 0, (isr_handler_t)f, arg, NULL);
448+
esp_intr_alloc(0, 0, f, arg, NULL);
449+
esp_intr_alloc(2, 0, f, arg, NULL);
451450
}
452451

453452
static void enable_intr_wrapper(unsigned int mask)
454453
{
455-
esp_intr_enable(mask);
454+
irq_enable(0);
456455
}
457456

458457
static void disable_intr_wrapper(unsigned int mask)
459458
{
460-
esp_intr_disable(mask);
459+
irq_disable(0);
461460
}
462461

463462
uint32_t esp_get_free_heap_size(void)

zephyr/esp32c3/CMakeLists.txt

+3-1
Original file line numberDiff line numberDiff line change
@@ -339,9 +339,11 @@ if(CONFIG_SOC_SERIES_ESP32C3)
339339

340340
../../components/esp_mm/port/${CONFIG_SOC_SERIES}/ext_mem_layout.c
341341

342+
../../components/riscv/interrupt.c
343+
../../components/riscv/instruction_decode.c
344+
342345
../port/heap/heap_caps_zephyr.c
343346
../port/host_flash/cache_utils.c
344-
../../components/riscv/interrupt.c
345347
../port/bootloader/bootloader_flash.c
346348

347349
../common/flash_init.c

zephyr/esp32c3/src/bt/esp_bt_adapter.c

+15-25
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@
3434
#include <zephyr/kernel.h>
3535
#include <zephyr/sys/printk.h>
3636
#include <zephyr/random/random.h>
37-
#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
37+
#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
3838

3939
#include <zephyr/logging/log.h>
4040
LOG_MODULE_REGISTER(esp32_bt_adapter, CONFIG_LOG_DEFAULT_LEVEL);
@@ -113,17 +113,17 @@ typedef struct {
113113
int flags; /*!< ISR alloc flag */
114114
void (*fn)(void *); /*!< ISR function */
115115
void *arg; /*!< ISR function args*/
116-
isr_handler_t *handle; /*!< ISR handle */
116+
struct intr_handle_data_t *handle; /*!< ISR handle */
117117
esp_err_t ret;
118118
} btdm_isr_alloc_t;
119119

120120
/* OSI function */
121121
struct osi_funcs_t {
122122
uint32_t _magic;
123123
uint32_t _version;
124-
int (* _interrupt_alloc)(int cpu_id, int source, isr_handler_t handler, void *arg, void **ret_handle);
124+
int (* _interrupt_alloc)(int cpu_id, int source, intr_handler_t handler, void *arg, void **ret_handle);
125125
int (* _interrupt_free)(void *handle);
126-
void (*_interrupt_handler_set_rsv)(int interrupt_no, isr_handler_t fn, void *arg);
126+
void (*_interrupt_handler_set_rsv)(int interrupt_no, intr_handler_t fn, void *arg);
127127
void (*_global_intr_disable)(void);
128128
void (*_global_intr_restore)(void);
129129
void (*_task_yield)(void);
@@ -237,7 +237,7 @@ extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, b
237237
extern void btdm_cca_feature_enable(void);
238238
extern void btdm_aa_check_enhance_enable(void);
239239

240-
static int interrupt_alloc_wrapper(int cpu_id, int source, isr_handler_t handler, void *arg, void **ret_handle);
240+
static int interrupt_alloc_wrapper(int cpu_id, int source, intr_handler_t handler, void *arg, void **ret_handle);
241241
static int interrupt_free_wrapper(void *handle);
242242
static void global_interrupt_disable(void);
243243
static void global_interrupt_restore(void);
@@ -437,39 +437,34 @@ static inline void esp_bt_power_domain_off(void)
437437
static void btdm_intr_alloc(void *arg)
438438
{
439439
btdm_isr_alloc_t *p = arg;
440-
p->ret = esp_intr_alloc(p->source, p->flags, (isr_handler_t)p->fn, p->arg, NULL);
440+
p->ret = esp_intr_alloc(p->source, p->flags, p->fn, p->arg, &p->handle);
441441
}
442442

443-
static int interrupt_alloc_wrapper(int cpu_id, int source, isr_handler_t handler, void *arg, void **ret_handle)
443+
static int interrupt_alloc_wrapper(int cpu_id, int source, intr_handler_t handler, void *arg, void **ret_handle)
444444
{
445445
btdm_isr_alloc_t p;
446446
p.source = source;
447447
p.flags = ESP_INTR_FLAG_LEVEL3 | ESP_INTR_FLAG_IRAM;
448-
p.fn = (void *)handler;
448+
p.fn = handler;
449449
p.arg = arg;
450-
p.handle = (isr_handler_t *)ret_handle;
450+
p.handle = (struct intr_handle_data_t *)ret_handle;
451451
btdm_intr_alloc(&p);
452452
return p.ret;
453453
}
454454

455455
static int interrupt_free_wrapper(void *handle)
456456
{
457-
/* TODO: implement esp_intr_free() for ESP32-C3 */
458-
return ESP_OK;
457+
return esp_intr_free((struct intr_handle_data_t *)handle);
459458
}
460459

461460
static int interrupt_enable_wrapper(void *handle)
462461
{
463-
ARG_UNUSED(handle);
464-
465-
return ESP_OK;
462+
return esp_intr_enable((struct intr_handle_data_t *)handle);
466463
}
467464

468465
static int interrupt_disable_wrapper(void *handle)
469466
{
470-
ARG_UNUSED(handle);
471-
472-
return ESP_OK;
467+
return esp_intr_disable((struct intr_handle_data_t *)handle);
473468
}
474469

475470
static void IRAM_ATTR global_interrupt_disable(void)
@@ -721,11 +716,7 @@ static void task_delete_wrapper(void *task_handle)
721716

722717
static void *malloc_internal_wrapper(size_t size)
723718
{
724-
void *ptr = esp_bt_malloc_func(size);
725-
if (ptr == NULL) {
726-
ets_printf("malloc_internal failed\n");
727-
}
728-
return ptr;
719+
return esp_bt_malloc_func(sizeof(uint8_t) * size);
729720
}
730721

731722
static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
@@ -1249,9 +1240,8 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
12491240
periph_module_enable(PERIPH_BT_MODULE);
12501241
periph_module_reset(PERIPH_BT_MODULE);
12511242

1252-
err = btdm_controller_init(cfg);
1253-
if (err != ESP_OK) {
1254-
ets_printf("BT controller init failed=%X\r\n", err);
1243+
if (btdm_controller_init(cfg) != 0) {
1244+
err = ESP_ERR_NO_MEM;
12551245
goto error;
12561246
}
12571247

zephyr/esp32c3/src/wifi/esp_wifi_adapter.c

+5-6
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@
4141
#include <zephyr/kernel.h>
4242
#include <zephyr/sys/printk.h>
4343
#include <zephyr/random/random.h>
44-
#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
44+
#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
4545
#include "zephyr_compat.h"
4646

4747
#include <zephyr/logging/log.h>
@@ -445,19 +445,18 @@ static void set_isr_wrapper(int32_t n, void *f, void *arg)
445445
{
446446
ARG_UNUSED(n);
447447

448-
/* workaround to force allocating same handler for wifi interrupts */
449-
esp_intr_alloc(0, 0, (isr_handler_t)f, arg, NULL);
450-
esp_intr_alloc(2, 0, (isr_handler_t)f, arg, NULL);
448+
esp_intr_alloc(0, 0, f, arg, NULL);
449+
esp_intr_alloc(2, 0, f, arg, NULL);
451450
}
452451

453452
static void enable_intr_wrapper(unsigned int mask)
454453
{
455-
esp_intr_enable(mask);
454+
irq_enable(0);
456455
}
457456

458457
static void disable_intr_wrapper(unsigned int mask)
459458
{
460-
esp_intr_disable(mask);
459+
irq_disable(0);
461460
}
462461

463462
uint32_t esp_get_free_heap_size(void)

zephyr/esp32c6/CMakeLists.txt

+3-1
Original file line numberDiff line numberDiff line change
@@ -272,9 +272,11 @@ if(CONFIG_SOC_SERIES_ESP32C6)
272272
../../components/log/log_noos.c
273273
../../components/log/log.c
274274

275+
../../components/riscv/interrupt.c
276+
../../components/riscv/instruction_decode.c
277+
275278
../port/heap/heap_caps_zephyr.c
276279
../port/host_flash/cache_utils.c
277-
../../components/riscv/interrupt.c
278280
../port/bootloader/bootloader_flash.c
279281

280282
../common/flash_init.c

0 commit comments

Comments
 (0)