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almir-okatoalmir-okato
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mcuboot: build MCUboot Espressif Port with Zephyr sysbuild
Skip building the hal sources from zephyr/<SOC>/CMakeLists.txt when building MCUboot Espressif port from Zephyr's sysbuild as it already have it's own way for integrating the Espressif hal. Change ESP_LOG for ESP_EARLY_LOG on bootloader files used by MCUboot Espressif port. Signed-off-by: Lucas Tamborrino <[email protected]> Signed-off-by: Almir Okato <[email protected]>
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15 files changed

+92
-52
lines changed

15 files changed

+92
-52
lines changed

‎components/bootloader_support/include/esp_flash_partitions.h

+4
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,9 @@
88
#include "esp_err.h"
99
#include "esp_types.h"
1010
#include "sdkconfig.h"
11+
#ifndef CONFIG_MCUBOOT_ESPRESSIF
1112
#include <zephyr/storage/flash_map.h>
13+
#endif
1214

1315
#ifdef __cplusplus
1416
extern "C" {
@@ -38,7 +40,9 @@ extern "C" {
3840
/* The md5sum value is found this many bytes after the ESP_PARTITION_MAGIC_MD5 offset */
3941
#define ESP_PARTITION_MD5_OFFSET 16
4042

43+
#ifndef CONFIG_MCUBOOT_ESPRESSIF
4144
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH FIXED_PARTITION_OFFSET(boot_partition) /* Offset of bootloader image. */
45+
#endif
4246

4347
/* Pre-partition table fixed flash offsets */
4448
#define ESP_BOOTLOADER_DIGEST_OFFSET 0x0

‎components/bootloader_support/src/esp32/bootloader_esp32.c

+16-16
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ static esp_err_t bootloader_check_rated_cpu_clock(void)
7373
{
7474
int rated_freq = bootloader_clock_get_rated_freq_mhz();
7575
if (rated_freq < CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) {
76-
ESP_LOGE(TAG, "Chip CPU frequency rated for %dMHz, configured for %dMHz. Modify CPU frequency in menuconfig",
76+
ESP_EARLY_LOGE(TAG, "Chip CPU frequency rated for %dMHz, configured for %dMHz. Modify CPU frequency in menuconfig",
7777
rated_freq, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ);
7878
return ESP_FAIL;
7979
}
@@ -119,19 +119,19 @@ static void wdt_reset_info_dump(int cpu)
119119

120120
if (DPORT_RECORD_PDEBUGINST_SZ(inst) == 0 &&
121121
DPORT_RECORD_PDEBUGSTATUS_BBCAUSE(dstat) == DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_WAITI) {
122-
ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32" (waiti mode)", cpu_name, pc);
122+
ESP_EARLY_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32" (waiti mode)", cpu_name, pc);
123123
} else {
124-
ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32, cpu_name, pc);
124+
ESP_EARLY_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32, cpu_name, pc);
125125
}
126-
ESP_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08"PRIx32, cpu_name, stat);
127-
ESP_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08"PRIx32, cpu_name, pid);
128-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08"PRIx32, cpu_name, inst);
129-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08"PRIx32, cpu_name, dstat);
130-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08"PRIx32, cpu_name, data);
131-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08"PRIx32, cpu_name, pc);
132-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08"PRIx32, cpu_name, lsstat);
133-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08"PRIx32, cpu_name, lsaddr);
134-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08"PRIx32, cpu_name, lsdata);
126+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08"PRIx32, cpu_name, stat);
127+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08"PRIx32, cpu_name, pid);
128+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08"PRIx32, cpu_name, inst);
129+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08"PRIx32, cpu_name, dstat);
130+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08"PRIx32, cpu_name, data);
131+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08"PRIx32, cpu_name, pc);
132+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08"PRIx32, cpu_name, lsstat);
133+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08"PRIx32, cpu_name, lsaddr);
134+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08"PRIx32, cpu_name, lsdata);
135135
}
136136

137137
static void bootloader_check_wdt_reset(void)
@@ -143,12 +143,12 @@ static void bootloader_check_wdt_reset(void)
143143
rst_reas[1] = esp_rom_get_reset_reason(1);
144144
if (rst_reas[0] == RESET_REASON_CORE_RTC_WDT || rst_reas[0] == RESET_REASON_CORE_MWDT0 || rst_reas[0] == RESET_REASON_CORE_MWDT1 ||
145145
rst_reas[0] == RESET_REASON_CPU0_MWDT0 || rst_reas[0] == RESET_REASON_CPU0_RTC_WDT) {
146-
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
146+
ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
147147
wdt_rst = 1;
148148
}
149149
if (rst_reas[1] == RESET_REASON_CORE_RTC_WDT || rst_reas[1] == RESET_REASON_CORE_MWDT0 || rst_reas[1] == RESET_REASON_CORE_MWDT1 ||
150150
rst_reas[1] == RESET_REASON_CPU1_MWDT1 || rst_reas[1] == RESET_REASON_CPU1_RTC_WDT) {
151-
ESP_LOGW(TAG, "APP CPU has been reset by WDT.");
151+
ESP_EARLY_LOGW(TAG, "APP CPU has been reset by WDT.");
152152
wdt_rst = 1;
153153
}
154154
if (wdt_rst) {
@@ -190,7 +190,7 @@ esp_err_t bootloader_init(void)
190190

191191
// init eFuse virtual mode (read eFuses to RAM)
192192
#ifdef CONFIG_EFUSE_VIRTUAL
193-
ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
193+
ESP_EARLY_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
194194
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
195195
esp_efuse_init_virtual_mode_in_ram();
196196
#endif
@@ -215,7 +215,7 @@ esp_err_t bootloader_init(void)
215215
bootloader_flash_update_id();
216216
// Check and run XMC startup flow
217217
if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
218-
ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
218+
ESP_EARLY_LOGE(TAG, "failed when running XMC startup flow, reboot!");
219219
return ret;
220220
}
221221
#if !CONFIG_APP_BUILD_TYPE_RAM

‎components/bootloader_support/src/esp32c2/bootloader_esp32c2.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -62,7 +62,7 @@ static void bootloader_check_wdt_reset(void)
6262
soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
6363
if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 ||
6464
rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
65-
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
65+
ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
6666
wdt_rst = 1;
6767
}
6868
if (wdt_rst) {
@@ -107,7 +107,7 @@ esp_err_t bootloader_init(void)
107107

108108
// init eFuse virtual mode (read eFuses to RAM)
109109
#ifdef CONFIG_EFUSE_VIRTUAL
110-
ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
110+
ESP_EARLY_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
111111
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
112112
esp_efuse_init_virtual_mode_in_ram();
113113
#endif

‎components/bootloader_support/src/esp32c3/bootloader_esp32c3.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ static void bootloader_check_wdt_reset(void)
6767
soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
6868
if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
6969
rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
70-
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
70+
ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
7171
wdt_rst = 1;
7272
}
7373
if (wdt_rst) {
@@ -146,7 +146,7 @@ esp_err_t bootloader_init(void)
146146

147147
// init eFuse virtual mode (read eFuses to RAM)
148148
#ifdef CONFIG_EFUSE_VIRTUAL
149-
ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
149+
ESP_EARLY_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
150150
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
151151
esp_efuse_init_virtual_mode_in_ram();
152152
#endif
@@ -167,7 +167,7 @@ esp_err_t bootloader_init(void)
167167
bootloader_flash_update_id();
168168
// Check and run XMC startup flow
169169
if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
170-
ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
170+
ESP_EARLY_LOGE(TAG, "failed when running XMC startup flow, reboot!");
171171
return ret;
172172
}
173173
#if !CONFIG_APP_BUILD_TYPE_RAM

‎components/bootloader_support/src/esp32c6/bootloader_esp32c6.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,7 @@ static void bootloader_check_wdt_reset(void)
6868
soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
6969
if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
7070
rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
71-
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
71+
ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
7272
wdt_rst = 1;
7373
}
7474
if (wdt_rst) {
@@ -130,7 +130,7 @@ esp_err_t bootloader_init(void)
130130

131131
// init eFuse virtual mode (read eFuses to RAM)
132132
#ifdef CONFIG_EFUSE_VIRTUAL
133-
ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
133+
ESP_EARLY_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
134134
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
135135
esp_efuse_init_virtual_mode_in_ram();
136136
#endif
@@ -151,7 +151,7 @@ esp_err_t bootloader_init(void)
151151
bootloader_flash_update_id();
152152
// Check and run XMC startup flow
153153
if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
154-
ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
154+
ESP_EARLY_LOGE(TAG, "failed when running XMC startup flow, reboot!");
155155
return ret;
156156
}
157157
#if !CONFIG_APP_BUILD_TYPE_RAM

‎components/bootloader_support/src/esp32s2/bootloader_esp32s2.c

+14-14
Original file line numberDiff line numberDiff line change
@@ -67,19 +67,19 @@ static void wdt_reset_info_dump(int cpu)
6767

6868
if (DPORT_RECORD_PDEBUGINST_SZ(inst) == 0 &&
6969
DPORT_RECORD_PDEBUGSTATUS_BBCAUSE(dstat) == DPORT_RECORD_PDEBUGSTATUS_BBCAUSE_WAITI) {
70-
ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32" (waiti mode)", cpu_name, pc);
70+
ESP_EARLY_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32" (waiti mode)", cpu_name, pc);
7171
} else {
72-
ESP_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32, cpu_name, pc);
72+
ESP_EARLY_LOGW(TAG, "WDT reset info: %s CPU PC=0x%"PRIx32, cpu_name, pc);
7373
}
74-
ESP_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08"PRIx32, cpu_name, stat);
75-
ESP_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08"PRIx32, cpu_name, pid);
76-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08"PRIx32, cpu_name, inst);
77-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08"PRIx32, cpu_name, dstat);
78-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08"PRIx32, cpu_name, data);
79-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08"PRIx32, cpu_name, pc);
80-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08"PRIx32, cpu_name, lsstat);
81-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08"PRIx32, cpu_name, lsaddr);
82-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08"PRIx32, cpu_name, lsdata);
74+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08"PRIx32, cpu_name, stat);
75+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08"PRIx32, cpu_name, pid);
76+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08"PRIx32, cpu_name, inst);
77+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08"PRIx32, cpu_name, dstat);
78+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08"PRIx32, cpu_name, data);
79+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08"PRIx32, cpu_name, pc);
80+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08"PRIx32, cpu_name, lsstat);
81+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08"PRIx32, cpu_name, lsaddr);
82+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08"PRIx32, cpu_name, lsdata);
8383
}
8484

8585
static void bootloader_check_wdt_reset(void)
@@ -88,7 +88,7 @@ static void bootloader_check_wdt_reset(void)
8888
soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
8989
if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
9090
rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
91-
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
91+
ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
9292
wdt_rst = 1;
9393
}
9494
if (wdt_rst) {
@@ -126,7 +126,7 @@ esp_err_t bootloader_init(void)
126126

127127
// init eFuse virtual mode (read eFuses to RAM)
128128
#ifdef CONFIG_EFUSE_VIRTUAL
129-
ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
129+
ESP_EARLY_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
130130
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
131131
esp_efuse_init_virtual_mode_in_ram();
132132
#endif
@@ -150,7 +150,7 @@ esp_err_t bootloader_init(void)
150150
bootloader_flash_update_id();
151151
// Check and run XMC startup flow
152152
if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
153-
ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
153+
ESP_EARLY_LOGE(TAG, "failed when running XMC startup flow, reboot!");
154154
return ret;
155155
}
156156
#if !CONFIG_APP_BUILD_TYPE_RAM

‎components/bootloader_support/src/esp32s3/bootloader_esp32s3.c

+14-14
Original file line numberDiff line numberDiff line change
@@ -78,20 +78,20 @@ static void wdt_reset_info_dump(int cpu)
7878
lsaddr = REG_READ(ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0ADDR_REG);
7979
lsdata = REG_READ(ASSIST_DEBUG_CORE_1_RCD_PDEBUGLS0DATA_REG);
8080
#else
81-
ESP_LOGE(TAG, "WDT reset info: %s CPU not support!\n", cpu_name);
81+
ESP_EARLY_LOGE(TAG, "WDT reset info: %s CPU not support!\n", cpu_name);
8282
return;
8383
#endif
8484
}
8585

86-
ESP_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08"PRIx32, cpu_name, stat);
87-
ESP_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08"PRIx32, cpu_name, pid);
88-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08"PRIx32, cpu_name, inst);
89-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08"PRIx32, cpu_name, dstat);
90-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08"PRIx32, cpu_name, data);
91-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08"PRIx32, cpu_name, pc);
92-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08"PRIx32, cpu_name, lsstat);
93-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08"PRIx32, cpu_name, lsaddr);
94-
ESP_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08"PRIx32, cpu_name, lsdata);
86+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU STATUS 0x%08"PRIx32, cpu_name, stat);
87+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PID 0x%08"PRIx32, cpu_name, pid);
88+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGINST 0x%08"PRIx32, cpu_name, inst);
89+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGSTATUS 0x%08"PRIx32, cpu_name, dstat);
90+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGDATA 0x%08"PRIx32, cpu_name, data);
91+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGPC 0x%08"PRIx32, cpu_name, pc);
92+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0STAT 0x%08"PRIx32, cpu_name, lsstat);
93+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0ADDR 0x%08"PRIx32, cpu_name, lsaddr);
94+
ESP_EARLY_LOGD(TAG, "WDT reset info: %s CPU PDEBUGLS0DATA 0x%08"PRIx32, cpu_name, lsdata);
9595
}
9696

9797
static void bootloader_check_wdt_reset(void)
@@ -103,12 +103,12 @@ static void bootloader_check_wdt_reset(void)
103103
rst_reas[1] = esp_rom_get_reset_reason(1);
104104
if (rst_reas[0] == RESET_REASON_CORE_RTC_WDT || rst_reas[0] == RESET_REASON_CORE_MWDT0 || rst_reas[0] == RESET_REASON_CORE_MWDT1 ||
105105
rst_reas[0] == RESET_REASON_CPU0_MWDT0 || rst_reas[0] == RESET_REASON_CPU0_RTC_WDT) {
106-
ESP_LOGW(TAG, "PRO CPU has been reset by WDT.");
106+
ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
107107
wdt_rst = 1;
108108
}
109109
if (rst_reas[1] == RESET_REASON_CORE_RTC_WDT || rst_reas[1] == RESET_REASON_CORE_MWDT0 || rst_reas[1] == RESET_REASON_CORE_MWDT1 ||
110110
rst_reas[1] == RESET_REASON_CPU1_MWDT1 || rst_reas[1] == RESET_REASON_CPU1_RTC_WDT) {
111-
ESP_LOGW(TAG, "APP CPU has been reset by WDT.");
111+
ESP_EARLY_LOGW(TAG, "APP CPU has been reset by WDT.");
112112
wdt_rst = 1;
113113
}
114114
if (wdt_rst) {
@@ -165,7 +165,7 @@ esp_err_t bootloader_init(void)
165165

166166
// init eFuse virtual mode (read eFuses to RAM)
167167
#ifdef CONFIG_EFUSE_VIRTUAL
168-
ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
168+
ESP_EARLY_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
169169
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
170170
esp_efuse_init_virtual_mode_in_ram();
171171
#endif
@@ -186,7 +186,7 @@ esp_err_t bootloader_init(void)
186186
bootloader_flash_update_id();
187187
// Check and run XMC startup flow
188188
if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
189-
ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
189+
ESP_EARLY_LOGE(TAG, "failed when running XMC startup flow, reboot!");
190190
return ret;
191191
}
192192
#if !CONFIG_APP_BUILD_TYPE_RAM

‎components/esp_common/include/esp_compiler.h

+2
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,9 @@
66

77
#pragma once
88

9+
#ifndef CONFIG_MCUBOOT_ESPRESSIF
910
#include <zephyr/toolchain.h>
11+
#endif
1012

1113
/*
1214
* Utility macros used for designated initializers, which work differently

‎components/esp_hw_support/include/esp_cpu.h

+10
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,9 @@
66

77
#pragma once
88

9+
#ifndef CONFIG_MCUBOOT_ESPRESSIF
910
#include <zephyr/kernel.h>
11+
#endif
1012

1113
#include "sdkconfig.h"
1214
#include <stdbool.h>
@@ -373,7 +375,11 @@ FORCE_INLINE_ATTR void *esp_cpu_intr_get_handler_arg(int intr_num)
373375
FORCE_INLINE_ATTR void esp_cpu_intr_enable(uint32_t intr_mask)
374376
{
375377
#ifdef __XTENSA__
378+
#ifndef CONFIG_MCUBOOT_ESPRESSIF
376379
z_xt_ints_on(intr_mask);
380+
#else
381+
xt_ints_on(intr_mask);
382+
#endif
377383
#else
378384
rv_utils_intr_enable(intr_mask);
379385
#endif
@@ -387,7 +393,11 @@ FORCE_INLINE_ATTR void esp_cpu_intr_enable(uint32_t intr_mask)
387393
FORCE_INLINE_ATTR void esp_cpu_intr_disable(uint32_t intr_mask)
388394
{
389395
#ifdef __XTENSA__
396+
#ifndef CONFIG_MCUBOOT_ESPRESSIF
390397
z_xt_ints_off(intr_mask);
398+
#else
399+
xt_ints_off(intr_mask);
400+
#endif
391401
#else
392402
rv_utils_intr_disable(intr_mask);
393403
#endif

‎zephyr/esp32/CMakeLists.txt

+4
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,9 @@
11
# SPDX-License-Identifier: Apache-2.0
22

3+
if(CONFIG_MCUBOOT_ESPRESSIF)
4+
return()
5+
endif()
6+
37
if(CONFIG_SOC_SERIES_ESP32)
48

59
zephyr_compile_options(-fstrict-volatile-bitfields)

‎zephyr/esp32c2/CMakeLists.txt

+4
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,9 @@
11
# SPDX-License-Identifier: Apache-2.0
22

3+
if(CONFIG_MCUBOOT_ESPRESSIF)
4+
return()
5+
endif()
6+
37
if(CONFIG_SOC_SERIES_ESP32C2)
48

59
zephyr_compile_options(-fstrict-volatile-bitfields)

‎zephyr/esp32c3/CMakeLists.txt

+4
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,9 @@
11
# SPDX-License-Identifier: Apache-2.0
22

3+
if(CONFIG_MCUBOOT_ESPRESSIF)
4+
return()
5+
endif()
6+
37
if(CONFIG_SOC_SERIES_ESP32C3)
48

59
zephyr_compile_options(-fstrict-volatile-bitfields)

‎zephyr/esp32c6/CMakeLists.txt

+4
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,9 @@
11
# SPDX-License-Identifier: Apache-2.0
22

3+
if(CONFIG_MCUBOOT_ESPRESSIF)
4+
return()
5+
endif()
6+
37
if(CONFIG_SOC_SERIES_ESP32C6)
48

59
zephyr_compile_options(-fstrict-volatile-bitfields)

‎zephyr/esp32s2/CMakeLists.txt

+4
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,9 @@
11
# SPDX-License-Identifier: Apache-2.0
22

3+
if(CONFIG_MCUBOOT_ESPRESSIF)
4+
return()
5+
endif()
6+
37
if(CONFIG_SOC_SERIES_ESP32S2)
48

59
zephyr_compile_options(-fstrict-volatile-bitfields)

‎zephyr/esp32s3/CMakeLists.txt

+4
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,9 @@
11
# SPDX-License-Identifier: Apache-2.0
22

3+
if(CONFIG_MCUBOOT_ESPRESSIF)
4+
return()
5+
endif()
6+
37
if(CONFIG_SOC_SERIES_ESP32S3)
48

59
zephyr_compile_options(-fstrict-volatile-bitfields)

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