diff --git a/components/driver/deprecated/adc_legacy.c b/components/driver/deprecated/adc_legacy.c
index 0237c358af..ed07bdf3b3 100644
--- a/components/driver/deprecated/adc_legacy.c
+++ b/components/driver/deprecated/adc_legacy.c
@@ -45,11 +45,6 @@ static const char *ADC_TAG = "ADC";
 //////////////////////// Locks ///////////////////////////////////////////
 LOG_MODULE_REGISTER(adc_legacy, CONFIG_ADC_LOG_LEVEL);
 
-extern int rtc_spinlock;
-
-#define RTC_ENTER_CRITICAL()    do { rtc_spinlock = irq_lock(); } while(0)
-#define RTC_EXIT_CRITICAL()    irq_unlock(rtc_spinlock);
-
 #define DIGI_ENTER_CRITICAL()
 #define DIGI_EXIT_CRITICAL()
 
@@ -142,9 +137,9 @@ esp_err_t adc2_pad_get_io_num(adc2_channel_t channel, gpio_num_t *gpio_num)
 #if SOC_ADC_RTC_CTRL_SUPPORTED
 esp_err_t adc_set_clk_div(uint8_t clk_div)
 {
-    DIGI_CONTROLLER_ENTER();
+    unsigned int key = irq_lock();
     adc_ll_digi_set_clk_div(clk_div);
-    DIGI_CONTROLLER_EXIT();
+    irq_unlock(key);
     return ESP_OK;
 }
 
@@ -195,15 +190,17 @@ esp_err_t adc_common_gpio_init(adc_unit_t adc_unit, adc_channel_t channel)
 
 esp_err_t adc_set_data_inv(adc_unit_t adc_unit, bool inv_en)
 {
+    unsigned int key;
+
     if (adc_unit == ADC_UNIT_1) {
-        SARADC1_ENTER();
+        key = irq_lock();
         adc_oneshot_ll_output_invert(ADC_UNIT_1, inv_en);
-        SARADC1_EXIT();
+        irq_unlock(key);
     }
     if (adc_unit == ADC_UNIT_2) {
-        SARADC2_ENTER();
+        key = irq_lock();
         adc_oneshot_ll_output_invert(ADC_UNIT_2, inv_en);
-        SARADC2_EXIT();
+        irq_unlock(key);
     }
 
     return ESP_OK;
@@ -213,6 +210,7 @@ esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit)
 {
     ESP_RETURN_ON_FALSE(width_bit < ADC_WIDTH_MAX, ESP_ERR_INVALID_ARG, ADC_TAG, "unsupported bit width");
     adc_bitwidth_t bitwidth = 0;
+    unsigned int key;
 #if CONFIG_IDF_TARGET_ESP32
     if ((uint32_t)width_bit == (uint32_t)ADC_BITWIDTH_DEFAULT) {
         bitwidth = SOC_ADC_RTC_MAX_BITWIDTH;
@@ -241,14 +239,14 @@ esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit)
 #endif
 
     if (adc_unit == ADC_UNIT_1) {
-        SARADC1_ENTER();
+        key = irq_lock();
         adc_oneshot_ll_set_output_bits(ADC_UNIT_1, bitwidth);
-        SARADC1_EXIT();
+        irq_unlock(key);
     }
     if (adc_unit == ADC_UNIT_2) {
-        SARADC2_ENTER();
+        key = irq_lock();
         adc_oneshot_ll_set_output_bits(ADC_UNIT_2, bitwidth);
-        SARADC2_EXIT();
+        irq_unlock(key);
     }
 
     return ESP_OK;
@@ -263,9 +261,9 @@ esp_err_t adc_set_data_width(adc_unit_t adc_unit, adc_bits_width_t width_bit)
 #if !CONFIG_IDF_TARGET_ESP32
 esp_err_t adc_rtc_reset(void)
 {
-    FSM_ENTER();
+    unsigned int key = irq_lock();
     adc_ll_rtc_reset();
-    FSM_EXIT();
+    irq_unlock(key);
     return ESP_OK;
 }
 #endif
@@ -286,10 +284,10 @@ esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten)
 #endif  //#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
 
     adc_common_gpio_init(ADC_UNIT_1, channel);
-    SARADC1_ENTER();
+    unsigned int key = irq_lock();
     adc_rtc_chan_init(ADC_UNIT_1);
     adc_oneshot_ll_set_atten(ADC_UNIT_1, channel, atten);
-    SARADC1_EXIT();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -325,9 +323,9 @@ esp_err_t adc1_config_width(adc_bits_width_t width_bit)
     bitwidth = ADC_BITWIDTH_12;
 #endif
 
-    SARADC1_ENTER();
+    unsigned int key = irq_lock();
     adc_oneshot_ll_set_output_bits(ADC_UNIT_1, bitwidth);
-    SARADC1_EXIT();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -341,10 +339,10 @@ esp_err_t adc1_dma_mode_acquire(void)
 
     sar_periph_ctrl_adc_continuous_power_acquire();
 
-    SARADC1_ENTER();
+    unsigned int key = irq_lock();
     /* switch SARADC into DIG channel */
     adc_ll_set_controller(ADC_UNIT_1, ADC_LL_CTRL_DIG);
-    SARADC1_EXIT();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -356,10 +354,10 @@ esp_err_t adc1_rtc_mode_acquire(void)
     SARADC1_ACQUIRE();
     sar_periph_ctrl_adc_oneshot_power_acquire();
 
-    SARADC1_ENTER();
+    unsigned int key = irq_lock();
     /* switch SARADC into RTC channel. */
     adc_ll_set_controller(ADC_UNIT_1, ADC_LL_CTRL_RTC);
-    SARADC1_EXIT();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -386,7 +384,7 @@ int adc1_get_raw(adc1_channel_t channel)
     adc_set_hw_calibration_code(ADC_UNIT_1, atten);
 #endif  //SOC_ADC_CALIBRATION_V1_SUPPORTED
 
-    SARADC1_ENTER();
+    unsigned int key = irq_lock();
 #ifdef CONFIG_IDF_TARGET_ESP32
     adc_ll_hall_disable(); //Disable other peripherals.
     adc_ll_amp_disable();  //Currently the LNA is not open, close it by default.
@@ -397,7 +395,7 @@ int adc1_get_raw(adc1_channel_t channel)
 #if !CONFIG_IDF_TARGET_ESP32
     adc_ll_rtc_reset();    //Reset FSM of rtc controller
 #endif
-    SARADC1_EXIT();
+    irq_unlock(key);
 
     adc1_lock_release();
     return adc_value;
@@ -413,7 +411,7 @@ void adc1_ulp_enable(void)
 {
     sar_periph_ctrl_adc_oneshot_power_acquire();
 
-    SARADC1_ENTER();
+    unsigned int key = irq_lock();
     adc_ll_set_controller(ADC_UNIT_1, ADC_LL_CTRL_ULP);
     /* since most users do not need LNA and HALL with uLP, we disable them here
        open them in the uLP if needed. */
@@ -422,7 +420,7 @@ void adc1_ulp_enable(void)
     adc_ll_hall_disable();
     adc_ll_amp_disable();
 #endif
-    SARADC1_EXIT();
+    irq_unlock(key);
 }
 #endif
 
@@ -452,10 +450,10 @@ esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten)
 #endif
 
     //avoid collision with other tasks
-    SARADC2_ENTER();
+    unsigned int key = irq_lock();
     adc_rtc_chan_init(ADC_UNIT_2);
     adc_oneshot_ll_set_atten(ADC_UNIT_2, channel, atten);
-    SARADC2_EXIT();
+    irq_unlock(key);
 
 #if CONFIG_IDF_TARGET_ESP32
     adc_lock_release(ADC_UNIT_2);
@@ -553,7 +551,7 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
 
     //avoid collision with other tasks
     adc2_init();   // in critical section with whole rtc module. because the PWDET use the same registers, place it here.
-    SARADC2_ENTER();
+    unsigned int key = irq_lock();
 
 #if SOC_ADC_ARBITER_SUPPORTED
     adc_arbiter_t config = ADC_ARBITER_CONFIG_DEFAULT();
@@ -593,7 +591,7 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
     }
 #endif //CONFIG_PM_ENABLE
 #endif //CONFIG_IDF_TARGET_ESP32
-    SARADC2_EXIT();
+    irq_unlock(key);
 
     sar_periph_ctrl_adc_oneshot_power_release();
 #if CONFIG_IDF_TARGET_ESP32
@@ -606,6 +604,7 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
 
 esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio)
 {
+    unsigned int key;
 #ifdef CONFIG_IDF_TARGET_ESP32
     if (adc_unit == ADC_UNIT_1) {
         return ESP_ERR_INVALID_ARG;
@@ -625,13 +624,13 @@ esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio)
 
     sar_periph_ctrl_adc_oneshot_power_acquire();
     if (adc_unit == ADC_UNIT_1) {
-        VREF_ENTER(1);
+        key = irq_lock();
         adc_ll_vref_output(ADC_UNIT_1, ch, true);
-        VREF_EXIT(1);
+        irq_unlock(key);
     } else if (adc_unit == ADC_UNIT_2) {
-        VREF_ENTER(2);
+        key = irq_lock();
         adc_ll_vref_output(ADC_UNIT_2, ch, true);
-        VREF_EXIT(2);
+        irq_unlock(key);
     }
 
     //Configure RTC gpio, Only ADC2's channels IO are supported to output reference voltage.
@@ -650,10 +649,6 @@ esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio)
 ---------------------------------------------------------------*/
 #include "esp_check.h"
 
-int adc_reg_lock;
-#define ADC_REG_LOCK_ENTER()    do { adc_reg_lock = irq_lock(); } while(0)
-#define ADC_REG_LOCK_EXIT()    irq_unlock(adc_reg_lock);
-
 static adc_atten_t s_atten1_single[ADC1_CHANNEL_MAX];    //Array saving attenuate of each channel of ADC1, used by single read API
 #if (SOC_ADC_PERIPH_NUM >= 2)
 static adc_atten_t s_atten2_single[ADC2_CHANNEL_MAX];    //Array saving attenuate of each channel of ADC2, used by single read API
@@ -703,6 +698,7 @@ static esp_err_t adc_digi_gpio_init(adc_unit_t adc_unit, uint16_t channel_mask)
 esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio)
 {
     esp_err_t ret;
+    unsigned int key;
     uint32_t channel = ADC2_CHANNEL_MAX;
     if (adc_unit == ADC_UNIT_2) {
         for (int i = 0; i < ADC2_CHANNEL_MAX; i++) {
@@ -718,13 +714,13 @@ esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio)
 
     sar_periph_ctrl_adc_oneshot_power_acquire();
     if (adc_unit == ADC_UNIT_1) {
-        RTC_ENTER_CRITICAL();
+        key = irq_lock();
         adc_ll_vref_output(ADC_UNIT_1, channel, true);
-        RTC_EXIT_CRITICAL();
+        irq_unlock(key);
     } else {    //ADC_UNIT_2
-        RTC_ENTER_CRITICAL();
+        key = irq_lock();
         adc_ll_vref_output(ADC_UNIT_2, channel, true);
-        RTC_EXIT_CRITICAL();
+        irq_unlock(key);
     }
 
     ret = adc_digi_gpio_init(ADC_UNIT_2, BIT(channel));
@@ -778,10 +774,10 @@ int adc1_get_raw(adc1_channel_t channel)
     adc_set_hw_calibration_code(ADC_UNIT_1, atten);
 #endif
 
-    ADC_REG_LOCK_ENTER();
+    unsigned int key = irq_lock();
     adc_oneshot_ll_set_atten(ADC_UNIT_1, channel, atten);
     adc_hal_convert(ADC_UNIT_1, channel, clk_src_freq_hz, &raw_out);
-    ADC_REG_LOCK_EXIT();
+    irq_unlock(key);
 
     sar_periph_ctrl_adc_oneshot_power_release();
     periph_module_disable(PERIPH_SARADC_MODULE);
@@ -834,10 +830,10 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
     adc_set_hw_calibration_code(ADC_UNIT_2, atten);
 #endif
 
-    ADC_REG_LOCK_ENTER();
+    unsigned int key = irq_lock();
     adc_oneshot_ll_set_atten(ADC_UNIT_2, channel, atten);
     ret = adc_hal_convert(ADC_UNIT_2, channel, clk_src_freq_hz, raw_out);
-    ADC_REG_LOCK_EXIT();
+    irq_unlock(key);
 
     sar_periph_ctrl_adc_oneshot_power_release();
     periph_module_disable(PERIPH_SARADC_MODULE);
diff --git a/components/driver/deprecated/dac_common_legacy.c b/components/driver/deprecated/dac_common_legacy.c
index 2137dbcafa..c2aa2ab4c1 100644
--- a/components/driver/deprecated/dac_common_legacy.c
+++ b/components/driver/deprecated/dac_common_legacy.c
@@ -16,11 +16,6 @@
 #include "hal/dac_ll.h"
 #include "clk_ctrl_os.h"
 
-extern int rtc_spinlock;
-
-#define RTC_ENTER_CRITICAL()    do { rtc_spinlock = irq_lock(); } while(0)
-#define RTC_EXIT_CRITICAL()    irq_unlock(rtc_spinlock);
-
 static __attribute__((unused)) const char *TAG = "DAC";
 
 /*---------------------------------------------------------------
@@ -54,10 +49,10 @@ esp_err_t dac_output_enable(dac_channel_t channel)
     ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
 
     dac_rtc_pad_init(channel);
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     dac_ll_power_on(channel);
     dac_ll_rtc_sync_by_adc(false);
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -66,9 +61,9 @@ esp_err_t dac_output_disable(dac_channel_t channel)
 {
     ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
 
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     dac_ll_power_down(channel);
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -77,9 +72,9 @@ esp_err_t dac_output_voltage(dac_channel_t channel, uint8_t dac_value)
 {
     ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
 
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     dac_ll_update_output_value(channel, dac_value);
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -88,29 +83,29 @@ esp_err_t dac_out_voltage(dac_channel_t channel, uint8_t dac_value)
 {
     ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
 
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     dac_ll_update_output_value(channel, dac_value);
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
 
 esp_err_t dac_cw_generator_enable(void)
 {
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     periph_rtc_dig_clk8m_enable();
     dac_ll_cw_generator_enable();
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
 
 esp_err_t dac_cw_generator_disable(void)
 {
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     dac_ll_cw_generator_disable();
     periph_rtc_dig_clk8m_disable();
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -118,7 +113,7 @@ esp_err_t dac_cw_generator_disable(void)
 esp_err_t dac_cw_generator_config(dac_cw_config_t *cw)
 {
     ESP_RETURN_ON_FALSE(cw, ESP_ERR_INVALID_ARG, TAG, "invalid clock configuration");
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     /* Enable the rtc8m clock temporary to get the correct frequency */
     periph_rtc_dig_clk8m_enable();
     uint32_t rtc_freq = periph_rtc_dig_clk8m_get_freq();
@@ -128,7 +123,7 @@ esp_err_t dac_cw_generator_config(dac_cw_config_t *cw)
     dac_ll_cw_set_phase(cw->en_ch, (dac_cosine_phase_t)cw->phase);
     dac_ll_cw_set_dc_offset(cw->en_ch, cw->offset);
     dac_ll_cw_enable_channel(cw->en_ch, true);
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
diff --git a/components/driver/gpio/rtc_io.c b/components/driver/gpio/rtc_io.c
index 298ef37217..40f13639bc 100644
--- a/components/driver/gpio/rtc_io.c
+++ b/components/driver/gpio/rtc_io.c
@@ -16,11 +16,6 @@
 
 static const char __attribute__((__unused__)) *RTCIO_TAG = "RTCIO";
 
-extern int rtc_spinlock;
-
-#define RTCIO_ENTER_CRITICAL()    do { rtc_spinlock = irq_lock(); } while(0)
-#define RTCIO_EXIT_CRITICAL()    irq_unlock(rtc_spinlock);
-
 #if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
 
 /*---------------------------------------------------------------
@@ -29,9 +24,9 @@ extern int rtc_spinlock;
 esp_err_t rtc_gpio_init(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_function_select(rtc_io_number_get(gpio_num), RTCIO_FUNC_RTC);
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -39,10 +34,10 @@ esp_err_t rtc_gpio_init(gpio_num_t gpio_num)
 esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     // Select Gpio as Digital Gpio
     rtcio_hal_function_select(rtc_io_number_get(gpio_num), RTCIO_FUNC_DIGITAL);
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -50,9 +45,9 @@ esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num)
 esp_err_t rtc_gpio_set_level(gpio_num_t gpio_num, uint32_t level)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_set_level(rtc_io_number_get(gpio_num), level);
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -68,9 +63,9 @@ esp_err_t rtc_gpio_set_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t st
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
     ESP_RETURN_ON_FALSE(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "Output pad only");
     ESP_RETURN_ON_FALSE(strength < GPIO_DRIVE_CAP_MAX, ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO drive capability error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_set_drive_capability(rtc_io_number_get(gpio_num), strength);
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -88,9 +83,9 @@ esp_err_t rtc_gpio_get_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t *s
 esp_err_t rtc_gpio_set_direction(gpio_num_t gpio_num, rtc_gpio_mode_t mode)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_set_direction(rtc_io_number_get(gpio_num), mode);
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -98,9 +93,9 @@ esp_err_t rtc_gpio_set_direction(gpio_num_t gpio_num, rtc_gpio_mode_t mode)
 esp_err_t rtc_gpio_set_direction_in_sleep(gpio_num_t gpio_num, rtc_gpio_mode_t mode)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_set_direction_in_sleep(rtc_io_number_get(gpio_num), mode);
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -108,9 +103,9 @@ esp_err_t rtc_gpio_set_direction_in_sleep(gpio_num_t gpio_num, rtc_gpio_mode_t m
 esp_err_t rtc_gpio_pullup_en(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_pullup_enable(rtc_io_number_get(gpio_num));
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -118,9 +113,9 @@ esp_err_t rtc_gpio_pullup_en(gpio_num_t gpio_num)
 esp_err_t rtc_gpio_pullup_dis(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_pullup_disable(rtc_io_number_get(gpio_num));
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -128,9 +123,9 @@ esp_err_t rtc_gpio_pullup_dis(gpio_num_t gpio_num)
 esp_err_t rtc_gpio_pulldown_en(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_pulldown_enable(rtc_io_number_get(gpio_num));
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -138,9 +133,9 @@ esp_err_t rtc_gpio_pulldown_en(gpio_num_t gpio_num)
 esp_err_t rtc_gpio_pulldown_dis(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_pulldown_disable(rtc_io_number_get(gpio_num));
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -149,9 +144,9 @@ esp_err_t rtc_gpio_pulldown_dis(gpio_num_t gpio_num)
 esp_err_t rtc_gpio_iomux_func_sel(gpio_num_t gpio_num, int func)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_iomux_func_sel(rtc_io_number_get(gpio_num), func);
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -163,45 +158,45 @@ esp_err_t rtc_gpio_iomux_func_sel(gpio_num_t gpio_num, int func)
 esp_err_t rtc_gpio_hold_en(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_hold_enable(rtc_io_number_get(gpio_num));
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
     return ESP_OK;
 }
 
 esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_hold_disable(rtc_io_number_get(gpio_num));
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
     return ESP_OK;
 }
 
 esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_isolate(rtc_io_number_get(gpio_num));
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
 
 esp_err_t rtc_gpio_force_hold_en_all(void)
 {
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_hold_all();
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
 
 esp_err_t rtc_gpio_force_hold_dis_all(void)
 {
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_unhold_all();
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -215,18 +210,18 @@ esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
     if (intr_type == GPIO_INTR_POSEDGE || intr_type == GPIO_INTR_NEGEDGE || intr_type == GPIO_INTR_ANYEDGE) {
         return ESP_ERR_INVALID_ARG; // Dont support this mode.
     }
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_wakeup_enable(rtc_io_number_get(gpio_num), intr_type);
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
     return ESP_OK;
 }
 
 esp_err_t rtc_gpio_wakeup_disable(gpio_num_t gpio_num)
 {
     ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
-    RTCIO_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     rtcio_hal_wakeup_disable(rtc_io_number_get(gpio_num));
-    RTCIO_EXIT_CRITICAL();
+    irq_unlock(key);
     return ESP_OK;
 }
 
diff --git a/components/driver/touch_sensor/touch_sensor_common.c b/components/driver/touch_sensor/touch_sensor_common.c
index 6f6870194d..90eba79f9e 100644
--- a/components/driver/touch_sensor/touch_sensor_common.c
+++ b/components/driver/touch_sensor/touch_sensor_common.c
@@ -43,11 +43,6 @@ static const char *TOUCH_TAG = "TOUCH_SENSOR";
 
 _Static_assert(TOUCH_PAD_MAX == SOC_TOUCH_SENSOR_NUM, "Touch sensor channel number not equal to chip capabilities");
 
-extern int rtc_spinlock;
-
-#define TOUCH_ENTER_CRITICAL()    do { rtc_spinlock = irq_lock(); } while(0)
-#define TOUCH_EXIT_CRITICAL()     irq_unlock(rtc_spinlock)
-
 esp_err_t touch_pad_isr_deregister(intr_handler_t fn, void *arg)
 {
     return rtc_isr_deregister(fn, arg);
@@ -67,9 +62,9 @@ esp_err_t touch_pad_set_voltage(touch_high_volt_t refh, touch_low_volt_t refl, t
         .refl = refl,
         .atten = atten,
     };
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_set_voltage(&volt);
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -77,9 +72,9 @@ esp_err_t touch_pad_set_voltage(touch_high_volt_t refh, touch_low_volt_t refl, t
 esp_err_t touch_pad_get_voltage(touch_high_volt_t *refh, touch_low_volt_t *refl, touch_volt_atten_t *atten)
 {
     touch_hal_volt_t volt = {0};
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_get_voltage(&volt);
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
     *refh = volt.refh;
     *refl = volt.refl;
     *atten = volt.atten;
@@ -97,9 +92,9 @@ esp_err_t touch_pad_set_cnt_mode(touch_pad_t touch_num, touch_cnt_slope_t slope,
         .slope = slope,
         .tie_opt = opt,
     };
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_set_meas_mode(touch_num, &meas);
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -109,9 +104,9 @@ esp_err_t touch_pad_get_cnt_mode(touch_pad_t touch_num, touch_cnt_slope_t *slope
     TOUCH_CHECK(touch_num < SOC_TOUCH_SENSOR_NUM, "Touch channel error", ESP_ERR_INVALID_ARG);
 
     touch_hal_meas_mode_t meas = {0};
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_get_meas_mode(touch_num, &meas);
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
     *slope = meas.slope;
     *opt = meas.tie_opt;
 
@@ -131,17 +126,17 @@ esp_err_t touch_pad_io_init(touch_pad_t touch_num)
 
 esp_err_t touch_pad_fsm_start(void)
 {
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_start_fsm();
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
     return ESP_OK;
 }
 
 esp_err_t touch_pad_fsm_stop(void)
 {
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_stop_fsm();
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
     return ESP_OK;
 }
 
@@ -149,9 +144,9 @@ esp_err_t touch_pad_set_fsm_mode(touch_fsm_mode_t mode)
 {
     TOUCH_CHECK((mode < TOUCH_FSM_MODE_MAX), "touch fsm mode error", ESP_ERR_INVALID_ARG);
 
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_set_fsm_mode(mode);
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
 #ifdef CONFIG_IDF_TARGET_ESP32
     if (mode == TOUCH_FSM_MODE_TIMER) {
         touch_pad_fsm_start();
@@ -170,9 +165,9 @@ esp_err_t touch_pad_get_fsm_mode(touch_fsm_mode_t *mode)
 
 esp_err_t touch_pad_sw_start(void)
 {
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_start_sw_meas();
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
     return ESP_OK;
 }
 
@@ -180,9 +175,9 @@ esp_err_t touch_pad_sw_start(void)
 esp_err_t touch_pad_set_thresh(touch_pad_t touch_num, uint16_t threshold)
 {
     TOUCH_CHANNEL_CHECK(touch_num);
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_set_threshold(touch_num, threshold);
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
     return ESP_OK;
 }
 #else // !CONFIG_IDF_TARGET_ESP32
@@ -191,9 +186,9 @@ esp_err_t touch_pad_set_thresh(touch_pad_t touch_num, uint32_t threshold)
     TOUCH_CHANNEL_CHECK(touch_num);
     TOUCH_CHECK(touch_num != SOC_TOUCH_DENOISE_CHANNEL,
                 "TOUCH0 is internal denoise channel", ESP_ERR_INVALID_ARG);
-    TOUCH_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     touch_hal_set_threshold(touch_num, threshold);
-    TOUCH_EXIT_CRITICAL();
+    irq_unlock(key);
     return ESP_OK;
 }
 #endif // CONFIG_IDF_TARGET_ESP32
diff --git a/components/esp_hw_support/adc_share_hw_ctrl.c b/components/esp_hw_support/adc_share_hw_ctrl.c
index c8edd8eb46..1d16ddf92a 100644
--- a/components/esp_hw_support/adc_share_hw_ctrl.c
+++ b/components/esp_hw_support/adc_share_hw_ctrl.c
@@ -32,6 +32,7 @@
 #include "esp_private/sar_periph_ctrl.h"
 #include "esp_private/periph_ctrl.h"
 #include "soc/periph_defs.h"
+
 //For calibration
 #if CONFIG_IDF_TARGET_ESP32S2
 #include "esp_efuse_rtc_table.h"
@@ -39,14 +40,8 @@
 #include "esp_efuse_rtc_calib.h"
 #endif
 
-
 static const char *TAG = "adc_share_hw_ctrl";
 
-extern int rtc_spinlock;
-
-#define RTC_ENTER_CRITICAL()    do { rtc_spinlock = irq_lock(); } while(0)
-#define RTC_EXIT_CRITICAL()    irq_unlock(rtc_spinlock);
-
 #if SOC_ADC_CALIBRATION_V1_SUPPORTED
 /*---------------------------------------------------------------
             ADC Hardware Calibration
@@ -84,11 +79,11 @@ void adc_calc_hw_calibration_code(adc_unit_t adc_n, adc_atten_t atten)
     else {
         ESP_EARLY_LOGD(TAG, "Calibration eFuse is not configured, use self-calibration for ICode");
         sar_periph_ctrl_adc_oneshot_power_acquire();
-        RTC_ENTER_CRITICAL();
+        unsigned int key = irq_lock();
         adc_ll_pwdet_set_cct(ADC_LL_PWDET_CCT_DEFAULT);
         const bool internal_gnd = true;
         init_code = adc_hal_self_calibration(adc_n, atten, internal_gnd);
-        RTC_EXIT_CRITICAL();
+        irq_unlock(key);
         sar_periph_ctrl_adc_oneshot_power_release();
     }
 #else
diff --git a/components/esp_hw_support/clk_ctrl_os.c b/components/esp_hw_support/clk_ctrl_os.c
index 14400dec3f..14ba0446d1 100644
--- a/components/esp_hw_support/clk_ctrl_os.c
+++ b/components/esp_hw_support/clk_ctrl_os.c
@@ -11,12 +11,8 @@
 #include "esp_private/esp_clk_tree_common.h"
 #include "esp_check.h"
 
-static int periph_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { periph_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(periph_spinlock);
-
 static uint8_t s_periph_ref_counts = 0;
+
 static uint32_t s_rc_fast_freq = 0; // Frequency of the RC_FAST clock in Hz
 #if SOC_CLK_APLL_SUPPORTED
 static const char *TAG = "clk_ctrl_os";
@@ -25,23 +21,22 @@ static uint32_t s_cur_apll_freq = 0;
 static int s_apll_ref_cnt = 0;
 #endif
 
-
 bool periph_rtc_dig_clk8m_enable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     if (s_periph_ref_counts == 0) {
         rtc_dig_clk8m_enable();
 #if SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
         s_rc_fast_freq = esp_clk_tree_rc_fast_get_freq_hz(ESP_CLK_TREE_SRC_FREQ_PRECISION_EXACT);
         if (s_rc_fast_freq == 0) {
             rtc_dig_clk8m_disable();
-            LEAVE_CRITICAL_SECTION();
+            irq_unlock(key);
             return false;
         }
 #endif //SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
     }
     s_periph_ref_counts++;
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
     return true;
 }
 
@@ -57,31 +52,31 @@ uint32_t periph_rtc_dig_clk8m_get_freq(void)
 
 void periph_rtc_dig_clk8m_disable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     assert(s_periph_ref_counts > 0);
     s_periph_ref_counts--;
     if (s_periph_ref_counts == 0) {
         s_rc_fast_freq = 0;
         rtc_dig_clk8m_disable();
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 #if SOC_CLK_APLL_SUPPORTED
 void periph_rtc_apll_acquire(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_apll_ref_cnt++;
     if (s_apll_ref_cnt == 1) {
         // For the first time enable APLL, need to set power up
         rtc_clk_apll_enable(true);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void periph_rtc_apll_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     assert(s_apll_ref_cnt > 0);
     s_apll_ref_cnt--;
     if (s_apll_ref_cnt == 0) {
@@ -89,7 +84,7 @@ void periph_rtc_apll_release(void)
         s_cur_apll_freq = 0;
         rtc_clk_apll_enable(false);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 esp_err_t periph_rtc_apll_freq_set(uint32_t expt_freq, uint32_t *real_freq)
@@ -104,7 +99,7 @@ esp_err_t periph_rtc_apll_freq_set(uint32_t expt_freq, uint32_t *real_freq)
 
     ESP_RETURN_ON_FALSE(apll_freq, ESP_ERR_INVALID_ARG, TAG, "APLL coefficients calculate failed");
     bool need_config = true;
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     /* If APLL is not in use or only one peripheral in use, its frequency can be changed as will
      * But when more than one peripheral refers APLL, its frequency is not allowed to change once it is set */
     if (s_cur_apll_freq == 0 || s_apll_ref_cnt < 2) {
@@ -113,7 +108,7 @@ esp_err_t periph_rtc_apll_freq_set(uint32_t expt_freq, uint32_t *real_freq)
         apll_freq = s_cur_apll_freq;
         need_config = false;
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
     *real_freq = apll_freq;
 
     if (need_config) {
diff --git a/components/esp_hw_support/esp_clk.c b/components/esp_hw_support/esp_clk.c
index 87e41645a1..4b8f879317 100644
--- a/components/esp_hw_support/esp_clk.c
+++ b/components/esp_hw_support/esp_clk.c
@@ -48,10 +48,6 @@
 // g_ticks_us defined in ROMs for PRO and APP CPU
 extern uint32_t g_ticks_per_us_pro;
 
-static int s_esp_rtc_time_lock;
-#define ENTER_CRITICAL_SECTION()    do { s_esp_rtc_time_lock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(s_esp_rtc_time_lock);
-
 #if SOC_RTC_MEM_SUPPORTED
 typedef struct {
     uint64_t rtc_time_us;
@@ -108,7 +104,7 @@ int IRAM_ATTR esp_clk_xtal_freq(void)
 
 uint64_t esp_rtc_get_time_us(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     const uint32_t cal = esp_clk_slowclk_cal_get();
 #if SOC_RTC_MEM_SUPPORTED
     static bool first_call = true;
@@ -151,11 +147,11 @@ uint64_t esp_rtc_get_time_us(void)
     s_rtc_timer_retain_mem.rtc_last_ticks = rtc_this_ticks;
     s_rtc_timer_retain_mem.checksum = calc_checksum();
     uint64_t esp_rtc_time_us = s_rtc_timer_retain_mem.rtc_time_us;
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
     return esp_rtc_time_us;
 #else
     uint64_t esp_rtc_time_us = delta_time_us + clk_ll_rtc_slow_load_rtc_fix_us();
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
     return esp_rtc_time_us;
 #endif
 }
@@ -169,7 +165,7 @@ void esp_clk_slowclk_cal_set(uint32_t new_cal)
 #if SOC_RTC_MEM_SUPPORTED
     esp_rtc_get_time_us();
 #else
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     uint32_t old_cal = clk_ll_rtc_slow_load_cal();
     if (old_cal != 0) {
         /**
@@ -192,7 +188,7 @@ void esp_clk_slowclk_cal_set(uint32_t new_cal)
         new_fix_us = old_fix_us - new_fix_us;
         clk_ll_rtc_slow_store_rtc_fix_us(new_fix_us);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 #endif // SOC_RTC_MEM_SUPPORTED
 #endif // CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER
     clk_ll_rtc_slow_store_cal(new_cal);
@@ -214,10 +210,8 @@ uint64_t esp_clk_rtc_time(void)
 
 void esp_clk_private_lock(void)
 {
-    ENTER_CRITICAL_SECTION();
 }
 
 void esp_clk_private_unlock(void)
 {
-    LEAVE_CRITICAL_SECTION()
 }
diff --git a/components/esp_hw_support/periph_ctrl.c b/components/esp_hw_support/periph_ctrl.c
index 068e1f5355..4f58dca60b 100644
--- a/components/esp_hw_support/periph_ctrl.c
+++ b/components/esp_hw_support/periph_ctrl.c
@@ -4,6 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <zephyr/kernel.h>
+#include <zephyr/sys/atomic.h>
+#include <zephyr/sys/__assert.h>
 
 #include "hal/clk_gate_ll.h"
 #include "esp_attr.h"
@@ -14,21 +16,24 @@
 #include "esp_private/esp_modem_clock.h"
 #endif
 
-static int periph_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { periph_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(periph_spinlock);
+unsigned int rcc_lock;
+static atomic_t rcc_lock_counter;
 
 static uint8_t ref_counts[PERIPH_MODULE_MAX] = {0};
 
 IRAM_ATTR void periph_rcc_enter(void)
 {
-    ENTER_CRITICAL_SECTION();
+    if (atomic_inc(&rcc_lock_counter) == 0) {
+        rcc_lock = irq_lock();
+    }
 }
 
 IRAM_ATTR void periph_rcc_exit(void)
 {
-    LEAVE_CRITICAL_SECTION();
+    __ASSERT_NO_MSG(atomic_get(&rcc_lock_counter) > 0);
+    if (atomic_dec(&rcc_lock_counter) == 1) {
+        irq_unlock(rcc_lock);
+    }
 }
 
 IRAM_ATTR uint8_t periph_rcc_acquire_enter(periph_module_t periph)
@@ -58,31 +63,31 @@ IRAM_ATTR void periph_rcc_release_exit(periph_module_t periph, uint8_t ref_count
 void periph_module_enable(periph_module_t periph)
 {
     assert(periph < PERIPH_MODULE_MAX);
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     if (ref_counts[periph] == 0) {
         periph_ll_enable_clk_clear_rst(periph);
     }
     ref_counts[periph]++;
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void periph_module_disable(periph_module_t periph)
 {
     assert(periph < PERIPH_MODULE_MAX);
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     ref_counts[periph]--;
     if (ref_counts[periph] == 0) {
         periph_ll_disable_clk_set_rst(periph);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void periph_module_reset(periph_module_t periph)
 {
     assert(periph < PERIPH_MODULE_MAX);
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     periph_ll_reset(periph);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 #if !SOC_IEEE802154_BLE_ONLY
@@ -91,12 +96,12 @@ IRAM_ATTR void wifi_bt_common_module_enable(void)
 #if SOC_MODEM_CLOCK_IS_INDEPENDENT
     modem_clock_module_enable(PERIPH_PHY_MODULE);
 #else
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) {
         periph_ll_wifi_bt_module_enable_clk();
     }
     ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]++;
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 #endif
 }
 
@@ -105,12 +110,12 @@ IRAM_ATTR void wifi_bt_common_module_disable(void)
 #if SOC_MODEM_CLOCK_IS_INDEPENDENT
     modem_clock_module_disable(PERIPH_PHY_MODULE);
 #else
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]--;
     if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) {
         periph_ll_wifi_bt_module_disable_clk();
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 #endif
 }
 #endif
@@ -121,9 +126,9 @@ void wifi_module_enable(void)
 #if SOC_MODEM_CLOCK_IS_INDEPENDENT
     modem_clock_module_enable(PERIPH_WIFI_MODULE);
 #else
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     periph_ll_wifi_module_enable_clk_clear_rst();
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 #endif
 }
 
@@ -132,9 +137,9 @@ void wifi_module_disable(void)
 #if SOC_MODEM_CLOCK_IS_INDEPENDENT
     modem_clock_module_disable(PERIPH_WIFI_MODULE);
 #else
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     periph_ll_wifi_module_disable_clk_set_rst();
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 #endif
 }
 #endif // CONFIG_WIFI_ESP32
diff --git a/components/esp_hw_support/port/esp32/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32/sar_periph_ctrl.c
index 6975485a72..d9d08af75c 100644
--- a/components/esp_hw_support/port/esp32/sar_periph_ctrl.c
+++ b/components/esp_hw_support/port/esp32/sar_periph_ctrl.c
@@ -23,12 +23,6 @@
 
 static const char *TAG = "sar_periph_ctrl";
 
-static int rtc_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { rtc_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(rtc_spinlock);
-#define LEAVE_CRITICAL()    irq_unlock(rtc_spinlock);
-
 void sar_periph_ctrl_init(void)
 {
     //Put SAR control mux to ON state
@@ -39,16 +33,16 @@ void sar_periph_ctrl_init(void)
 
 void sar_periph_ctrl_power_enable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_ON);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_power_disable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_OFF);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 /**
@@ -61,26 +55,26 @@ static int s_sar_power_on_cnt;
 
 static void s_sar_power_acquire(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_sar_power_on_cnt++;
     if (s_sar_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_ON);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 static void s_sar_power_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_sar_power_on_cnt--;
     if (s_sar_power_on_cnt < 0) {
-        LEAVE_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG, "%s called, but s_sar_power_on_cnt == 0", __func__);
         abort();
     } else if (s_sar_power_on_cnt == 0) {
         sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 
diff --git a/components/esp_hw_support/port/esp32c2/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32c2/sar_periph_ctrl.c
index aa1cec84a8..98341e13d8 100644
--- a/components/esp_hw_support/port/esp32c2/sar_periph_ctrl.c
+++ b/components/esp_hw_support/port/esp32c2/sar_periph_ctrl.c
@@ -25,12 +25,6 @@
 
 static const char *TAG = "sar_periph_ctrl";
 
-int rtc_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { rtc_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(rtc_spinlock);
-#define LEAVE_CRITICAL()    irq_unlock(rtc_spinlock);
-
 void sar_periph_ctrl_init(void)
 {
     //Put SAR control mux to FSM state
@@ -41,16 +35,16 @@ void sar_periph_ctrl_init(void)
 
 void sar_periph_ctrl_power_enable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_power_disable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_OFF);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 
@@ -61,27 +55,27 @@ static int s_pwdet_power_on_cnt;
 
 void sar_periph_ctrl_pwdet_power_acquire(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt++;
     if (s_pwdet_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_ON);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_pwdet_power_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt--;
     /* Sanity check */
     if (s_pwdet_power_on_cnt < 0) {
-        LEAVE_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG, "%s called, but s_pwdet_power_on_cnt == 0", __func__);
         abort();
     } else if (s_pwdet_power_on_cnt == 0) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 
@@ -92,26 +86,26 @@ static int s_saradc_power_on_cnt;
 
 static void s_sar_adc_power_acquire(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_saradc_power_on_cnt++;
     if (s_saradc_power_on_cnt == 1) {
         adc_ll_digi_set_power_manage(ADC_LL_POWER_SW_ON);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 static void s_sar_adc_power_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_saradc_power_on_cnt--;
     if (s_saradc_power_on_cnt < 0) {
-        LEAVE_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG, "%s called, but s_saradc_power_on_cnt == 0", __func__);
         abort();
     } else if (s_saradc_power_on_cnt == 0) {
         adc_ll_digi_set_power_manage(ADC_LL_POWER_BY_FSM);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_adc_oneshot_power_acquire(void)
diff --git a/components/esp_hw_support/port/esp32c3/adc2_init_cal.c b/components/esp_hw_support/port/esp32c3/adc2_init_cal.c
index 4aa512cdd0..9db083b5c5 100644
--- a/components/esp_hw_support/port/esp32c3/adc2_init_cal.c
+++ b/components/esp_hw_support/port/esp32c3/adc2_init_cal.c
@@ -14,11 +14,6 @@ Don't put any other code into this file. */
 #include "hal/adc_hal_common.h"
 #include "esp_private/adc_share_hw_ctrl.h"
 
-extern int rtc_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { rtc_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(rtc_spinlock);
-
 /**
  * @brief Set initial code to ADC2 after calibration. ADC2 RTC and ADC2 PWDET controller share the initial code.
  *        This API be called in before `app_main()`.
@@ -27,9 +22,9 @@ void adc2_init_code_calibration(void)
 {
     adc_hal_calibration_init(ADC_UNIT_2);
     adc_calc_hw_calibration_code(ADC_UNIT_2, ADC_ATTEN_DB_12);
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     adc_set_hw_calibration_code(ADC_UNIT_2, ADC_ATTEN_DB_12);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 /** Don't call `adc2_cal_include` in user code. */
diff --git a/components/esp_hw_support/port/esp32c3/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32c3/sar_periph_ctrl.c
index 40a69c32ab..666f0953a6 100644
--- a/components/esp_hw_support/port/esp32c3/sar_periph_ctrl.c
+++ b/components/esp_hw_support/port/esp32c3/sar_periph_ctrl.c
@@ -25,12 +25,6 @@
 
 static const char *TAG = "sar_periph_ctrl";
 
-int rtc_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { rtc_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(rtc_spinlock);
-#define LEAVE_CRITICAL()    irq_unlock(rtc_spinlock);
-
 void sar_periph_ctrl_init(void)
 {
     //Put SAR control mux to FSM state
@@ -41,16 +35,16 @@ void sar_periph_ctrl_init(void)
 
 void sar_periph_ctrl_power_enable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_power_disable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_OFF);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 
@@ -61,27 +55,27 @@ static int s_pwdet_power_on_cnt;
 
 void sar_periph_ctrl_pwdet_power_acquire(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt++;
     if (s_pwdet_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_ON);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_pwdet_power_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt--;
     /* Sanity check */
     if (s_pwdet_power_on_cnt < 0) {
-        LEAVE_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG, "%s called, but s_pwdet_power_on_cnt == 0", __func__);
         abort();
     } else if (s_pwdet_power_on_cnt == 0) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 
@@ -92,26 +86,26 @@ static int s_saradc_power_on_cnt;
 
 static void s_sar_adc_power_acquire(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_saradc_power_on_cnt++;
     if (s_saradc_power_on_cnt == 1) {
         adc_ll_digi_set_power_manage(ADC_LL_POWER_SW_ON);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 static void s_sar_adc_power_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_saradc_power_on_cnt--;
     if (s_saradc_power_on_cnt < 0) {
-        LEAVE_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG, "%s called, but s_saradc_power_on_cnt == 0", __func__);
         abort();
     } else if (s_saradc_power_on_cnt == 0) {
         adc_ll_digi_set_power_manage(ADC_LL_POWER_BY_FSM);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_adc_oneshot_power_acquire(void)
diff --git a/components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c
index f5935e1eda..499fdad4d4 100644
--- a/components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c
+++ b/components/esp_hw_support/port/esp32c6/sar_periph_ctrl.c
@@ -24,12 +24,6 @@
 
 static const char *TAG = "sar_periph_ctrl";
 
-int rtc_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { rtc_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(rtc_spinlock);
-#define LEAVE_CRITICAL()    irq_unlock(rtc_spinlock);
-
 void sar_periph_ctrl_init(void)
 {
     sar_ctrl_ll_force_power_ctrl_from_pwdet(true);
@@ -39,16 +33,16 @@ void sar_periph_ctrl_init(void)
 
 void sar_periph_ctrl_power_enable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_force_power_ctrl_from_pwdet(true);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_power_disable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_force_power_ctrl_from_pwdet(false);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 /**
@@ -62,26 +56,26 @@ static int s_pwdet_power_on_cnt;
 static void s_sar_power_acquire(void)
 {
     modem_clock_module_enable(PERIPH_MODEM_ADC_COMMON_FE_MODULE);
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt++;
     if (s_pwdet_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_ON);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 static void s_sar_power_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt--;
     if (s_pwdet_power_on_cnt < 0) {
-        LEAVE_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG, "%s called, but s_pwdet_power_on_cnt == 0", __func__);
         abort();
     } else if (s_pwdet_power_on_cnt == 0) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
     modem_clock_module_disable(PERIPH_MODEM_ADC_COMMON_FE_MODULE);
 }
 
diff --git a/components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c
index 4acb3fc48d..80e72e1510 100644
--- a/components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c
+++ b/components/esp_hw_support/port/esp32h2/sar_periph_ctrl.c
@@ -23,12 +23,6 @@
 
 static const char *TAG = "sar_periph_ctrl";
 
-static int rtc_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { rtc_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(rtc_spinlock);
-#define LEAVE_CRITICAL()    irq_unlock(rtc_spinlock);
-
 void sar_periph_ctrl_init(void)
 {
     sar_ctrl_ll_force_power_ctrl_from_pwdet(true);
@@ -38,16 +32,16 @@ void sar_periph_ctrl_init(void)
 
 void sar_periph_ctrl_power_enable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_force_power_ctrl_from_pwdet(true);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_power_disable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_force_power_ctrl_from_pwdet(false);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 /**
@@ -61,26 +55,26 @@ static int s_pwdet_power_on_cnt;
 static void s_sar_power_acquire(void)
 {
     modem_clock_module_enable(PERIPH_MODEM_ADC_COMMON_FE_MODULE);
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt++;
     if (s_pwdet_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_ON);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 static void s_sar_power_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt--;
     if (s_pwdet_power_on_cnt < 0) {
-        LEAVE_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG, "%s called, but s_pwdet_power_on_cnt == 0", __func__);
         abort();
     } else if (s_pwdet_power_on_cnt == 0) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
     modem_clock_module_disable(PERIPH_MODEM_ADC_COMMON_FE_MODULE);
 }
 
diff --git a/components/esp_hw_support/port/esp32s2/adc2_init_cal.c b/components/esp_hw_support/port/esp32s2/adc2_init_cal.c
index 4aa512cdd0..9db083b5c5 100644
--- a/components/esp_hw_support/port/esp32s2/adc2_init_cal.c
+++ b/components/esp_hw_support/port/esp32s2/adc2_init_cal.c
@@ -14,11 +14,6 @@ Don't put any other code into this file. */
 #include "hal/adc_hal_common.h"
 #include "esp_private/adc_share_hw_ctrl.h"
 
-extern int rtc_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { rtc_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(rtc_spinlock);
-
 /**
  * @brief Set initial code to ADC2 after calibration. ADC2 RTC and ADC2 PWDET controller share the initial code.
  *        This API be called in before `app_main()`.
@@ -27,9 +22,9 @@ void adc2_init_code_calibration(void)
 {
     adc_hal_calibration_init(ADC_UNIT_2);
     adc_calc_hw_calibration_code(ADC_UNIT_2, ADC_ATTEN_DB_12);
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     adc_set_hw_calibration_code(ADC_UNIT_2, ADC_ATTEN_DB_12);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 /** Don't call `adc2_cal_include` in user code. */
diff --git a/components/esp_hw_support/port/esp32s2/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32s2/sar_periph_ctrl.c
index fe2809e771..51495452c0 100644
--- a/components/esp_hw_support/port/esp32s2/sar_periph_ctrl.c
+++ b/components/esp_hw_support/port/esp32s2/sar_periph_ctrl.c
@@ -25,12 +25,6 @@
 
 static const char *TAG = "sar_periph_ctrl";
 
-static int rtc_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { rtc_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(rtc_spinlock);
-#define LEAVE_CRITICAL()    irq_unlock(rtc_spinlock);
-
 void sar_periph_ctrl_init(void)
 {
     //Put SAR control mux to FSM state
@@ -41,16 +35,16 @@ void sar_periph_ctrl_init(void)
 
 void sar_periph_ctrl_power_enable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_power_disable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_OFF);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 
@@ -61,27 +55,27 @@ static int s_pwdet_power_on_cnt;
 
 void sar_periph_ctrl_pwdet_power_acquire(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt++;
     if (s_pwdet_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_ON);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_pwdet_power_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_pwdet_power_on_cnt--;
     /* Sanity check */
     if (s_pwdet_power_on_cnt < 0) {
-        LEAVE_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG, "%s called, but s_pwdet_power_on_cnt == 0", __func__);
         abort();
     } else if (s_pwdet_power_on_cnt == 0) {
         sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 
diff --git a/components/esp_hw_support/port/esp32s3/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32s3/sar_periph_ctrl.c
index 4953631b18..9071a082b0 100644
--- a/components/esp_hw_support/port/esp32s3/sar_periph_ctrl.c
+++ b/components/esp_hw_support/port/esp32s3/sar_periph_ctrl.c
@@ -25,12 +25,6 @@
 
 static const char *TAG = "sar_periph_ctrl";
 
-static int rtc_spinlock;
-
-#define ENTER_CRITICAL_SECTION()    do { rtc_spinlock = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(rtc_spinlock);
-#define LEAVE_CRITICAL()    irq_unlock(rtc_spinlock);
-
 void sar_periph_ctrl_init(void)
 {
     //Put SAR control mux to FSM state
@@ -41,16 +35,16 @@ void sar_periph_ctrl_init(void)
 
 void sar_periph_ctrl_power_enable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void sar_periph_ctrl_power_disable(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_OFF);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 /**
@@ -63,26 +57,26 @@ static int s_sar_power_on_cnt;
 
 static void s_sar_power_acquire(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_sar_power_on_cnt++;
     if (s_sar_power_on_cnt == 1) {
         sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_ON);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 static void s_sar_power_release(void)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     s_sar_power_on_cnt--;
     if (s_sar_power_on_cnt < 0) {
-        LEAVE_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG, "%s called, but s_sar_power_on_cnt == 0", __func__);
         abort();
     } else if (s_sar_power_on_cnt == 0) {
         sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
     }
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 
diff --git a/components/esp_hw_support/regi2c_ctrl.c b/components/esp_hw_support/regi2c_ctrl.c
index 7a15297e15..107bf0521b 100644
--- a/components/esp_hw_support/regi2c_ctrl.c
+++ b/components/esp_hw_support/regi2c_ctrl.c
@@ -13,53 +13,56 @@
 #include "hal/regi2c_ctrl_ll.h"
 #include "esp_hw_log.h"
 
-static int mux;
-
-#define ENTER_CRITICAL_SECTION()    do { mux = irq_lock(); } while(0)
-#define LEAVE_CRITICAL_SECTION()    irq_unlock(mux);
-
 static DRAM_ATTR __attribute__((unused)) const char *TAG = "REGI2C";
 
+static unsigned int regi2c_lock;
+static atomic_t regi2c_lock_counter;
+
 #ifndef BOOTLOADER_BUILD
 uint8_t IRAM_ATTR regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     uint8_t value = regi2c_read_reg_raw(block, host_id, reg_add);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
     return value;
 }
 
 uint8_t IRAM_ATTR regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     uint8_t value = regi2c_read_reg_mask_raw(block, host_id, reg_add, msb, lsb);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
     return value;
 }
 
 void IRAM_ATTR regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     regi2c_write_reg_raw(block, host_id, reg_add, data);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 
 void IRAM_ATTR regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data)
 {
-    ENTER_CRITICAL_SECTION();
+    unsigned int key = irq_lock();
     regi2c_write_reg_mask_raw(block, host_id, reg_add, msb, lsb, data);
-    LEAVE_CRITICAL_SECTION();
+    irq_unlock(key);
 }
 #endif /* BOOTLOADER_BUILD */
 
 void IRAM_ATTR regi2c_enter_critical(void)
 {
-    ENTER_CRITICAL_SECTION();
+    if (atomic_inc(&regi2c_lock_counter) == 0) {
+        regi2c_lock = irq_lock();
+    }
 }
 
 void IRAM_ATTR regi2c_exit_critical(void)
 {
-    LEAVE_CRITICAL_SECTION();
+    __ASSERT_NO_MSG(atomic_get(&regi2c_lock_counter) > 0);
+    if (atomic_dec(&regi2c_lock_counter) == 1) {
+        irq_unlock(regi2c_lock);
+    }
 }
 
 /**
@@ -93,24 +96,23 @@ static int s_i2c_saradc_enable_cnt;
 
 void regi2c_saradc_enable(void)
 {
-    regi2c_enter_critical();
+    unsigned int key = irq_lock();
     s_i2c_saradc_enable_cnt++;
     if (s_i2c_saradc_enable_cnt == 1) {
         regi2c_ctrl_ll_i2c_saradc_enable();
     }
-    regi2c_exit_critical();
+    irq_unlock(key);
 }
 
 void regi2c_saradc_disable(void)
 {
-    regi2c_enter_critical();
+    unsigned int key = irq_lock();
     s_i2c_saradc_enable_cnt--;
     if (s_i2c_saradc_enable_cnt < 0){
-        regi2c_exit_critical();
+        irq_unlock(key);
         ESP_HW_LOGE(TAG, "REGI2C_SARADC is already disabled");
     } else if (s_i2c_saradc_enable_cnt == 0) {
         regi2c_ctrl_ll_i2c_saradc_disable();
     }
-    regi2c_exit_critical();
-
+    irq_unlock(key);
 }
diff --git a/components/esp_hw_support/rtc_module.c b/components/esp_hw_support/rtc_module.c
index 5b57103a0e..9cdd93f9c1 100644
--- a/components/esp_hw_support/rtc_module.c
+++ b/components/esp_hw_support/rtc_module.c
@@ -35,7 +35,6 @@ static const char *TAG = "rtc_module";
 
 #define NOT_REGISTERED      (-1)
 
-int rtc_spinlock;
 static DRAM_ATTR int s_rtc_isr_handler_list_lock;
 #define RTC_ISR_HANDLER_ENTER_CRITICAL()    do { s_rtc_isr_handler_list_lock = irq_lock(); } while(0)
 #define RTC_ISR_HANDLER_EXIT_CRITICAL()    irq_unlock(s_rtc_isr_handler_list_lock);
diff --git a/components/esp_hw_support/sar_periph_ctrl_common.c b/components/esp_hw_support/sar_periph_ctrl_common.c
index d569ada3b5..bad888e095 100644
--- a/components/esp_hw_support/sar_periph_ctrl_common.c
+++ b/components/esp_hw_support/sar_periph_ctrl_common.c
@@ -18,12 +18,6 @@
 #include "esp_private/periph_ctrl.h"
 #include "esp_private/adc_share_hw_ctrl.h"
 
-extern int rtc_spinlock;
-
-#define RTC_ENTER_CRITICAL()    do { rtc_spinlock = irq_lock(); } while(0)
-#define RTC_EXIT_CRITICAL()    irq_unlock(rtc_spinlock);
-
-
 /*------------------------------------------------------------------------------------------------------------
 -----------------------------------------Temperature Sensor---------------------------------------------------
 ------------------------------------------------------------------------------------------------------------*/
@@ -39,7 +33,7 @@ static uint8_t s_tsens_idx = 2; // Index for temperature attribute, set 2(middle
 
 void temperature_sensor_power_acquire(void)
 {
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     s_temperature_sensor_power_cnt++;
     if (s_temperature_sensor_power_cnt == 1) {
         adc_apb_periph_claim();
@@ -49,16 +43,16 @@ void temperature_sensor_power_acquire(void)
         temperature_sensor_ll_clk_enable(true);
         temperature_sensor_ll_enable(true);
     }
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
 }
 
 void temperature_sensor_power_release(void)
 {
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
     s_temperature_sensor_power_cnt--;
     /* Sanity check */
     if (s_temperature_sensor_power_cnt < 0) {
-        RTC_EXIT_CRITICAL();
+        irq_unlock(key);
         ESP_LOGE(TAG_TSENS, "%s called, but s_temperature_sensor_power_cnt == 0", __func__);
         abort();
     } else if (s_temperature_sensor_power_cnt == 0) {
@@ -68,7 +62,7 @@ void temperature_sensor_power_release(void)
         periph_module_disable(PERIPH_TEMPSENSOR_MODULE);
         adc_apb_periph_free();
     }
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
 }
 
 static int temperature_sensor_get_raw_value(void)
@@ -84,7 +78,7 @@ void temp_sensor_sync_tsens_idx(int tsens_idx)
 
 int16_t temp_sensor_get_raw_value(bool *range_changed)
 {
-    RTC_ENTER_CRITICAL();
+    unsigned int key = irq_lock();
 
     int degree = temperature_sensor_get_raw_value();
     uint8_t temperature_dac;
@@ -95,7 +89,7 @@ int16_t temp_sensor_get_raw_value(bool *range_changed)
         if (range_changed != NULL) {
             *range_changed = false;
         }
-        RTC_EXIT_CRITICAL();
+        irq_unlock(key);
         return degree;
     }
 
@@ -127,7 +121,7 @@ int16_t temp_sensor_get_raw_value(bool *range_changed)
         *range_changed = true;
     }
 
-    RTC_EXIT_CRITICAL();
+    irq_unlock(key);
     return degree;
 }
 
diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
index d59c7ed2d9..1a3a388e84 100644
--- a/components/esp_hw_support/sleep_modes.c
+++ b/components/esp_hw_support/sleep_modes.c
@@ -1207,7 +1207,7 @@ esp_err_t esp_light_sleep_start(void)
      *
      * - esp_clk_slowclk_cal_set() -> esp_rtc_get_time_us()
      */
-    esp_clk_private_lock();
+    unsigned int key = irq_lock();
 
     s_config.rtc_ticks_at_sleep_start = rtc_time_get();
     uint32_t ccount_at_sleep_start = esp_cpu_get_cycle_count();
@@ -1344,7 +1344,7 @@ esp_err_t esp_light_sleep_start(void)
         // esp_set_time_from_rtc();
     }
 
-    esp_clk_private_unlock();
+    irq_unlock(key);
     esp_timer_private_unlock();
 
     if (!wdt_was_enabled) {
diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c
index 789f4ce9ff..910575d0c9 100644
--- a/components/esp_phy/src/phy_init.c
+++ b/components/esp_phy/src/phy_init.c
@@ -22,6 +22,8 @@
 #include "esp_check.h"
 #include "sdkconfig.h"
 #include <zephyr/kernel.h>
+#include <zephyr/sys/atomic.h>
+#include <zephyr/sys/__assert.h>
 #include <esp_heap_caps.h>
 #include "esp_private/phy.h"
 #include "phy_init_data.h"
@@ -71,7 +73,7 @@ static int64_t s_phy_rf_en_ts = 0;
 
 /* PHY spinlock for libphy.a */
 static DRAM_ATTR int s_phy_int_mux;
-static DRAM_ATTR int s_phy_lock_nest = 0;
+static atomic_t s_phy_lock_nest;
 
 /* Indicate PHY is calibrated or not */
 static bool s_is_phy_calibrated = false;
@@ -211,27 +213,16 @@ esp_err_t phy_clear_used_time(esp_phy_modem_t modem) {
 
 uint32_t IRAM_ATTR phy_enter_critical(void)
 {
-    int key = irq_lock();
-    if(s_phy_lock_nest == 0) {
-        s_phy_int_mux = key;
+    if (atomic_inc(&s_phy_lock_nest) == 0) {
+        s_phy_int_mux = irq_lock();
     }
-
-    if(s_phy_lock_nest < 0xFFFFFFFF) {
-        s_phy_lock_nest++;
-    }
-
-    // Interrupt level will be stored in current tcb, so always return zero.
     return 0;
 }
 
 void IRAM_ATTR phy_exit_critical(uint32_t level)
 {
-    if(s_phy_lock_nest > 0) {
-        s_phy_lock_nest--;
-    }
-
-    if(s_phy_lock_nest == 0) {
-        // Param level don't need any more, ignore it.
+    __ASSERT_NO_MSG(atomic_get(&s_phy_lock_nest) > 0);
+    if (atomic_dec(&s_phy_lock_nest) == 1) {
         irq_unlock(s_phy_int_mux);
     }
 }
diff --git a/components/esp_timer/src/esp_timer.c b/components/esp_timer/src/esp_timer.c
index 9ea56e1e12..8af431064e 100644
--- a/components/esp_timer/src/esp_timer.c
+++ b/components/esp_timer/src/esp_timer.c
@@ -87,8 +87,6 @@ static inline bool is_initialized(void);
 static esp_err_t timer_insert(esp_timer_handle_t timer, bool without_update_alarm);
 static esp_err_t timer_remove(esp_timer_handle_t timer);
 static bool timer_armed(esp_timer_handle_t timer);
-static void timer_list_lock(esp_timer_dispatch_t timer_type);
-static void timer_list_unlock(esp_timer_dispatch_t timer_type);
 
 #if WITH_PROFILING
 static void timer_insert_inactive(esp_timer_handle_t timer);
@@ -114,10 +112,6 @@ K_KERNEL_STACK_MEMBER(timer_task_stack, CONFIG_ESP32_TIMER_TASK_STACK_SIZE);
 static struct k_thread s_timer_task;
 // counting semaphore used to notify the timer task from ISR
 static struct k_sem s_timer_semaphore;
-// lock protecting s_timers, s_inactive_timers
-static unsigned int s_timer_lock[ESP_TIMER_MAX] = {
-    [0 ... (ESP_TIMER_MAX - 1)] = 0
-};
 
 #ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
 // For ISR dispatch method, a callback function of the timer may require a context switch
@@ -145,9 +139,10 @@ esp_err_t esp_timer_create(const esp_timer_create_args_t* args,
 #if WITH_PROFILING
     result->name = args->name;
     esp_timer_dispatch_t dispatch_method = result->flags & FL_ISR_DISPATCH_METHOD;
-    timer_list_lock(dispatch_method);
+    ARG_UNUSED(dispatch_method);
+    unsigned int key = irq_lock();
     timer_insert_inactive(result);
-    timer_list_unlock(dispatch_method);
+    irq_unlock(key);
 #endif
     *out_handle = result;
     return ESP_OK;
@@ -167,17 +162,13 @@ esp_err_t IRAM_ATTR esp_timer_restart(esp_timer_handle_t timer, uint64_t timeout
         return ESP_ERR_INVALID_ARG;
     }
 
-    if (!is_initialized()) {
+    if (!is_initialized() || !timer_armed(timer)) {
         return ESP_ERR_INVALID_STATE;
     }
 
     esp_timer_dispatch_t dispatch_method = timer->flags & FL_ISR_DISPATCH_METHOD;
-    timer_list_lock(dispatch_method);
-
-    if (!timer_armed(timer)) {
-        timer_list_unlock(dispatch_method);
-        return ESP_ERR_INVALID_STATE;
-    }
+    ARG_UNUSED(dispatch_method);
+    unsigned int key = irq_lock();
 
     const int64_t now = esp_timer_impl_get_time();
     const uint64_t period = timer->period;
@@ -204,7 +195,7 @@ esp_err_t IRAM_ATTR esp_timer_restart(esp_timer_handle_t timer, uint64_t timeout
         ret = timer_insert(timer, false);
     }
 
-    timer_list_unlock(dispatch_method);
+    irq_unlock(key);
 
     return ret;
 }
@@ -219,9 +210,10 @@ esp_err_t IRAM_ATTR esp_timer_start_once(esp_timer_handle_t timer, uint64_t time
     }
     int64_t alarm = esp_timer_get_time() + timeout_us;
     esp_timer_dispatch_t dispatch_method = timer->flags & FL_ISR_DISPATCH_METHOD;
+    ARG_UNUSED(dispatch_method);
     esp_err_t err;
 
-    timer_list_lock(dispatch_method);
+    unsigned int key = irq_lock();
 
     /* Check if the timer is armed once the list is locked.
      * Otherwise another task may arm the timer inbetween the check
@@ -239,7 +231,7 @@ esp_err_t IRAM_ATTR esp_timer_start_once(esp_timer_handle_t timer, uint64_t time
         err = timer_insert(timer, false);
     }
 
-     timer_list_unlock(dispatch_method);
+     irq_unlock(key);
      return err;
 }
 
@@ -254,8 +246,9 @@ esp_err_t IRAM_ATTR esp_timer_start_periodic(esp_timer_handle_t timer, uint64_t
     period_us = MAX(period_us, esp_timer_impl_get_min_period_us());
     int64_t alarm = esp_timer_get_time() + period_us;
     esp_timer_dispatch_t dispatch_method = timer->flags & FL_ISR_DISPATCH_METHOD;
+    ARG_UNUSED(dispatch_method);
     esp_err_t err;
-    timer_list_lock(dispatch_method);
+    unsigned int key = irq_lock();
 
     /* Check if the timer is armed once the list is locked to avoid a data race */
     if (timer_armed(timer)) {
@@ -270,7 +263,7 @@ esp_err_t IRAM_ATTR esp_timer_start_periodic(esp_timer_handle_t timer, uint64_t
         err = timer_insert(timer, false);
     }
 
-     timer_list_unlock(dispatch_method);
+     irq_unlock(key);
      return err;
 }
 
@@ -280,9 +273,10 @@ esp_err_t IRAM_ATTR esp_timer_stop(esp_timer_handle_t timer)
         return ESP_ERR_INVALID_STATE;
     }
     esp_timer_dispatch_t dispatch_method = timer->flags & FL_ISR_DISPATCH_METHOD;
+    ARG_UNUSED(dispatch_method);
     esp_err_t err;
 
-    timer_list_lock(dispatch_method);
+    unsigned int key = irq_lock();
 
     /* Check if the timer is armed once the list is locked to avoid a data race */
     if (!timer_armed(timer)) {
@@ -290,7 +284,7 @@ esp_err_t IRAM_ATTR esp_timer_stop(esp_timer_handle_t timer)
     } else {
         err = timer_remove(timer);
     }
-    timer_list_unlock(dispatch_method);
+    irq_unlock(key);
     return err;
 }
 
@@ -301,7 +295,7 @@ esp_err_t esp_timer_delete(esp_timer_handle_t timer)
     }
     int64_t alarm = esp_timer_get_time();
     esp_err_t err;
-    timer_list_lock(ESP_TIMER_TASK);
+    unsigned int key = irq_lock();
 
     /* Check if the timer is armed once the list is locked to avoid a data race */
      if (timer_armed(timer)) {
@@ -317,7 +311,7 @@ esp_err_t esp_timer_delete(esp_timer_handle_t timer)
         timer->period = 0;
         err = timer_insert(timer, false);
     }
-    timer_list_unlock(ESP_TIMER_TASK);
+    irq_unlock(key);
     return err;
 }
 
@@ -398,30 +392,13 @@ static IRAM_ATTR bool timer_armed(esp_timer_handle_t timer)
     return timer->alarm > 0;
 }
 
-static IRAM_ATTR void timer_list_lock(esp_timer_dispatch_t timer_type)
-{
-    unsigned key = irq_lock();
-
-    /* ensure lock is not already held */
-    __ASSERT_NO_MSG(s_timer_lock[timer_type] == 0);
-    s_timer_lock[timer_type] = key;
-}
-
-static IRAM_ATTR void timer_list_unlock(esp_timer_dispatch_t timer_type)
-{
-    unsigned int key = s_timer_lock[timer_type];
-    s_timer_lock[timer_type] = 0;
-
-    irq_unlock(key);
-}
-
 #ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
 static IRAM_ATTR bool timer_process_alarm(esp_timer_dispatch_t dispatch_method)
 #else
 static bool timer_process_alarm(esp_timer_dispatch_t dispatch_method)
 #endif
 {
-    timer_list_lock(dispatch_method);
+    unsigned int key = irq_lock();
     bool processed = false;
     esp_timer_handle_t it;
     while (1) {
@@ -461,9 +438,9 @@ static bool timer_process_alarm(esp_timer_dispatch_t dispatch_method)
 #endif
             esp_timer_cb_t callback = it->callback;
             void* arg = it->arg;
-            timer_list_unlock(dispatch_method);
+            irq_unlock(key);
             (*callback)(arg);
-            timer_list_lock(dispatch_method);
+            key = irq_lock();
 #if WITH_PROFILING
             it->times_triggered++;
             it->total_callback_run_time += esp_timer_impl_get_time() - callback_start;
@@ -479,7 +456,7 @@ static bool timer_process_alarm(esp_timer_dispatch_t dispatch_method)
             esp_timer_impl_set_alarm_id(UINT64_MAX, dispatch_method);
         }
     }
-    timer_list_unlock(dispatch_method);
+    irq_unlock(key);
     return processed;
 }
 
@@ -573,7 +550,7 @@ esp_err_t esp_timer_init(void)
             ESP_EARLY_LOGE(TAG, "ISR init failed");
             deinit_timer_task();
         }
-		init_status = true;
+        init_status = true;
     }
     return err;
 }
@@ -649,7 +626,7 @@ esp_err_t esp_timer_dump(FILE* stream)
     /* First count the number of timers */
     size_t timer_count = 0;
     for (esp_timer_dispatch_t dispatch_method = ESP_TIMER_TASK; dispatch_method < ESP_TIMER_MAX; ++dispatch_method) {
-        timer_list_lock(dispatch_method);
+        unsigned int key = irq_lock();
         LIST_FOREACH(it, &s_timers[dispatch_method], list_entry) {
             ++timer_count;
         }
@@ -658,7 +635,7 @@ esp_err_t esp_timer_dump(FILE* stream)
             ++timer_count;
         }
 #endif
-        timer_list_unlock(dispatch_method);
+        irq_unlock(key);
     }
 
     /* Allocate the memory for this number of timers. Since we have unlocked,
@@ -675,7 +652,7 @@ esp_err_t esp_timer_dump(FILE* stream)
     /* Print to the buffer */
     char* pos = print_buf;
     for (esp_timer_dispatch_t dispatch_method = ESP_TIMER_TASK; dispatch_method < ESP_TIMER_MAX; ++dispatch_method) {
-        timer_list_lock(dispatch_method);
+        unsigned int key = irq_lock();
         LIST_FOREACH(it, &s_timers[dispatch_method], list_entry) {
             print_timer_info(it, &pos, &buf_size);
         }
@@ -684,7 +661,7 @@ esp_err_t esp_timer_dump(FILE* stream)
             print_timer_info(it, &pos, &buf_size);
         }
 #endif
-        timer_list_unlock(dispatch_method);
+        irq_unlock(key);
     }
 
     if (stream != NULL) {
@@ -708,14 +685,14 @@ int64_t IRAM_ATTR esp_timer_get_next_alarm(void)
 {
     int64_t next_alarm = INT64_MAX;
     for (esp_timer_dispatch_t dispatch_method = ESP_TIMER_TASK; dispatch_method < ESP_TIMER_MAX; ++dispatch_method) {
-        timer_list_lock(dispatch_method);
+        unsigned int key = irq_lock();
         esp_timer_handle_t it = LIST_FIRST(&s_timers[dispatch_method]);
         if (it) {
             if (next_alarm > it->alarm) {
                 next_alarm = it->alarm;
             }
         }
-        timer_list_unlock(dispatch_method);
+        irq_unlock(key);
     }
     return next_alarm;
 }
@@ -724,7 +701,7 @@ int64_t IRAM_ATTR esp_timer_get_next_alarm_for_wake_up(void)
 {
     int64_t next_alarm = INT64_MAX;
     for (esp_timer_dispatch_t dispatch_method = ESP_TIMER_TASK; dispatch_method < ESP_TIMER_MAX; ++dispatch_method) {
-        timer_list_lock(dispatch_method);
+        unsigned int key = irq_lock();
         esp_timer_handle_t it = NULL;
         LIST_FOREACH(it, &s_timers[dispatch_method], list_entry) {
             // timers with the SKIP_UNHANDLED_EVENTS flag do not want to wake up CPU from a sleep mode.
@@ -735,7 +712,7 @@ int64_t IRAM_ATTR esp_timer_get_next_alarm_for_wake_up(void)
                 break;
             }
         }
-        timer_list_unlock(dispatch_method);
+        irq_unlock(key);
     }
     return next_alarm;
 }
@@ -747,10 +724,11 @@ esp_err_t IRAM_ATTR esp_timer_get_period(esp_timer_handle_t timer, uint64_t *per
     }
 
     esp_timer_dispatch_t dispatch_method = timer->flags & FL_ISR_DISPATCH_METHOD;
+    ARG_UNUSED(dispatch_method);
 
-    timer_list_lock(dispatch_method);
+    unsigned int key = irq_lock();
     *period = timer->period;
-    timer_list_unlock(dispatch_method);
+    irq_unlock(key);
 
     return ESP_OK;
 }
@@ -767,10 +745,11 @@ esp_err_t IRAM_ATTR esp_timer_get_expiry_time(esp_timer_handle_t timer, uint64_t
     }
 
     esp_timer_dispatch_t dispatch_method = timer->flags & FL_ISR_DISPATCH_METHOD;
+    ARG_UNUSED(dispatch_method);
 
-    timer_list_lock(dispatch_method);
+    unsigned int key = irq_lock();
     *expiry = timer->alarm;
-    timer_list_unlock(dispatch_method);
+    irq_unlock(key);
 
     return ESP_OK;
 }
diff --git a/components/esp_timer/src/esp_timer_impl_common.c b/components/esp_timer/src/esp_timer_impl_common.c
index 42a10c6b72..db8b4b4a67 100644
--- a/components/esp_timer/src/esp_timer_impl_common.c
+++ b/components/esp_timer/src/esp_timer_impl_common.c
@@ -9,9 +9,12 @@
 #include "esp_task.h"
 #include "esp_attr.h"
 #include <zephyr/kernel.h>
+#include <zephyr/sys/atomic.h>
+#include <zephyr/sys/__assert.h>
 
 /* Spinlock used to protect access to the hardware registers. */
 unsigned int s_time_update_lock;
+static atomic_t s_timer_lock_counter;
 
 /* Alarm values to generate interrupt on match
  * [0] - for ESP_TIMER_TASK alarms,
@@ -21,12 +24,17 @@ uint64_t timestamp_id[2] = { UINT64_MAX, UINT64_MAX };
 
 void esp_timer_impl_lock(void)
 {
-    s_time_update_lock = irq_lock();
+    if (atomic_inc(&s_timer_lock_counter) == 0) {
+        s_time_update_lock = irq_lock();
+    }
 }
 
 void esp_timer_impl_unlock(void)
 {
-    irq_unlock(s_time_update_lock);
+    __ASSERT_NO_MSG(atomic_get(&s_timer_lock_counter) > 0);
+    if (atomic_dec(&s_timer_lock_counter) == 1) {
+        irq_unlock(s_time_update_lock);
+    }
 }
 
 void esp_timer_private_lock(void) __attribute__((alias("esp_timer_impl_lock")));
@@ -39,7 +47,7 @@ void IRAM_ATTR esp_timer_impl_set_alarm(uint64_t timestamp)
 
 #ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
 void IRAM_ATTR esp_timer_impl_try_to_set_next_alarm(void) {
-    s_time_update_lock = irq_lock();
+    esp_timer_impl_lock();
     unsigned now_alarm_idx;  // ISR is called due to this current alarm
     unsigned next_alarm_idx; // The following alarm after now_alarm_idx
     if (timestamp_id[0] < timestamp_id[1]) {
@@ -59,7 +67,7 @@ void IRAM_ATTR esp_timer_impl_try_to_set_next_alarm(void) {
         // Remove the current alarm from consideration as well.
         timestamp_id[now_alarm_idx] = UINT64_MAX;
     }
-    irq_unlock(s_time_update_lock);
+    esp_timer_impl_unlock();
 }
 #endif
 
diff --git a/components/esp_timer/src/esp_timer_impl_lac.c b/components/esp_timer/src/esp_timer_impl_lac.c
index de0149df67..c47739d956 100644
--- a/components/esp_timer/src/esp_timer_impl_lac.c
+++ b/components/esp_timer/src/esp_timer_impl_lac.c
@@ -98,9 +98,6 @@ static const char* TAG = "esp_timer_impl";
  */
 static alarm_intr_handler_t s_alarm_handler;
 
-/* Spinlock used to protect access to the hardware registers. */
-extern unsigned int s_time_update_lock;
-
 /* Alarm values to generate interrupt on match */
 extern uint64_t timestamp_id[2];
 
@@ -144,7 +141,7 @@ int64_t esp_timer_get_time(void) __attribute__((alias("esp_timer_impl_get_time")
 
 void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id)
 {
-    s_time_update_lock = irq_lock();
+    esp_timer_impl_lock();
     timestamp_id[alarm_id] = timestamp;
     timestamp = MIN(timestamp_id[0], timestamp_id[1]);
     if (timestamp != UINT64_MAX) {
@@ -168,7 +165,7 @@ void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id
             }
         } while(1);
     }
-    irq_unlock(s_time_update_lock);
+    esp_timer_impl_unlock();
 }
 
 static void IRAM_ATTR timer_alarm_isr(void *arg)
@@ -181,21 +178,21 @@ static void IRAM_ATTR timer_alarm_isr(void *arg)
 
 void IRAM_ATTR esp_timer_impl_update_apb_freq(uint32_t apb_ticks_per_us)
 {
-    s_time_update_lock = irq_lock();
+    esp_timer_impl_lock();
     assert(apb_ticks_per_us >= 3 && "divider value too low");
     assert(apb_ticks_per_us % TICKS_PER_US == 0 && "APB frequency (in MHz) should be divisible by TICK_PER_US");
     REG_SET_FIELD(CONFIG_REG, TIMG_LACT_DIVIDER, apb_ticks_per_us / TICKS_PER_US);
-    irq_unlock(s_time_update_lock);
+    esp_timer_impl_unlock();
 }
 
 void esp_timer_impl_set(uint64_t new_us)
 {
-    s_time_update_lock = irq_lock();
+    esp_timer_impl_lock();
     timer_64b_reg_t dst = { .val = new_us * TICKS_PER_US };
     REG_WRITE(LOAD_LO_REG, dst.lo);
     REG_WRITE(LOAD_HI_REG, dst.hi);
     REG_WRITE(LOAD_REG, 1);
-    irq_unlock(s_time_update_lock);
+    esp_timer_impl_unlock();
 }
 
 void esp_timer_impl_advance(int64_t time_diff_us)
@@ -264,12 +261,12 @@ void esp_timer_impl_deinit(void)
 
 uint64_t esp_timer_impl_get_alarm_reg(void)
 {
-    s_time_update_lock = irq_lock();
+    esp_timer_impl_lock();
     timer_64b_reg_t alarm = {
         .lo = REG_READ(ALARM_LO_REG),
         .hi = REG_READ(ALARM_HI_REG)
     };
-    irq_unlock(s_time_update_lock);
+    esp_timer_impl_unlock();
     return alarm.val;
 }
 
diff --git a/components/esp_timer/src/esp_timer_impl_systimer.c b/components/esp_timer/src/esp_timer_impl_systimer.c
index 96c1290a55..8c10091956 100644
--- a/components/esp_timer/src/esp_timer_impl_systimer.c
+++ b/components/esp_timer/src/esp_timer_impl_systimer.c
@@ -47,9 +47,6 @@ static intr_handler_t s_alarm_handler = NULL;
 /* Systimer HAL layer object */
 static systimer_hal_context_t systimer_hal;
 
-/* Spinlock used to protect access to the hardware registers. */
-extern unsigned int s_time_update_lock;
-
 /* Alarm values to generate interrupt on match */
 extern uint64_t timestamp_id[2];
 
@@ -69,11 +66,11 @@ int64_t esp_timer_get_time(void) __attribute__((alias("esp_timer_impl_get_time")
 
 void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id)
 {
-    s_time_update_lock = irq_lock();
+    esp_timer_impl_lock();
     timestamp_id[alarm_id] = timestamp;
     timestamp = MIN(timestamp_id[0], timestamp_id[1]);
     systimer_hal_set_alarm_target(&systimer_hal, SYSTIMER_ALARM_ESPTIMER, timestamp);
-    irq_unlock(s_time_update_lock);
+    esp_timer_impl_unlock();
 }
 
 static void IRAM_ATTR timer_alarm_isr(void *arg)
@@ -93,20 +90,20 @@ void IRAM_ATTR esp_timer_impl_update_apb_freq(uint32_t apb_ticks_per_us)
 
 void esp_timer_impl_set(uint64_t new_us)
 {
-    s_time_update_lock = irq_lock();
+    esp_timer_impl_lock();
     systimer_counter_value_t new_count = {
         .val = systimer_hal.us_to_ticks(new_us),
     };
     systimer_ll_set_counter_value(systimer_hal.dev, SYSTIMER_COUNTER_ESPTIMER, new_count.val);
     systimer_ll_apply_counter_value(systimer_hal.dev, SYSTIMER_COUNTER_ESPTIMER);
-    irq_unlock(s_time_update_lock);
+    esp_timer_impl_unlock();
 }
 
 void esp_timer_impl_advance(int64_t time_diff_us)
 {
-    s_time_update_lock = irq_lock();
+    esp_timer_impl_lock();
     systimer_hal_counter_value_advance(&systimer_hal, SYSTIMER_COUNTER_ESPTIMER, time_diff_us);
-    irq_unlock(s_time_update_lock);
+    esp_timer_impl_unlock();
 }
 
 esp_err_t esp_timer_impl_early_init(void)
@@ -176,9 +173,9 @@ void esp_timer_impl_deinit(void)
 
 uint64_t esp_timer_impl_get_alarm_reg(void)
 {
-    s_time_update_lock = irq_lock();
+    esp_timer_impl_lock();
     uint64_t val = systimer_hal_get_alarm_value(&systimer_hal, SYSTIMER_ALARM_ESPTIMER);
-    irq_unlock(s_time_update_lock);
+    esp_timer_impl_unlock();
     return val;
 }