wiseconnect: Adding M4 soft reset

Origin: Silicon Labs WiseConnect SDK
License: Zlib
URL: https://github.com/siliconlabs/wiseconnect
Commit: db28bd581082517ca2342467fa4f59c6b9b30cd0
Version: v3.5.0-rc4
Purpose: Adding M4 SoC soft reset source files
to enable use of the reset API following the
firmware upgrade process.

Signed-off-by: Rahul Gurram <[email protected]>

Author: ragurram26

wiseconnect/components/device/silabs/si91x/mcu/hal/inc/sl_si91x_hal_soc_soft_reset.h

@@ -0,0 +1,59 @@
+/***************************************************************************/ /**
+ * @file sl_si91x_hal_soc_soft_reset.h
+ * @brief SoC soft reset API
+ *******************************************************************************
+ * # License
+ * <b>Copyright 2023 Silicon Laboratories Inc. www.silabs.com</b>
+ *******************************************************************************
+ *
+ * SPDX-License-Identifier: Zlib
+ *
+ * The licensor of this software is Silicon Laboratories Inc.
+ *
+ * This software is provided 'as-is', without any express or implied
+ * warranty. In no event will the authors be held liable for any damages
+ * arising from the use of this software.
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software. If you use this software
+ *    in a product, an acknowledgment in the product documentation would be
+ *    appreciated but is not required.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ *
+ ******************************************************************************/
+
+#ifndef __SL_SI91X_HAL_SOC_SOFT_RESET__
+#define __SL_SI91X_HAL_SOC_SOFT_RESET__
+
+#include "rsi_qspi.h"
+
+/** @cond DOXYGEN_IGNORE */
+#define M4_QSPI_AES_CONFIG  *(volatile uint32 *)0x120000C8
+#define AES_QSPI_KEY_SIZE   BIT(16)
+#define AES_QSPI_KEY_LENGTH BIT(11)
+/** @endcond */
+
+/** 
+ * \addtogroup SOFT_RESET_FUNCTIONS Soft Reset
+ * \ingroup COMMON_SECTION_FUNCTIONS
+ * @{ */
+
+/**
+ * @brief        To perform a Nested Vectored Interrupt Controller (NVIC) soft reset on the Si91X SoC.
+ * 
+ * @details      This function initiates a system reset request to reset the SoC.
+ *               It resets the M4 core and the Network Processor (NWP) of the Si91X SoC, bringing the system back to its initial state.
+ * 
+ * @note         Ensure that all necessary data is saved before calling this function because it will reset the NVIC and potentially disrupt ongoing processes.
+ */
+void sl_si91x_soc_nvic_reset(void);
+
+/** @} */
+
+#endif

wiseconnect/components/device/silabs/si91x/mcu/hal/src/sl_si91x_hal_soc_soft_reset.c

@@ -0,0 +1,67 @@
+/***************************************************************************/ /**
+ * @file sl_si91x_hal_soft_reset.c
+ * @brief SoC soft reset API
+ *******************************************************************************
+ * # License
+ * <b>Copyright 2023 Silicon Laboratories Inc. www.silabs.com</b>
+ *******************************************************************************
+ *
+ * SPDX-License-Identifier: Zlib
+ *
+ * The licensor of this software is Silicon Laboratories Inc.
+ *
+ * This software is provided 'as-is', without any express or implied
+ * warranty. In no event will the authors be held liable for any damages
+ * arising from the use of this software.
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software. If you use this software
+ *    in a product, an acknowledgment in the product documentation would be
+ *    appreciated but is not required.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ *
+ ******************************************************************************/
+#include "rsi_wwdt.h"
+#include "cmsis_os2.h"
+#include "sl_si91x_hal_soc_soft_reset.h"
+
+/*
+ *
+ * @brief  This API is used to do soc NVIC reset with the debug module disabled.
+ * @param  None
+ * @return None
+ */
+void sl_si91x_soc_nvic_reset(void)
+{
+  /*Changing the lf fsm clock to 32KHz RC */
+  RSI_PS_FsmLfClkSel(KHZ_RC_CLK_SEL);
+  /*Upon Reset key size is 16 by default in case of inline  encryption */
+  /*Store key length bit (32 Bytes) in BBFF if device security is with 32 Bytes key*/
+  if (M4_QSPI_AES_CONFIG & AES_QSPI_KEY_SIZE) {
+    M4_BBFF_STORAGE1 |= AES_QSPI_KEY_LENGTH;
+  }
+  __asm volatile("cpsid i" ::: "memory");
+  /*Data Synchronization Barrier */
+  __DSB();
+  /*Instruction Synchronization Barrier */
+  __ISB();
+  /*Power Down the Debug Module */
+  RSI_PS_M4ssPeriPowerDown(M4SS_PWRGATE_ULP_M4_DEBUG_FPU);
+  /*Set the SYSRESETREQ bit in the AIRCR register to initiate a system reset */
+  SCB->AIRCR = (0x5FA << SCB_AIRCR_VECTKEY_Pos) | SCB_AIRCR_SYSRESETREQ_Msk;
+  /*Ensure the instruction is not optimized out */
+  /*Data Synchronization Barrier */
+  __DSB();
+  /*Instruction Synchronization Barrier */
+  __ISB();
+  /*Wait for the reset to occur */
+  while (1) {
+    /* Infinite loop to keep the program running until the reset happens */
+  }
+}