CUSTOM RT685 won't boot when flash driver is enabled (CONFIG_FLASH=y) - blocking LittleFS and MCUboot usage

[skanda19]

Hello,

I been working with a custom board based on the RT600 with an octal memory ISSI IS25WX256-JHLE. I been trying to add support for Little FS and eventually MCUBOOT but when I explored the examples available with these features, both of them use CONFIG_FLASH and some other Kconfig options. In my case when I am working with my FCB without these Kconfig options my system boots and works just fine, but as soon as I add CONFIG_FLASH, my system just bricks and I get no output on my console.

I been trying multiple workarounds like commentating some of the initialization routines of the driver "flash_mcux_flexspi_nor.c", but my ideas doesn't seem to work.

my current flash_config.c looks like this:

const flexspi_nor_config_t flexspi_config = {
.memConfig = {
.tag = FLASH_CONFIG_BLOCK_TAG, /* 0x42464346 /
.version = FLASH_CONFIG_BLOCK_VERSION, / 0x56010400 /
.csHoldTime = 3,
.csSetupTime = 3,
.readSampleClkSrc = 3,
.deviceModeCfgEnable = 1,
.deviceModeType = kDeviceConfigCmdType_Generic, / kDeviceConfigCmdType_Spi2Xpi /
.waitTimeCfgCommands = 1,
.deviceModeType = 2, // cambiado
.waitTimeCfgCommands = 1,
.deviceModeSeq =
{
.seqNum = 1,
.seqId = 3,
},
.deviceModeArg = 0xE7,
.configCmdEnable = 1, // cambiado
.configModeType = {2, 0, 0},
.waitTimeCfgCommands = 1,
// .configCmdSeqs =
// {
// {
// .seqNum = 1,
// .seqId = 2,
// },
// {
// .seqNum = 2,
// .seqId = 8,
// },
// {
// .seqNum = 1,
// .seqId = 11,
// },
// },
.configCmdSeqs = {
{.seqNum = 1, .seqId = 3},
{0},
{0},
},
// .configCmdArgs = {0x2, 0x81},
.configCmdArgs = {0xE7, 0, 0},
.controllerMiscOption = 0x50,
.deviceType = 1, / NOR Flash /
.sflashPadType = kSerialFlash_8Pads, / kSerialFlash_8Pads /
.serialClkFreq = kFlexSpiSerialClk_SDR_48MHz,
.sflashA1Size = 0x2000000U, / 32MB /
.lookupTable = {
/ Read (Octal DDR) - Comando FDh (DDR Fast Read) */
[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xFD, RADDR_DDR, FLEXSPI_8PAD, 0x20),
[1] = FLEXSPI_LUT_SEQ(DUMMY_DDR, FLEXSPI_8PAD, 0x06, READ_DDR, FLEXSPI_8PAD, 0x04),

			/* Read Status (SPI) - Comando 05h */
			[4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,  FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),

			/* Read Status (Octal DDR) - Comando 05h en modo 8D */
			[4 * 2 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_8PAD, 0x05, READ_DDR, FLEXSPI_8PAD, 0x04),

			/* Write Enable (SPI) - Comando 06h */
			[4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,  FLEXSPI_1PAD, 0x06, STOP_EXE, FLEXSPI_1PAD, 0x00),

			/* Write Enable (Octal DDR) - Comando 06h en 8D */
			[4 * 4 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,  FLEXSPI_8PAD, 0x06, STOP_EXE,  FLEXSPI_1PAD, 0x00),

			/* Erase Sector (128KB) - Comando D8h en Octal DDR */
			[4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_8PAD, 0x52, RADDR_DDR, FLEXSPI_8PAD, 0x20),

			/* Erase Block (32KB) - Comando 52h (Subsector) */
			[4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_8PAD, 0x12, RADDR_DDR,   FLEXSPI_8PAD, 0x20),
			[4 * 8 + 1] = FLEXSPI_LUT_SEQ(WRITE_DDR, FLEXSPI_8PAD, 0x04, STOP_EXE,  FLEXSPI_1PAD, 0x00),

			/* Configure Dummy Cycles (Volatile CR) - Comando 81h */
			[4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_1PAD, 0x81, CMD_SDR, FLEXSPI_1PAD, 0x00),
			[4 * 9 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x00, CMD_SDR, FLEXSPI_1PAD, 0x00),
			[4 * 9 + 2] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x01, STOP_EXE, FLEXSPI_1PAD, 0x00),

// /* Configure Register (Non-Volatile CR) - Comando B1h */
[4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0xDC, RADDR_DDR, FLEXSPI_8PAD, 0x20),

			/* Page Program (Octal DDR) - Comando 84h */
			[4 * 13 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_8PAD, 0x84, CMD_SDR,   FLEXSPI_8PAD, 0x84),
			[4 * 13 + 1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 0x20, WRITE_DDR, FLEXSPI_8PAD, 0x04),

			/* Erase Chip - Comando 60h (Octal DDR) */
			[4 * 15 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,  FLEXSPI_8PAD, 0x60, CMD_SDR,  FLEXSPI_8PAD, 0x60), // Chip Erase

    },
},
.pageSize           = 0x100,         /* 256 bytes */
.sectorSize         = 0x1000,        /* 4KB */
.ipcmdSerialClkFreq = 1,
.serialNorType      = 2,
.blockSize          = 0x20000,        /* 128KB */
.flashStateCtx      = 0x07008100,

};

custom dts and dtsi:

/ {
model = "NXP CUSTOM_RT685 board";
compatible = "nxp,custom_rt685";

aliases {
	usart-0 = &flexcomm0;
	usart-1 = &flexcomm1;
};

chosen {
	zephyr,flash-controller = &is25wx256;
	zephyr,flash = &is25wx256;
	zephyr,code-partition = &slot0_partition;
	zephyr,uart-mcumgr = &flexcomm0;
	zephyr,sram = &sram0;
	zephyr,console = &flexcomm0;
	zephyr,shell-uart = &flexcomm0;
};

};

&flexspi {
pinctrl-0 = <&pinmux_flexspi>;
pinctrl-names = "default";
status = "okay";

/* ISSI IS25WX256 - 32MB Octal DDR Flash */
is25wx256: is25wx256@0 {
	compatible = "nxp,imx-flexspi-nor";
	
	/* 32MB (256Mbit) */
	size = <DT_SIZE_M(32)>;
	
	reg = <0>;
	
	/* Frecuencia máxima 48MHz según flash_config.c */
	spi-max-frequency = <48000000>;
	status = "okay";
	
	/* JEDEC ID para IS25WX256 */
	jedec-id = [9d 5b 19];
	
	/* Configuración de sectores */
	erase-block-size = <4096>;
	write-block-size = <1>;

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		/* Boot partition con boot header en offset 0x400 */
		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 DT_SIZE_K(128)>;
		};
		
		/* Imagen principal (Slot 0) - 15MB */
		slot0_partition: partition@20000 {
			label = "image-0";
			reg = <0x00020000 DT_SIZE_M(15)>;
		};
		
		/* Imagen de respaldo (Slot 1) - 15MB */
		slot1_partition: partition@f20000 {
			label = "image-1"; 
			reg = <0x00f20000 DT_SIZE_M(15)>;
		};
		
		/* Almacenamiento persistente */
		storage_partition: partition@1e20000 {
			label = "storage";
			reg = <0x01e20000 DT_SIZE_K(1792)>;
		};
		
		/* Configuración del sistema */
		config_partition: partition@1fe0000 {
			label = "config";
			reg = <0x01fe0000 DT_SIZE_K(128)>;
		};
	};
};

};

pinmux_flexspi: pinmux_flexspi {
	group0 {
		pinmux = 
			<FLEXSPI0A_SCLK_PIO1_18>,
			<FLEXSPI0A_SS0_N_PIO1_19>,
			<FLEXSPI0A_DATA0_PIO1_20>,
			<FLEXSPI0A_DATA1_PIO1_21>,
			<FLEXSPI0A_DATA2_PIO1_22>,
			<FLEXSPI0A_DATA3_PIO1_23>,
			<FLEXSPI0A_DATA4_PIO1_24>,
			<FLEXSPI0A_DATA5_PIO1_25>,
			<FLEXSPI0A_DATA6_PIO1_26>,
			<FLEXSPI0A_DATA7_PIO1_27>,
			<FLEXSPI0A_DQS_PIO1_28>;
		input-enable;
		slew-rate = "normal";
		drive-strength = "high";
	};
};

I been able to read memory areas using memory-map access at 0x8000000 and been able to confirm this by reading the fcb and later verified with j-flash commander reading the exact same region with the same data.

my code is based on the repo version 4.1.0

is there a way I could not use this options and still configure little fs and mcuboot to work with my project ? is there something I missing ?

please any help will be greatly appreciated.

[DerekSnell]

Hi @skanda19 ,
It sounds like you have the Flash Config Block (FCB) of the RT685 configured correctly to eXecute-in-Place (XIP) from this flash. The FCB configures the bootloader in ROM to read from the external memory and XIP. However, the FCB only configures for reading the flash.

To erase or program the flash in your application, you need to use a flash driver for that, which is why CONFIG_FLASH needs to be selected. I do not see that IS25WX256 is supported today in the FlexSPI drivers. The flash_mcux_flexspi_nor.c driver supports many devices, and uses SFDP to query the external flash to configure the FlexSPI. But it also uses the vendor ID read from the flash to configure the FlexSPI for certain devices. In this case, it seems you would need to add FlexSPI driver support for the IS25WX256.

I see IS25WX256 is an octal DDR flash. There are some similar flash devices that have their own FlexSPI driver, like these 2 below. You can use those as a reference for enabling the IS25WX256.
• flash_mcux_flexspi_hyperflash.c
• flash_mcux_flexspi_mx25um51345g.c

Best regards