MIMXRT1166 external NOR flash on flexspi2 - verification error

[rtborg]

I'm working on a custom board using MIMXRT1166 and w25q64 quad flash attached to flexspi2, which is intended to be used as data storage. When I try to use the flash shell, I cannot write to memory:

proto:~$flash write w25q64@0 0x0 0xcafeface
Write OK.
Verification ERROR!
proto:~$flash read w25q64@0 0x0 0x4
00000000: 00 00 00 00                                      |....             |

When debugging the flash driver, I can see that JEDEC ID is read correctly in file flash_mcux_flexspi_nor.c

The DQS pin is not connected.

Devicetree configuration is below. I have not scoped the signals yet. Is there anything that I'm missing?

/******************************************************************************/
/* Data flash on FlexSPI2 */
/******************************************************************************/
&pinctrl {
    pinmux_flexspi2: pinmux_flexspi2 {
		group0 {
			pinmux = <&iomuxc_gpio_emc_b2_12_flexspi2_a_dqs>, 
            < &iomuxc_gpio_emc_b2_11_flexspi2_a_ss0_b >, 
            < &iomuxc_gpio_emc_b2_10_flexspi2_a_sclk >,
            < &iomuxc_gpio_emc_b2_13_flexspi2_a_data00 >, 
            < &iomuxc_gpio_emc_b2_14_flexspi2_a_data01 >,
            < &iomuxc_gpio_emc_b2_15_flexspi2_a_data02 >, 
            < &iomuxc_gpio_emc_b2_16_flexspi2_a_data03 >;
			bias-pull-down;
			input-enable;
		};
	};
};

&flexspi2 {
    status = "okay";
    pinctrl-0 = < &pinmux_flexspi2 >;
    reg = < 0x400d0000 0x4000 >, <0x60000000 DT_SIZE_M(8)>;
	pinctrl-names = "default";

	ahb-prefetch;
	ahb-bufferable;
	ahb-cacheable;
	ahb-read-addr-opt;
	rx-clock-source = <1>;

    /* WINBOND flash memory*/
    w25q64: w25q64@0  {
        compatible = "nxp,imx-flexspi-nor";
		size = <67108864>;
		reg = <0>;
		spi-max-frequency = <10000000>;
		status = "okay";
		jedec-id = [EF 40 17];

		erase-block-size = <4096>;
		write-block-size = <1>;
		cs-interval-unit = <1>;
		cs-interval = <2>;
		cs-hold-time = <3>;
		cs-setup-time = <3>;
		data-valid-time = <2>;
		column-space = <0>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;
			data_partition: partition@0 {
				label = "data";
				reg = <0x0 DT_SIZE_M(8)>;
			};
		};
    };
};

[ofirshe]

@rtborg I also had some issues on RT1061 with flexspi2 at a low frequency (30 MHz) with w25q512nw1, plus some read problems.

&flexspi2 {
    reg = <0x402a4000 0x4000>, <0x70000000 DT_SIZE_M(64)>;
    status = "okay";
    pinctrl-0 = <&pinmux_flexspi2>;
    pinctrl-names = "default";

    w25q512nw1: w25q512nw1@0 {
        compatible = "nxp,imx-flexspi-nor";
        size = <DT_SIZE_M(64 * 8)>;
        reg = <0>;
        spi-max-frequency = <DT_FREQ_M(30)>;
        status = "okay";
        jedec-id = [ef 60 20];
        erase-block-size = <4096>;
        write-block-size = <1>;
        cs-hold-time = <10>;
        cs-setup-time = <10>;
        partitions {
            compatible = "fixed-partitions";
            #address-cells = <1>;
            #size-cells = <1>;

            w25q512nw1_partition: partition@0 {
                label = "NOR1";
                reg = <0x00000000 DT_SIZE_M(64)>;
            };
        };
    };
};

Initially I couldn’t even read the correct JEDEC ID. To fix that, I had to change the divider and mux of the reference PLL:

CLOCK_DisableClock(kCLOCK_FlexSpi2);
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 7);
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 2);
CLOCK_EnableClock(kCLOCK_FlexSpi2);

It’s also worth verifying the actual clock output on a scope, since the DTS value doesn’t always match reality - you may need to tweak the mux/div settings manually.

Later I hit a problem with the read command (0xEC), where the first byte was consistently missing. To work around it, I patched flash_mcux_flexspi_nor.c as follows:

case 0x2060ef:
		/* W25Q512NW-IQ/IN flash, use 4 byte read/write */
		flexspi_lut[READ][0] = FLEXSPI_LUT_SEQ(
				kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_4READ_4B,
				kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 32);
		if (data->config.flexspiRootClk <= 104 * 1000 * 1000)
		{
			/* Flash needs 6 dummy cycles at frequencies up to 104 MHz */
			flexspi_lut[READ][1] = FLEXSPI_LUT_SEQ(
						kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 6,
						kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04);
		}
		else
		{
			/* Flash needs 8 dummy cycles when frequency exceeds 104 MHz (e.g., 133 MHz) */
			flexspi_lut[READ][1] = FLEXSPI_LUT_SEQ(
								kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 8,
								kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04);
		}

In my case I have two NOR flashes: One on flexspi at 133 MHz and One on flexspi2 at 30 MHz
On the slower device, the first read byte was always dropped.