diff --git a/drivers/display/display_stm32_ltdc.c b/drivers/display/display_stm32_ltdc.c index d950f5b9dbfb8..ebcaad5ed02fc 100644 --- a/drivers/display/display_stm32_ltdc.c +++ b/drivers/display/display_stm32_ltdc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -555,19 +556,8 @@ static DEVICE_API(display, stm32_ltdc_display_api) = { }; #if DT_INST_NODE_HAS_PROP(0, ext_sdram) - -#if DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(sdram1)) -#define FRAME_BUFFER_SECTION __stm32_sdram1_section -#elif DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(sdram2)) -#define FRAME_BUFFER_SECTION __stm32_sdram2_section -#elif DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(psram)) -#define FRAME_BUFFER_SECTION __stm32_psram_section -#else -#error "LTDC ext-sdram property in device tree does not reference SDRAM1 or SDRAM2 node or PSRAM "\ - "node" -#define FRAME_BUFFER_SECTION -#endif /* DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(sdram1)) */ - +#define FRAME_BUFFER_SECTION \ + Z_GENERIC_SECTION(LINKER_DT_NODE_REGION_NAME(DT_INST_PHANDLE(0, ext_sdram))) #else #define FRAME_BUFFER_SECTION #endif /* DT_INST_NODE_HAS_PROP(0, ext_sdram) */ diff --git a/drivers/memc/CMakeLists.txt b/drivers/memc/CMakeLists.txt index acf307ab58334..3b599b2325aba 100644 --- a/drivers/memc/CMakeLists.txt +++ b/drivers/memc/CMakeLists.txt @@ -26,7 +26,5 @@ zephyr_library_sources_ifdef(CONFIG_MEMC_SMARTBOND memc_smartbond_ zephyr_library_sources_ifdef(CONFIG_MEMC_STM32 memc_stm32.c) zephyr_library_sources_ifdef(CONFIG_MEMC_STM32_NOR_PSRAM memc_stm32_nor_psram.c) zephyr_library_sources_ifdef(CONFIG_MEMC_STM32_SDRAM memc_stm32_sdram.c) -zephyr_linker_sources_ifdef(CONFIG_MEMC_STM32_SDRAM SECTIONS memc_stm32_sdram.ld) zephyr_library_sources_ifdef(CONFIG_MEMC_STM32_XSPI_PSRAM memc_stm32_xspi_psram.c) -zephyr_linker_sources_ifdef(CONFIG_MEMC_STM32_XSPI_PSRAM SECTIONS memc_stm32_xspi_psram.ld) diff --git a/drivers/memc/memc_stm32_sdram.ld b/drivers/memc/memc_stm32_sdram.ld deleted file mode 100644 index 6fac24db31f5c..0000000000000 --- a/drivers/memc/memc_stm32_sdram.ld +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2020 Teslabs Engineering S.L. - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram1), okay) -GROUP_START(SDRAM1) - - SECTION_PROLOGUE(_STM32_SDRAM1_SECTION_NAME, (NOLOAD),) - { - *(.stm32_sdram1) - *(".stm32_sdram1.*") - } GROUP_LINK_IN(SDRAM1) - -GROUP_END(SDRAM1) -#endif - -#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram2), okay) -GROUP_START(SDRAM2) - - SECTION_PROLOGUE(_STM32_SDRAM2_SECTION_NAME, (NOLOAD),) - { - *(.stm32_sdram2) - *(".stm32_sdram2.*") - } GROUP_LINK_IN(SDRAM2) - -GROUP_END(SDRAM2) -#endif diff --git a/drivers/memc/memc_stm32_xspi_psram.ld b/drivers/memc/memc_stm32_xspi_psram.ld deleted file mode 100644 index 6ef15da284154..0000000000000 --- a/drivers/memc/memc_stm32_xspi_psram.ld +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (c) 2025 STMicroelectronics - * - * SPDX-License-Identifier: Apache-2.0 - */ -#if DT_NODE_HAS_STATUS(DT_NODELABEL(psram), okay) -GROUP_START(PSRAM) - - SECTION_PROLOGUE(_STM32_PSRAM_SECTION_NAME, (NOLOAD),) - { - *(.stm32_psram) - *(".stm32_psram.*") - } GROUP_LINK_IN(PSRAM) - -GROUP_END(PSRAM) -#endif diff --git a/dts/arm/st/c0/stm32c0.dtsi b/dts/arm/st/c0/stm32c0.dtsi index eb21bc3cd46c1..a1281a260cf31 100644 --- a/dts/arm/st/c0/stm32c0.dtsi +++ b/dts/arm/st/c0/stm32c0.dtsi @@ -87,7 +87,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/f0/stm32f0.dtsi b/dts/arm/st/f0/stm32f0.dtsi index e0c7a0a531358..350bc9aa12f7d 100644 --- a/dts/arm/st/f0/stm32f0.dtsi +++ b/dts/arm/st/f0/stm32f0.dtsi @@ -35,7 +35,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/f1/stm32f1.dtsi b/dts/arm/st/f1/stm32f1.dtsi index d5f427b11f9c0..59684f4938342 100644 --- a/dts/arm/st/f1/stm32f1.dtsi +++ b/dts/arm/st/f1/stm32f1.dtsi @@ -55,7 +55,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/f2/stm32f2.dtsi b/dts/arm/st/f2/stm32f2.dtsi index c253defc800c4..cab7333d558a4 100644 --- a/dts/arm/st/f2/stm32f2.dtsi +++ b/dts/arm/st/f2/stm32f2.dtsi @@ -37,7 +37,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/f3/stm32f3.dtsi b/dts/arm/st/f3/stm32f3.dtsi index ccc295176c54f..2ef5018bb8e12 100644 --- a/dts/arm/st/f3/stm32f3.dtsi +++ b/dts/arm/st/f3/stm32f3.dtsi @@ -34,7 +34,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; diff --git a/dts/arm/st/f4/stm32f4.dtsi b/dts/arm/st/f4/stm32f4.dtsi index b8bf17ee21b63..00ff53d2ce271 100644 --- a/dts/arm/st/f4/stm32f4.dtsi +++ b/dts/arm/st/f4/stm32f4.dtsi @@ -55,7 +55,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/g0/stm32g0.dtsi b/dts/arm/st/g0/stm32g0.dtsi index 64cbf80e5d1cb..0f958c0ad50a5 100644 --- a/dts/arm/st/g0/stm32g0.dtsi +++ b/dts/arm/st/g0/stm32g0.dtsi @@ -54,7 +54,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/g4/stm32g4.dtsi b/dts/arm/st/g4/stm32g4.dtsi index ec83a77392638..14202e96c33fe 100644 --- a/dts/arm/st/g4/stm32g4.dtsi +++ b/dts/arm/st/g4/stm32g4.dtsi @@ -53,7 +53,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/h5/stm32h503Xb.dtsi b/dts/arm/st/h5/stm32h503Xb.dtsi index 2ab6e3ae0a77f..22fc4d042dfcc 100644 --- a/dts/arm/st/h5/stm32h503Xb.dtsi +++ b/dts/arm/st/h5/stm32h503Xb.dtsi @@ -8,7 +8,9 @@ / { sram0: memory@20000000 { + compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x20000000 DT_SIZE_K(32)>; + zephyr,memory-region = "SRAM0"; }; soc { diff --git a/dts/arm/st/h7/stm32h723.dtsi b/dts/arm/st/h7/stm32h723.dtsi index 8a6aaf0079021..5f0895e8e7003 100644 --- a/dts/arm/st/h7/stm32h723.dtsi +++ b/dts/arm/st/h7/stm32h723.dtsi @@ -195,7 +195,8 @@ /* D1 domain, AXI SRAM (128KB with shared ITCM 192KB as `TCM_AXI_SHARED` is `000`) */ sram0: memory@24000000 { reg = <0x24000000 DT_SIZE_K(320)>; - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; /* D2 domain, AHB SRAM */ diff --git a/dts/arm/st/h7/stm32h742.dtsi b/dts/arm/st/h7/stm32h742.dtsi index 0e329c83b9af1..9df574da22d50 100644 --- a/dts/arm/st/h7/stm32h742.dtsi +++ b/dts/arm/st/h7/stm32h742.dtsi @@ -64,8 +64,9 @@ /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */ sram0: memory@24000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x24000000 DT_SIZE_K(384)>; + zephyr,memory-region = "SRAM0"; }; /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */ diff --git a/dts/arm/st/h7/stm32h745.dtsi b/dts/arm/st/h7/stm32h745.dtsi index 0eb82817506d7..032f4438f22b7 100644 --- a/dts/arm/st/h7/stm32h745.dtsi +++ b/dts/arm/st/h7/stm32h745.dtsi @@ -91,7 +91,8 @@ /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */ sram0: memory@24000000 { reg = <0x24000000 DT_SIZE_K(512)>; - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */ diff --git a/dts/arm/st/h7/stm32h7a3.dtsi b/dts/arm/st/h7/stm32h7a3.dtsi index a93d669d46028..a5a2e89efaa26 100644 --- a/dts/arm/st/h7/stm32h7a3.dtsi +++ b/dts/arm/st/h7/stm32h7a3.dtsi @@ -112,8 +112,9 @@ /* System data RAM accessible over AXI bus: AXI SRAM1 in CD domain */ sram0: memory@24000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x24000000 DT_SIZE_K(256)>; + zephyr,memory-region = "SRAM0"; }; /* System data RAM accessible over AXI bus: AXI SRAM2 in CD domain */ diff --git a/dts/arm/st/h7rs/stm32h7rs.dtsi b/dts/arm/st/h7rs/stm32h7rs.dtsi index a74a48246db06..e744a9275bf89 100644 --- a/dts/arm/st/h7rs/stm32h7rs.dtsi +++ b/dts/arm/st/h7rs/stm32h7rs.dtsi @@ -50,8 +50,9 @@ /* System data RAM accessible over AXI bus: AXI SRAM1 in CD domain */ sram0: memory@24000000 { - compatible = "mmio-sram"; reg = <0x24000000 DT_SIZE_K(128)>; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */ diff --git a/dts/arm/st/l0/stm32l0.dtsi b/dts/arm/st/l0/stm32l0.dtsi index bcadfd5c4feae..7757786761516 100644 --- a/dts/arm/st/l0/stm32l0.dtsi +++ b/dts/arm/st/l0/stm32l0.dtsi @@ -44,7 +44,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/l1/stm32l1.dtsi b/dts/arm/st/l1/stm32l1.dtsi index 31ce2a4fc8f3b..cbf4d89f3cf18 100644 --- a/dts/arm/st/l1/stm32l1.dtsi +++ b/dts/arm/st/l1/stm32l1.dtsi @@ -54,7 +54,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/l4/stm32l4.dtsi b/dts/arm/st/l4/stm32l4.dtsi index fe2e27c94eb09..16819a4f29ac9 100644 --- a/dts/arm/st/l4/stm32l4.dtsi +++ b/dts/arm/st/l4/stm32l4.dtsi @@ -60,7 +60,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/l4/stm32l471.dtsi b/dts/arm/st/l4/stm32l471.dtsi index 840f86cdfd670..8d99f1120fd40 100644 --- a/dts/arm/st/l4/stm32l471.dtsi +++ b/dts/arm/st/l4/stm32l471.dtsi @@ -7,6 +7,11 @@ #include / { + sram1: memory@10000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM1"; + }; + clocks { pllsai2: pllsai2 { #clock-cells = <0>; diff --git a/dts/arm/st/l4/stm32l4p5.dtsi b/dts/arm/st/l4/stm32l4p5.dtsi index a05b4ef70eb04..929ffe672cb85 100644 --- a/dts/arm/st/l4/stm32l4p5.dtsi +++ b/dts/arm/st/l4/stm32l4p5.dtsi @@ -17,9 +17,13 @@ reg = <0x20000000 DT_SIZE_K(128)>; }; sram1: memory@10000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM1"; reg = <0x10000000 DT_SIZE_K(64)>; }; sram2: memory@20030000 { + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM2"; reg = <0x20030000 DT_SIZE_K(128)>; }; diff --git a/dts/arm/st/l5/stm32l5.dtsi b/dts/arm/st/l5/stm32l5.dtsi index 457a8f4b50e80..179f0ceae4ea6 100644 --- a/dts/arm/st/l5/stm32l5.dtsi +++ b/dts/arm/st/l5/stm32l5.dtsi @@ -67,7 +67,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/mp1/stm32mp157.dtsi b/dts/arm/st/mp1/stm32mp157.dtsi index 14077f5142b4a..c4c763a24891e 100644 --- a/dts/arm/st/mp1/stm32mp157.dtsi +++ b/dts/arm/st/mp1/stm32mp157.dtsi @@ -31,11 +31,13 @@ }; retram: memory0@0 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x00000000 DT_SIZE_K(64)>; + zephyr,memory-region = "RETRAM"; }; mcusram: memory1@10000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "MCUSRAM"; reg = <0x10000000 DT_SIZE_K(320)>; }; diff --git a/dts/arm/st/mp13/stm32mp13.dtsi b/dts/arm/st/mp13/stm32mp13.dtsi index ef4743b17395e..2feb8d54fcc5d 100644 --- a/dts/arm/st/mp13/stm32mp13.dtsi +++ b/dts/arm/st/mp13/stm32mp13.dtsi @@ -43,7 +43,8 @@ interrupt-parent = <&gic>; sysram: memory@2ffe0000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SYSRAM"; reg = <0x2FFE0000 DT_SIZE_K(128)>; }; @@ -257,12 +258,14 @@ }; ddr_code: memory@C0000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "DDR_CODE"; reg = <0xC0000000 0x10000000>; }; ddr_data: memory@D0000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "DDR_DATA"; reg = <0xD0000000 0x10000000>; }; diff --git a/dts/arm/st/mp2/stm32mp2_m33.dtsi b/dts/arm/st/mp2/stm32mp2_m33.dtsi index 23c7b0ad99f85..e5164afb6cfc9 100644 --- a/dts/arm/st/mp2/stm32mp2_m33.dtsi +++ b/dts/arm/st/mp2/stm32mp2_m33.dtsi @@ -25,11 +25,13 @@ }; ddr_code: memory0@80100000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "DDR_CODE"; }; ddr_sys: memory1@80a00000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "DDR_SYS"; }; soc { diff --git a/dts/arm/st/n6/stm32n6.dtsi b/dts/arm/st/n6/stm32n6.dtsi index f85a9c743ba4c..86c8f0543ecf3 100644 --- a/dts/arm/st/n6/stm32n6.dtsi +++ b/dts/arm/st/n6/stm32n6.dtsi @@ -39,11 +39,13 @@ }; axisram1: memory@34000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "AXISRAM1"; }; axisram2: memory@34180400 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "AXISRAM2"; }; clocks { diff --git a/dts/arm/st/u0/stm32u0.dtsi b/dts/arm/st/u0/stm32u0.dtsi index 73f7da7c3ce1e..90e4e4578c08b 100644 --- a/dts/arm/st/u0/stm32u0.dtsi +++ b/dts/arm/st/u0/stm32u0.dtsi @@ -60,7 +60,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/u3/stm32u3.dtsi b/dts/arm/st/u3/stm32u3.dtsi index bdd77abe8684d..339a7439fd0dc 100644 --- a/dts/arm/st/u3/stm32u3.dtsi +++ b/dts/arm/st/u3/stm32u3.dtsi @@ -33,7 +33,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/u5/stm32u5.dtsi b/dts/arm/st/u5/stm32u5.dtsi index fa521b18e8b33..1c7a4ab5282c5 100644 --- a/dts/arm/st/u5/stm32u5.dtsi +++ b/dts/arm/st/u5/stm32u5.dtsi @@ -76,7 +76,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/wb/stm32wb.dtsi b/dts/arm/st/wb/stm32wb.dtsi index 214ddc4f78d2f..3c143f37d96ec 100644 --- a/dts/arm/st/wb/stm32wb.dtsi +++ b/dts/arm/st/wb/stm32wb.dtsi @@ -60,7 +60,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; sram1: memory@20030000 { diff --git a/dts/arm/st/wb0/stm32wb0.dtsi b/dts/arm/st/wb0/stm32wb0.dtsi index 0900f8f02a0fd..f832f9e086e13 100644 --- a/dts/arm/st/wb0/stm32wb0.dtsi +++ b/dts/arm/st/wb0/stm32wb0.dtsi @@ -38,7 +38,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/wba/stm32wba.dtsi b/dts/arm/st/wba/stm32wba.dtsi index beb7cf416674b..abdb8c22ef78f 100644 --- a/dts/arm/st/wba/stm32wba.dtsi +++ b/dts/arm/st/wba/stm32wba.dtsi @@ -69,7 +69,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; /* Defining this memory solves unaligned memory access issue */ diff --git a/dts/arm/st/wl/stm32wl.dtsi b/dts/arm/st/wl/stm32wl.dtsi index 51924d337be69..5fd89345fe74d 100644 --- a/dts/arm/st/wl/stm32wl.dtsi +++ b/dts/arm/st/wl/stm32wl.dtsi @@ -58,7 +58,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/include/zephyr/linker/section_tags.h b/include/zephyr/linker/section_tags.h index ab73c0445016f..f319c3de00853 100644 --- a/include/zephyr/linker/section_tags.h +++ b/include/zephyr/linker/section_tags.h @@ -45,9 +45,6 @@ #define __imx_boot_ivt_section Z_GENERIC_SECTION(_IMX_BOOT_IVT_SECTION_NAME) #define __imx_boot_dcd_section Z_GENERIC_SECTION(_IMX_BOOT_DCD_SECTION_NAME) #define __imx_boot_container_section Z_GENERIC_SECTION(_IMX_BOOT_CONTAINER_SECTION_NAME) -#define __stm32_sdram1_section Z_GENERIC_SECTION(_STM32_SDRAM1_SECTION_NAME) -#define __stm32_sdram2_section Z_GENERIC_SECTION(_STM32_SDRAM2_SECTION_NAME) -#define __stm32_psram_section Z_GENERIC_SECTION(_STM32_PSRAM_SECTION_NAME) #define __stm32_backup_sram_section Z_GENERIC_SECTION(_STM32_BACKUP_SRAM_SECTION_NAME) #endif /* CONFIG_ARM */ diff --git a/include/zephyr/linker/sections.h b/include/zephyr/linker/sections.h index dc6fce72e6be6..41a20e3fd7abe 100644 --- a/include/zephyr/linker/sections.h +++ b/include/zephyr/linker/sections.h @@ -69,10 +69,6 @@ #define _IMX_BOOT_DCD_SECTION_NAME .boot_hdr.dcd_data #define _IMX_BOOT_CONTAINER_SECTION_NAME .boot_hdr.container -#define _STM32_SDRAM1_SECTION_NAME .stm32_sdram1 -#define _STM32_SDRAM2_SECTION_NAME .stm32_sdram2 -#define _STM32_PSRAM_SECTION_NAME .stm32_psram - #define _STM32_BACKUP_SRAM_SECTION_NAME .stm32_backup_sram #ifdef CONFIG_NOCACHE_MEMORY