Merge pull request #24192 from alichraghi/fix_spirv

rename spirv backend name

Author: alexrp

lib/std/builtin.zig

@@ -1121,7 +1121,7 @@ pub const CompilerBackend = enum(u64) {
     stage2_sparc64 = 10,
     /// The reference implementation self-hosted compiler of Zig, using the
     /// spirv backend.
-    stage2_spirv64 = 11,
+    stage2_spirv = 11,
     /// The reference implementation self-hosted compiler of Zig, using the
     /// powerpc backend.
     stage2_powerpc = 12,

lib/std/debug.zig

@@ -607,7 +607,7 @@ pub fn defaultPanic(
         .stage2_arm,
         .stage2_powerpc,
         .stage2_riscv64,
-        .stage2_spirv64,
+        .stage2_spirv,
         .stage2_wasm,
         .stage2_x86,
         => @trap(),

lib/std/mem.zig

@@ -680,7 +680,7 @@ const eqlBytes_allowed = switch (builtin.zig_backend) {
     .stage2_riscv64,
     => false,
     // The SPIR-V backend does not support the optimized path yet.
-    .stage2_spirv64 => false,
+    .stage2_spirv => false,
     // The naive memory comparison implementation is more useful for fuzzers to
     // find interesting inputs.
     else => !builtin.fuzz,

lib/std/start.zig

@@ -19,7 +19,7 @@ pub const simplified_logic = switch (builtin.zig_backend) {
     .stage2_arm,
     .stage2_powerpc,
     .stage2_sparc64,
-    .stage2_spirv64,
+    .stage2_spirv,
     .stage2_x86,
     => true,
     else => false,

lib/std/testing.zig

@@ -35,7 +35,7 @@ pub var log_level = std.log.Level.warn;
 pub const backend_can_print = switch (builtin.zig_backend) {
     .stage2_powerpc,
     .stage2_riscv64,
-    .stage2_spirv64,
+    .stage2_spirv,
     => false,
     else => true,
 };

src/Zcu.zig

@@ -4585,7 +4585,7 @@ pub fn callconvSupported(zcu: *Zcu, cc: std.builtin.CallingConvention) union(enu
             .naked => true,
             else => false,
         },
-        .stage2_spirv64 => switch (cc) {
+        .stage2_spirv => switch (cc) {
             .spirv_device, .spirv_kernel => true,
             .spirv_fragment, .spirv_vertex => target.os.tag == .vulkan,
             else => false,

src/Zcu/PerThread.zig

@@ -4386,7 +4386,7 @@ pub fn runCodegen(pt: Zcu.PerThread, func_index: InternPool.Index, air: *Air, ou
                 zcu.comp.config.use_llvm,
             )) {
                 else => unreachable, // assertion failure
-                .stage2_spirv64,
+                .stage2_spirv,
                 .stage2_llvm,
                 => {},
             },

src/codegen.zig

@@ -37,7 +37,7 @@ fn devFeatureForBackend(backend: std.builtin.CompilerBackend) dev.Feature {
         .stage2_powerpc => .powerpc_backend,
         .stage2_riscv64 => .riscv64_backend,
         .stage2_sparc64 => .sparc64_backend,
-        .stage2_spirv64 => .spirv64_backend,
+        .stage2_spirv => .spirv64_backend,
         .stage2_wasm => .wasm_backend,
         .stage2_x86 => .x86_backend,
         .stage2_x86_64 => .x86_64_backend,
@@ -55,7 +55,7 @@ fn importBackend(comptime backend: std.builtin.CompilerBackend) type {
         .stage2_powerpc => @import("arch/powerpc/CodeGen.zig"),
         .stage2_riscv64 => @import("arch/riscv64/CodeGen.zig"),
         .stage2_sparc64 => @import("arch/sparc64/CodeGen.zig"),
-        .stage2_spirv64 => @import("codegen/spirv.zig"),
+        .stage2_spirv => @import("codegen/spirv.zig"),
         .stage2_wasm => @import("arch/wasm/CodeGen.zig"),
         .stage2_x86, .stage2_x86_64 => @import("arch/x86_64/CodeGen.zig"),
         _ => unreachable,
@@ -76,7 +76,7 @@ pub fn legalizeFeatures(pt: Zcu.PerThread, nav_index: InternPool.Nav.Index) ?*co
         .stage2_x86,
         .stage2_riscv64,
         .stage2_sparc64,
-        .stage2_spirv64,
+        .stage2_spirv,
         .stage2_powerpc,
         => |backend| {
             dev.check(devFeatureForBackend(backend));

src/dev.zig

@@ -40,6 +40,10 @@ pub const Env = enum {
     /// - `zig build-* -fno-llvm -fno-lld -target riscv64-linux`
     @"riscv64-linux",
 
+    /// - sema
+    /// - `zig build-* -fno-llvm -fno-lld -target spirv(32/64)-* --listen=-`
+    spirv,
+
     /// - sema
     /// - `zig build-* -fno-llvm -fno-lld -target wasm32-* --listen=-`
     wasm,
@@ -178,6 +182,12 @@ pub const Env = enum {
                 => true,
                 else => Env.sema.supports(feature),
             },
+            .spirv => switch (feature) {
+                .spirv64_backend,
+                .spirv_linker,
+                => true,
+                else => Env.sema.supports(feature),
+            },
             .wasm => switch (feature) {
                 .stdio_listen,
                 .incremental,

src/target.zig

@@ -813,8 +813,8 @@ pub fn zigBackend(target: std.Target, use_llvm: bool) std.builtin.CompilerBacken
         .powerpc, .powerpcle, .powerpc64, .powerpc64le => .stage2_powerpc,
         .riscv64 => .stage2_riscv64,
         .sparc64 => .stage2_sparc64,
-        .spirv32 => if (target.os.tag == .opencl) .stage2_spirv64 else .other,
-        .spirv, .spirv64 => .stage2_spirv64,
+        .spirv32 => if (target.os.tag == .opencl) .stage2_spirv else .other,
+        .spirv, .spirv64 => .stage2_spirv,
         .wasm32, .wasm64 => .stage2_wasm,
         .x86 => .stage2_x86,
         .x86_64 => .stage2_x86_64,

test/behavior.zig

@@ -121,18 +121,18 @@ test {
         _ = @import("behavior/wasm.zig");
     }
 
-    if (builtin.zig_backend != .stage2_spirv64 and builtin.os.tag != .wasi) {
+    if (builtin.zig_backend != .stage2_spirv and builtin.os.tag != .wasi) {
         _ = @import("behavior/asm.zig");
     }
 
     if (builtin.zig_backend != .stage2_arm and
         builtin.zig_backend != .stage2_aarch64 and
-        builtin.zig_backend != .stage2_spirv64)
+        builtin.zig_backend != .stage2_spirv)
     {
         _ = @import("behavior/export_keyword.zig");
     }
 
-    if (builtin.zig_backend != .stage2_spirv64 and !builtin.cpu.arch.isWasm()) {
+    if (builtin.zig_backend != .stage2_spirv and !builtin.cpu.arch.isWasm()) {
         // Due to lack of import/export of global support
         // (https://github.com/ziglang/zig/issues/4866), these tests correctly
         // cause linker errors, since a data symbol cannot be exported when
@@ -145,7 +145,7 @@ test {
 
 // This bug only repros in the root file
 test "deference @embedFile() of a file full of zero bytes" {
-    if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
 
     const contents = @embedFile("behavior/zero.bin").*;
     try @import("std").testing.expect(contents.len == 456);

test/behavior/abs.zig

@@ -7,7 +7,7 @@ test "@abs integers" {
     if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
-    if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
 
     try comptime testAbsIntegers();
     try testAbsIntegers();
@@ -94,7 +94,7 @@ test "@abs big int <= 128 bits" {
     if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest; // TODO
-    if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest; // TODO
+    if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
 
     try comptime testAbsSignedBigInt();
@@ -165,9 +165,9 @@ test "@abs floats" {
     try comptime testAbsFloats(f64);
     try testAbsFloats(f64);
     try comptime testAbsFloats(f80);
-    if (builtin.zig_backend != .stage2_wasm and builtin.zig_backend != .stage2_spirv64 and builtin.zig_backend != .stage2_riscv64) try testAbsFloats(f80);
+    if (builtin.zig_backend != .stage2_wasm and builtin.zig_backend != .stage2_spirv and builtin.zig_backend != .stage2_riscv64) try testAbsFloats(f80);
     try comptime testAbsFloats(f128);
-    if (builtin.zig_backend != .stage2_wasm and builtin.zig_backend != .stage2_spirv64 and builtin.zig_backend != .stage2_riscv64) try testAbsFloats(f128);
+    if (builtin.zig_backend != .stage2_wasm and builtin.zig_backend != .stage2_spirv and builtin.zig_backend != .stage2_riscv64) try testAbsFloats(f128);
 }
 
 fn testAbsFloats(comptime T: type) !void {
@@ -214,7 +214,7 @@ test "@abs int vectors" {
     if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
-    if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
 
     try comptime testAbsIntVectors(1);
     try testAbsIntVectors(1);
@@ -281,7 +281,7 @@ test "@abs unsigned int vectors" {
     if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
-    if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
 
     try comptime testAbsUnsignedIntVectors(1);
     try testAbsUnsignedIntVectors(1);
@@ -339,7 +339,7 @@ test "@abs float vectors" {
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
-    if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
 

test/behavior/addrspace_and_linksection.zig

@@ -79,7 +79,7 @@ test "addrspace and linksection on container-level var" {
 }
 
 test "addrspace on fn" {
-    if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
 
     const S = struct {
         fn f() addrspace(.generic) u32 {