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kl27z_hic: Update flash config in startup assembly files.
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This porst into th GCC asm file the flash config data from the
armcc file for the micro:bit board.

The default kl27z configuration (non-micro:bit) has been updated in
both GCC and armcc to have the FOPT config disable NMI interrupts
and ensure the BOOTCFG0 pin doesn't force the ROM bootloader to
run on startup.
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microbit-carlos authored and mbrossard committed May 18, 2022
1 parent 9d5d045 commit a968edc
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Showing 2 changed files with 44 additions and 2 deletions.
4 changes: 4 additions & 0 deletions source/hic_hal/freescale/kl27z/armcc/startup_MKL27Z4.s
Original file line number Diff line number Diff line change
Expand Up @@ -276,7 +276,11 @@ FPROT0 EQU nFPROT0:EOR:0xFF
; <2=> Boot from ROM
; <3=> Boot from ROM
; <i> Boot source selection
#if defined(MICROBIT_LOCK_BOOTLOADER)
FOPT EQU 0x39
#else
FOPT EQU 0x3B
#endif
; </h>
; <h> Flash security byte (FSEC)
; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
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42 changes: 40 additions & 2 deletions source/hic_hal/freescale/kl27z/gcc/startup_MKL27Z4.S
Original file line number Diff line number Diff line change
Expand Up @@ -83,15 +83,53 @@ __isr_vector:
/* Flash Configuration */
.section .FlashConfig, "a"
#if defined(MICROBIT_LOCK_BOOTLOADER)
/* Backdoor Comparison Key: "MICROBIT" */
.long 0x5243494D
.long 0x5449424F
/* Program flash protection bytes (FPROT): Protect the first 32 kB of flash */
.long 0xFFFFFFF0
.long 0xFFFF39FE
/* Flash security byte (FSEC)
* KEYEN [6:7] -> 0b10 Backdoor key access enabled
* MEEN [4:5] -> 0b11 Mass erase is enabled
* FSLACC [2:3] -> 0b11 NXP factory access granted
* SEC [0:1] -> 0b10 MCU security status is unsecure
*/
.byte 0xBE
/* Flash nonvolatile option byte (FOPT):
* BOOTSRC_SEL [7:6] -> 0b00 Boot from flash
* FAST_INIT [5] -> 0b1 Fast Initialization
* RESET_PIN_CFG [3] -> 0b1 RESET_b pin is dedicated
* NMI_DIS [2] -> 0b0 NMI interrupts are always blocked
* BOOTPIN_OPT [1] -> 0b0 Force Boot from ROM if BOOTCFG0 asserted
* LPBOOT [4:0] -> 0b11 Core and system clock divider (OUTDIV1) is 0x0 (divide by 1)
*/
.byte 0x39
/* 2 reserved bytes */
.byte 0xFF, 0xFF
#else
/* Backdoor Comparison Key: Unset */
.long 0xFFFFFFFF
.long 0xFFFFFFFF
/* Program flash protection bytes (FPROT): None */
.long 0xFFFFFFFF
.long 0xFFFF3FFE
/* Flash security byte (FSEC)
* KEYEN [6:7] -> 0b11 Backdoor key access disabled
* MEEN [4:5] -> 0b11 Mass erase is enabled
* FSLACC [2:3] -> 0b11 NXP factory access granted
* SEC [0:1] -> 0b10 MCU security status is unsecure
*/
.byte 0xFE
/* Flash nonvolatile option byte (FOPT):
* BOOTSRC_SEL [7:6] -> 0b00 Boot from flash
* FAST_INIT [5] -> 0b1 Fast Initialization
* RESET_PIN_CFG [3] -> 0b1 RESET_b pin is dedicated
* NMI_DIS [2] -> 0b0 NMI interrupts are always blocked
* BOOTPIN_OPT [1] -> 0b1 Boot source configured by FOPT[7:6] (BOOTSRC_SEL) bits
* LPBOOT [4:0] -> 0b11 Core and system clock divider (OUTDIV1) is 0x0 (divide by 1)
*/
.byte 0x3B
/* 2 reserved bytes */
.byte 0xFF, 0xFF
#endif

.text
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