Add set and clear carry flag instructions

Granddave · Dec 28, 2023 · faa1586 · faa1586
1 parent fa0acc1
commit faa1586
Showing 1 changed file with 47 additions and 0 deletions.
diff --git a/src/emulator/cpu.rs b/src/emulator/cpu.rs
@@ -142,6 +142,11 @@ impl Cpu {
                 self.pc += 1;
                 panic!("BRK");
             }
+            // CLC
+            (ASTMnemonic::CLC, _, ASTOperand::Implied) => {
+                self.status.carry = false;
+                *cycles -= 2;
+            }
             // CMP
             (ASTMnemonic::CMP, _, ASTOperand::Immediate(value)) => {
                 self.compare(Register::A, *value);
@@ -470,6 +475,11 @@ impl Cpu {
                 self.set_zero_and_negative_flags(self.a);
                 *cycles -= if page_boundary_crossed { 6 } else { 5 };
             }
+            // SEC
+            (ASTMnemonic::SEC, _, ASTOperand::Implied) => {
+                self.status.carry = true;
+                *cycles -= 2;
+            }
             // STA
             (ASTMnemonic::STA, ASTAddressingMode::ZeroPage, ASTOperand::ZeroPage(addr)) => {
                 self.store_register(Register::A, *addr as u16, memory);
@@ -675,6 +685,43 @@ mod tests {
         }
     }
 
+    #[test]
+    fn test_set_and_clear() {
+        vec![
+            // CLC
+            TestCase {
+                // First set carry flag and then clear it
+                code: "SEC\nCLC",
+                expected_cpu: Cpu {
+                    status: Status {
+                        carry: false,
+                        ..Default::default()
+                    },
+                    pc: PROGRAM_START + 1 + 1,
+                    ..Default::default()
+                },
+                expected_cycles: 2 + 2,
+                ..Default::default()
+            },
+            // SEC
+            TestCase {
+                code: "SEC",
+                expected_cpu: Cpu {
+                    status: Status {
+                        carry: true,
+                        ..Default::default()
+                    },
+                    pc: PROGRAM_START + 1,
+                    ..Default::default()
+                },
+                expected_cycles: 2,
+                ..Default::default()
+            },
+        ]
+        .into_iter()
+        .for_each(|tc| tc.run_test());
+    }
+
     #[test]
     fn test_bitwise_operations() {
         // AND